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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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Go to the source code of this file.
Macros | |
| #define | SPI_BIOS_CONTROL 0xdc |
| #define | SPI_CFG_BAR1 0xe0 /* SPI BAR1 MMIO */ |
| #define | SPI_BIOS_CONTROL_WPD (1 << 0) |
| #define | SPI_BIOS_CONTROL_LOCK_ENABLE (1 << 1) |
| #define | SPI_BIOS_CONTROL_CACHE_DISABLE (1 << 2) |
| #define | SPI_BIOS_CONTROL_PREFETCH_ENABLE (1 << 3) |
| #define | SPI_BIOS_CONTROL_EISS (1 << 5) |
| #define | SPI_BIOS_CONTROL_BILD (1 << 7) |
| #define | SPI_BIOS_CONTROL_SYNC_SS (1 << 8) |
| #define | SPI_BIOS_CONTROL_EXT_BIOS_ENABLE (1 << 27) |
| #define | SPI_BIOS_CONTROL_EXT_BIOS_LOCK_ENABLE (1 << 28) |
| #define | SPI_BIOS_CONTROL_EXT_BIOS_LIMIT(x) ((x) & ~(0xfff)) |
| #define | SPIBAR_BFPREG 0x00 |
| #define | SPIBAR_HSFSTS_CTL 0x04 |
| #define | SPIBAR_FADDR 0x08 |
| #define | SPIBAR_DLOCK 0x0c |
| #define | SPIBAR_FDATA(n) (0x10 + ((n) & 0xf) * 4) |
| #define | SPIBAR_FPR_BASE 0x84 |
| #define | SPIBAR_FPR(n) (0x84 + (4 * (n))) |
| #define | SPIBAR_PREOP 0xa4 |
| #define | SPIBAR_OPTYPE 0xa6 |
| #define | SPIBAR_OPMENU_LOWER 0xa8 |
| #define | SPIBAR_OPMENU_UPPER 0xac |
| #define | SPIBAR_FDOC 0xb4 |
| #define | SPIBAR_FDOD 0xb8 |
| #define | SPIBAR_PTINX 0xcc |
| #define | SPIBAR_PTDATA 0xd0 |
| #define | SPIBAR_BFPREG_PRB_MASK 0x7fff |
| #define | SPIBAR_BFPREG_PRL_SHIFT 16 |
| #define | SPIBAR_BFPREG_PRL_MASK (0x7fff << SPIBAR_BFPREG_PRL_SHIFT) |
| #define | SPIBAR_BFPREG_SBRS (1 << 31) |
| #define | SPIBAR_HSFSTS_FDBC_MASK (0x3f << 24) |
| #define | SPIBAR_HSFSTS_FDBC(n) (((n) << 24) & SPIBAR_HSFSTS_FDBC_MASK) |
| #define | SPIBAR_HSFSTS_WET (1 << 21) |
| #define | SPIBAR_HSFSTS_FCYCLE_MASK (0xf << 17) |
| #define | SPIBAR_HSFSTS_FCYCLE(cyc) (((cyc) << 17) & SPIBAR_HSFSTS_FCYCLE_MASK) |
| #define | SPIBAR_HSFSTS_CYCLE_READ SPIBAR_HSFSTS_FCYCLE(0) |
| #define | SPIBAR_HSFSTS_CYCLE_WRITE SPIBAR_HSFSTS_FCYCLE(2) |
| #define | SPIBAR_HSFSTS_CYCLE_4K_ERASE SPIBAR_HSFSTS_FCYCLE(3) |
| #define | SPIBAR_HSFSTS_CYCLE_64K_ERASE SPIBAR_HSFSTS_FCYCLE(4) |
| #define | SPIBAR_HSFSTS_CYCLE_RD_STATUS SPIBAR_HSFSTS_FCYCLE(8) |
| #define | SPIBAR_HSFSTS_FGO (1 << 16) |
| #define | SPIBAR_HSFSTS_FLOCKDN (1 << 15) |
| #define | SPIBAR_HSFSTS_FDV (1 << 14) |
| #define | SPIBAR_HSFSTS_FDOPSS (1 << 13) |
| #define | SPIBAR_HSFSTS_PRR34_LOCKDN (1 << 12) |
| #define | SPIBAR_HSFSTS_WRSDIS (1 << 11) |
| #define | SPIBAR_HSFSTS_SAF_CE (1 << 8) |
| #define | SPIBAR_HSFSTS_SAF_ACTIVE (1 << 7) |
| #define | SPIBAR_HSFSTS_SAF_LE (1 << 6) |
| #define | SPIBAR_HSFSTS_SCIP (1 << 5) |
| #define | SPIBAR_HSFSTS_SAF_DLE (1 << 4) |
| #define | SPIBAR_HSFSTS_SAF_ERROR (1 << 3) |
| #define | SPIBAR_HSFSTS_AEL (1 << 2) |
| #define | SPIBAR_HSFSTS_FCERR (1 << 1) |
| #define | SPIBAR_HSFSTS_FDONE (1 << 0) |
| #define | SPIBAR_HSFSTS_W1C_BITS 0x1ff |
| #define | SPIBAR_FADDR_MASK 0x7ffffff |
| #define | SPIBAR_DLOCK_PR0LOCKDN (1 << 8) |
| #define | SPIBAR_DLOCK_PR1LOCKDN (1 << 9) |
| #define | SPIBAR_DLOCK_PR2LOCKDN (1 << 10) |
| #define | SPIBAR_DLOCK_PR3LOCKDN (1 << 11) |
| #define | SPIBAR_DLOCK_PR4LOCKDN (1 << 12) |
| #define | SPIBAR_FDATA_FIFO_SIZE 0x40 |
| #define | SPIBAR_FDOC_COMPONENT (1 << 12) |
| #define | SPIBAR_FDOC_FDSI_1 (1 << 2) |
| #define | FLCOMP_C0DEN_MASK 0xf |
| #define | FLCOMP_C0DEN_8MB 4 |
| #define | FLCOMP_C0DEN_16MB 5 |
| #define | FLCOMP_C0DEN_32MB 6 |
| #define | SPIBAR_FPR_WPE (1 << 31) /* Flash Write protected */ |
| #define | SPIBAR_FPR_MAX 5 |
| #define | SPI_OPMENU_0 0x01 /* WRSR: Write Status Register */ |
| #define | SPI_OPTYPE_0 0x01 /* Write, no address */ |
| #define | SPI_OPMENU_1 0x02 /* BYPR: Byte Program */ |
| #define | SPI_OPTYPE_1 0x03 /* Write, address required */ |
| #define | SPI_OPMENU_2 0x03 /* READ: Read Data */ |
| #define | SPI_OPTYPE_2 0x02 /* Read, address required */ |
| #define | SPI_OPMENU_3 0x05 /* RDSR: Read Status Register */ |
| #define | SPI_OPTYPE_3 0x00 /* Read, no address */ |
| #define | SPI_OPMENU_4 0x20 /* SE20: Sector Erase 0x20 */ |
| #define | SPI_OPTYPE_4 0x03 /* Write, address required */ |
| #define | SPI_OPMENU_5 0x9f /* RDID: Read ID */ |
| #define | SPI_OPTYPE_5 0x00 /* Read, no address */ |
| #define | SPI_OPMENU_6 0xd8 /* BED8: Block Erase 0xd8 */ |
| #define | SPI_OPTYPE_6 0x03 /* Write, address required */ |
| #define | SPI_OPMENU_7 0x0b /* FAST: Fast Read */ |
| #define | SPI_OPTYPE_7 0x02 /* Read, address required */ |
| #define | SPI_OPMENU_UPPER |
| #define | SPI_OPMENU_LOWER |
| #define | SPI_OPTYPE |
| #define | SPI_OPPREFIX ((0x50 << 8) | 0x06) /* EWSR and WREN */ |
| #define | SPIBAR_SFDP0_VSCC0 0xc4 |
| #define | SPIBAR_VSCC0_VCL (1 << 30) |
| #define | SPIBAR_PTINX_COMP_0 (0 << 14) |
| #define | SPIBAR_PTINX_COMP_1 (1 << 14) |
| #define | SPIBAR_PTINX_HORD_SFDP (0 << 12) |
| #define | SPIBAR_PTINX_HORD_PARAM (1 << 12) |
| #define | SPIBAR_PTINX_HORD_JEDEC (2 << 12) |
| #define | SPIBAR_PTINX_IDX_MASK 0xffc |
| #define | SPIBAR_RESET_LOCK 0xf0 |
| #define | SPIBAR_RESET_CTRL 0xf4 |
| #define | SPIBAR_RESET_DATA 0xf8 |
| #define | SPIBAR_RESET_LOCK_DISABLE 0 /* Set_Strap Lock(SSL) Bit 0 = 0 */ |
| #define | SPIBAR_RESET_LOCK_ENABLE 1 /* Set_Strap Lock(SSL) Bit 0 = 1 */ |
| #define | SPIBAR_RESET_CTRL_SSMC 1 /* Set_Strap Mux Select(SSMS) Bit=1*/ |
| #define | SPIBAR_HWSEQ_XFER_TIMEOUT_MS 5000 |
Functions | |
| void * | fast_spi_get_bar (void) |
| #define FLCOMP_C0DEN_16MB 5 |
Definition at line 100 of file fast_spi_def.h.
| #define FLCOMP_C0DEN_32MB 6 |
Definition at line 101 of file fast_spi_def.h.
| #define FLCOMP_C0DEN_8MB 4 |
Definition at line 99 of file fast_spi_def.h.
| #define FLCOMP_C0DEN_MASK 0xf |
Definition at line 98 of file fast_spi_def.h.
| #define SPI_BIOS_CONTROL 0xdc |
Definition at line 8 of file fast_spi_def.h.
| #define SPI_BIOS_CONTROL_BILD (1 << 7) |
Definition at line 19 of file fast_spi_def.h.
| #define SPI_BIOS_CONTROL_CACHE_DISABLE (1 << 2) |
Definition at line 16 of file fast_spi_def.h.
| #define SPI_BIOS_CONTROL_EISS (1 << 5) |
Definition at line 18 of file fast_spi_def.h.
| #define SPI_BIOS_CONTROL_EXT_BIOS_ENABLE (1 << 27) |
Definition at line 21 of file fast_spi_def.h.
Definition at line 23 of file fast_spi_def.h.
| #define SPI_BIOS_CONTROL_EXT_BIOS_LOCK_ENABLE (1 << 28) |
Definition at line 22 of file fast_spi_def.h.
| #define SPI_BIOS_CONTROL_LOCK_ENABLE (1 << 1) |
Definition at line 15 of file fast_spi_def.h.
| #define SPI_BIOS_CONTROL_PREFETCH_ENABLE (1 << 3) |
Definition at line 17 of file fast_spi_def.h.
| #define SPI_BIOS_CONTROL_SYNC_SS (1 << 8) |
Definition at line 20 of file fast_spi_def.h.
| #define SPI_BIOS_CONTROL_WPD (1 << 0) |
Definition at line 14 of file fast_spi_def.h.
| #define SPI_CFG_BAR1 0xe0 /* SPI BAR1 MMIO */ |
Definition at line 11 of file fast_spi_def.h.
| #define SPI_OPMENU_0 0x01 /* WRSR: Write Status Register */ |
Definition at line 108 of file fast_spi_def.h.
| #define SPI_OPMENU_1 0x02 /* BYPR: Byte Program */ |
Definition at line 110 of file fast_spi_def.h.
| #define SPI_OPMENU_2 0x03 /* READ: Read Data */ |
Definition at line 112 of file fast_spi_def.h.
| #define SPI_OPMENU_3 0x05 /* RDSR: Read Status Register */ |
Definition at line 114 of file fast_spi_def.h.
| #define SPI_OPMENU_4 0x20 /* SE20: Sector Erase 0x20 */ |
Definition at line 116 of file fast_spi_def.h.
| #define SPI_OPMENU_5 0x9f /* RDID: Read ID */ |
Definition at line 118 of file fast_spi_def.h.
| #define SPI_OPMENU_6 0xd8 /* BED8: Block Erase 0xd8 */ |
Definition at line 120 of file fast_spi_def.h.
| #define SPI_OPMENU_7 0x0b /* FAST: Fast Read */ |
Definition at line 122 of file fast_spi_def.h.
| #define SPI_OPMENU_LOWER |
Definition at line 126 of file fast_spi_def.h.
| #define SPI_OPMENU_UPPER |
Definition at line 124 of file fast_spi_def.h.
| #define SPI_OPPREFIX ((0x50 << 8) | 0x06) /* EWSR and WREN */ |
Definition at line 132 of file fast_spi_def.h.
| #define SPI_OPTYPE |
Definition at line 128 of file fast_spi_def.h.
| #define SPI_OPTYPE_0 0x01 /* Write, no address */ |
Definition at line 109 of file fast_spi_def.h.
| #define SPI_OPTYPE_1 0x03 /* Write, address required */ |
Definition at line 111 of file fast_spi_def.h.
| #define SPI_OPTYPE_2 0x02 /* Read, address required */ |
Definition at line 113 of file fast_spi_def.h.
| #define SPI_OPTYPE_3 0x00 /* Read, no address */ |
Definition at line 115 of file fast_spi_def.h.
| #define SPI_OPTYPE_4 0x03 /* Write, address required */ |
Definition at line 117 of file fast_spi_def.h.
| #define SPI_OPTYPE_5 0x00 /* Read, no address */ |
Definition at line 119 of file fast_spi_def.h.
| #define SPI_OPTYPE_6 0x03 /* Write, address required */ |
Definition at line 121 of file fast_spi_def.h.
| #define SPI_OPTYPE_7 0x02 /* Read, address required */ |
Definition at line 123 of file fast_spi_def.h.
| #define SPIBAR_BFPREG 0x00 |
Definition at line 27 of file fast_spi_def.h.
| #define SPIBAR_BFPREG_PRB_MASK 0x7fff |
Definition at line 44 of file fast_spi_def.h.
| #define SPIBAR_BFPREG_PRL_MASK (0x7fff << SPIBAR_BFPREG_PRL_SHIFT) |
Definition at line 46 of file fast_spi_def.h.
| #define SPIBAR_BFPREG_PRL_SHIFT 16 |
Definition at line 45 of file fast_spi_def.h.
| #define SPIBAR_BFPREG_SBRS (1 << 31) |
Definition at line 47 of file fast_spi_def.h.
| #define SPIBAR_DLOCK 0x0c |
Definition at line 30 of file fast_spi_def.h.
| #define SPIBAR_DLOCK_PR0LOCKDN (1 << 8) |
Definition at line 84 of file fast_spi_def.h.
| #define SPIBAR_DLOCK_PR1LOCKDN (1 << 9) |
Definition at line 85 of file fast_spi_def.h.
| #define SPIBAR_DLOCK_PR2LOCKDN (1 << 10) |
Definition at line 86 of file fast_spi_def.h.
| #define SPIBAR_DLOCK_PR3LOCKDN (1 << 11) |
Definition at line 87 of file fast_spi_def.h.
| #define SPIBAR_DLOCK_PR4LOCKDN (1 << 12) |
Definition at line 88 of file fast_spi_def.h.
| #define SPIBAR_FADDR 0x08 |
Definition at line 29 of file fast_spi_def.h.
| #define SPIBAR_FADDR_MASK 0x7ffffff |
Definition at line 81 of file fast_spi_def.h.
| #define SPIBAR_FDATA | ( | n | ) | (0x10 + ((n) & 0xf) * 4) |
Definition at line 31 of file fast_spi_def.h.
| #define SPIBAR_FDATA_FIFO_SIZE 0x40 |
Definition at line 91 of file fast_spi_def.h.
| #define SPIBAR_FDOC 0xb4 |
Definition at line 38 of file fast_spi_def.h.
| #define SPIBAR_FDOC_COMPONENT (1 << 12) |
Definition at line 94 of file fast_spi_def.h.
| #define SPIBAR_FDOC_FDSI_1 (1 << 2) |
Definition at line 95 of file fast_spi_def.h.
| #define SPIBAR_FDOD 0xb8 |
Definition at line 39 of file fast_spi_def.h.
| #define SPIBAR_FPR | ( | n | ) | (0x84 + (4 * (n))) |
Definition at line 33 of file fast_spi_def.h.
| #define SPIBAR_FPR_BASE 0x84 |
Definition at line 32 of file fast_spi_def.h.
| #define SPIBAR_FPR_MAX 5 |
Definition at line 105 of file fast_spi_def.h.
| #define SPIBAR_FPR_WPE (1 << 31) /* Flash Write protected */ |
Definition at line 104 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_AEL (1 << 2) |
Definition at line 75 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_CTL 0x04 |
Definition at line 28 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_CYCLE_4K_ERASE SPIBAR_HSFSTS_FCYCLE(3) |
Definition at line 59 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_CYCLE_64K_ERASE SPIBAR_HSFSTS_FCYCLE(4) |
Definition at line 60 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_CYCLE_RD_STATUS SPIBAR_HSFSTS_FCYCLE(8) |
Definition at line 61 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_CYCLE_READ SPIBAR_HSFSTS_FCYCLE(0) |
Definition at line 57 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_CYCLE_WRITE SPIBAR_HSFSTS_FCYCLE(2) |
Definition at line 58 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_FCERR (1 << 1) |
Definition at line 76 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_FCYCLE | ( | cyc | ) | (((cyc) << 17) & SPIBAR_HSFSTS_FCYCLE_MASK) |
Definition at line 54 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_FCYCLE_MASK (0xf << 17) |
Definition at line 53 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_FDBC | ( | n | ) | (((n) << 24) & SPIBAR_HSFSTS_FDBC_MASK) |
Definition at line 51 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_FDBC_MASK (0x3f << 24) |
Definition at line 50 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_FDONE (1 << 0) |
Definition at line 77 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_FDOPSS (1 << 13) |
Definition at line 66 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_FDV (1 << 14) |
Definition at line 65 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_FGO (1 << 16) |
Definition at line 63 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_FLOCKDN (1 << 15) |
Definition at line 64 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_PRR34_LOCKDN (1 << 12) |
Definition at line 67 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_SAF_ACTIVE (1 << 7) |
Definition at line 70 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_SAF_CE (1 << 8) |
Definition at line 69 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_SAF_DLE (1 << 4) |
Definition at line 73 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_SAF_ERROR (1 << 3) |
Definition at line 74 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_SAF_LE (1 << 6) |
Definition at line 71 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_SCIP (1 << 5) |
Definition at line 72 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_W1C_BITS 0x1ff |
Definition at line 78 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_WET (1 << 21) |
Definition at line 52 of file fast_spi_def.h.
| #define SPIBAR_HSFSTS_WRSDIS (1 << 11) |
Definition at line 68 of file fast_spi_def.h.
| #define SPIBAR_HWSEQ_XFER_TIMEOUT_MS 5000 |
Definition at line 161 of file fast_spi_def.h.
| #define SPIBAR_OPMENU_LOWER 0xa8 |
Definition at line 36 of file fast_spi_def.h.
| #define SPIBAR_OPMENU_UPPER 0xac |
Definition at line 37 of file fast_spi_def.h.
| #define SPIBAR_OPTYPE 0xa6 |
Definition at line 35 of file fast_spi_def.h.
| #define SPIBAR_PREOP 0xa4 |
Definition at line 34 of file fast_spi_def.h.
| #define SPIBAR_PTDATA 0xd0 |
Definition at line 41 of file fast_spi_def.h.
| #define SPIBAR_PTINX 0xcc |
Definition at line 40 of file fast_spi_def.h.
| #define SPIBAR_PTINX_COMP_0 (0 << 14) |
Definition at line 142 of file fast_spi_def.h.
| #define SPIBAR_PTINX_COMP_1 (1 << 14) |
Definition at line 143 of file fast_spi_def.h.
| #define SPIBAR_PTINX_HORD_JEDEC (2 << 12) |
Definition at line 146 of file fast_spi_def.h.
| #define SPIBAR_PTINX_HORD_PARAM (1 << 12) |
Definition at line 145 of file fast_spi_def.h.
| #define SPIBAR_PTINX_HORD_SFDP (0 << 12) |
Definition at line 144 of file fast_spi_def.h.
| #define SPIBAR_PTINX_IDX_MASK 0xffc |
Definition at line 147 of file fast_spi_def.h.
| #define SPIBAR_RESET_CTRL 0xf4 |
Definition at line 151 of file fast_spi_def.h.
| #define SPIBAR_RESET_CTRL_SSMC 1 /* Set_Strap Mux Select(SSMS) Bit=1*/ |
Definition at line 159 of file fast_spi_def.h.
| #define SPIBAR_RESET_DATA 0xf8 |
Definition at line 152 of file fast_spi_def.h.
| #define SPIBAR_RESET_LOCK 0xf0 |
Definition at line 150 of file fast_spi_def.h.
| #define SPIBAR_RESET_LOCK_DISABLE 0 /* Set_Strap Lock(SSL) Bit 0 = 0 */ |
Definition at line 155 of file fast_spi_def.h.
| #define SPIBAR_RESET_LOCK_ENABLE 1 /* Set_Strap Lock(SSL) Bit 0 = 1 */ |
Definition at line 156 of file fast_spi_def.h.
| #define SPIBAR_SFDP0_VSCC0 0xc4 |
Definition at line 138 of file fast_spi_def.h.
| #define SPIBAR_VSCC0_VCL (1 << 30) |
Definition at line 139 of file fast_spi_def.h.
Definition at line 24 of file fast_spi.c.
References assert, PCH_DEV_SPI, PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_MEM_ATTR_MASK, and pci_read_config32().
Referenced by _fast_spi_flash_get_ctx(), fast_spi_clear_outstanding_status(), fast_spi_get_bios_region(), fast_spi_lock_bar(), fast_spi_pr_dlock(), fast_spi_set_opcode_menu(), fast_spi_set_strap_msg_data(), and fast_spi_vscc0_lock().
1.9.1