coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
OemCustomize.c File Reference
Include dependency graph for OemCustomize.c:

Go to the source code of this file.

Macros

#define DIMMS_PER_CHANNEL   1
 

Functions

void OemPostParams (AMD_POST_PARAMS *PostParams)
 

Variables

static const PSO_ENTRY DDR4PlatformMemoryConfiguration []
 

Macro Definition Documentation

◆ DIMMS_PER_CHANNEL

#define DIMMS_PER_CHANNEL   1

Definition at line 6 of file OemCustomize.c.

Function Documentation

◆ OemPostParams()

void OemPostParams ( AMD_POST_PARAMS *  PostParams)

Definition at line 32 of file OemCustomize.c.

References DDR4PlatformMemoryConfiguration.

Variable Documentation

◆ DDR4PlatformMemoryConfiguration

const PSO_ENTRY DDR4PlatformMemoryConfiguration[]
static
Initial value:
= {
DRAM_TECHNOLOGY(ANY_SOCKET, DDR4_TECHNOLOGY),
NUMBER_OF_DIMMS_SUPPORTED(ANY_SOCKET, CHANNEL_A, 1),
NUMBER_OF_DIMMS_SUPPORTED(ANY_SOCKET, CHANNEL_B, 1),
NUMBER_OF_CHANNELS_SUPPORTED(ANY_SOCKET, MAX_DRAM_CH),
MOTHER_BOARD_LAYERS(LAYERS_6),
MEMCLK_DIS_MAP(ANY_SOCKET, CHANNEL_A, 0x01, 0x02, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00),
MEMCLK_DIS_MAP(ANY_SOCKET, CHANNEL_B, 0x01, 0x02, 0x08, 0x04,
0x00, 0x00, 0x00, 0x00),
CKE_TRI_MAP(ANY_SOCKET, CHANNEL_A, 0x01, 0x02, 0x00, 0x00),
CKE_TRI_MAP(ANY_SOCKET, CHANNEL_B, 0x05, 0x0A, 0x00, 0x00),
ODT_TRI_MAP(ANY_SOCKET, CHANNEL_A, 0x01, 0x00, 0x02, 0x00),
ODT_TRI_MAP(ANY_SOCKET, CHANNEL_B, 0x01, 0x04, 0x02, 0x08),
CS_TRI_MAP(ANY_SOCKET, CHANNEL_A, 0x01, 0x02, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00),
CS_TRI_MAP(ANY_SOCKET, CHANNEL_B, 0x01, 0x02, 0x04, 0x08, 0x00,
0x00, 0x00, 0x00),
PSO_END
}
@ CHANNEL_A
Definition: dramc_soc.h:7
@ CHANNEL_B
Definition: dramc_soc.h:8
#define MAX_DRAM_CH
Definition: chip.h:19

Definition at line 11 of file OemCustomize.c.

Referenced by OemPostParams().