3 #ifndef __NORTHBRIDGE_INTEL_SANDYBRIDGE_SANDYBRIDGE_H__
4 #define __NORTHBRIDGE_INTEL_SANDYBRIDGE_SANDYBRIDGE_H__
7 #define BASE_REV_SNB 0x00
8 #define BASE_REV_IVB 0x50
9 #define BASE_REV_MASK 0x50
24 #define HOST_BRIDGE PCI_DEV(0, 0, 0)
26 #include "registers/host_bridge.h"
30 #define AFE_PWRON 0xc24
43 #include "registers/mchbar.h"
49 #include "registers/epbar.h"
55 #include "registers/dmibar.h"
void report_memory_config(void)
bool is_sandybridge(void)
void perform_raminit(int s3resume)
void sandybridge_late_initialization(void)
@ PLATFORM_DESKTOP_SERVER
void systemagent_early_init(void)
void sandybridge_init_iommu(void)
void intel_sandybridge_finalize_smm(void)
void mainboard_early_init(int s3resume)
unsigned long northbridge_write_acpi_tables(const struct device *device, unsigned long start, struct acpi_rsdp *rsdp)
void northbridge_romstage_finalize(void)
int mainboard_should_reset_usb(int s3resume)
void early_init_dmi(void)
enum platform_type get_platform_type(void)