#include <chip.h>
Definition at line 49 of file chip.h.
◆ common_soc_config
◆ cstate_states
◆ gen1_dec
uint32_t soc_intel_xeon_sp_cpx_config::gen1_dec |
◆ gen2_dec
uint32_t soc_intel_xeon_sp_cpx_config::gen2_dec |
◆ gen3_dec
uint32_t soc_intel_xeon_sp_cpx_config::gen3_dec |
◆ gen4_dec
uint32_t soc_intel_xeon_sp_cpx_config::gen4_dec |
◆ ipc0
uint32_t soc_intel_xeon_sp_cpx_config::ipc0 |
Device Interrupt Polarity Control ipc0 - IRQ-00-31 - 1: Active low to IOAPIC, 0: Active high to IOAPIC ipc1 - IRQ-32-63 - 1: Active low to IOAPIC, 0: Active high to IOAPIC ipc2 - IRQ-64-95 - 1: Active low to IOAPIC, 0: Active high to IOAPIC ipc3 - IRQ-96-119 - 1: Active low to IOAPIC, 0: Active high to IOAPIC.
Definition at line 94 of file chip.h.
◆ ipc1
uint32_t soc_intel_xeon_sp_cpx_config::ipc1 |
◆ ipc2
uint32_t soc_intel_xeon_sp_cpx_config::ipc2 |
◆ ipc3
uint32_t soc_intel_xeon_sp_cpx_config::ipc3 |
◆ ir00_routing
uint16_t soc_intel_xeon_sp_cpx_config::ir00_routing |
Device Interrupt Routing configuration Interrupt Pin x Route.
0h = PIRQA# 1h = PIRQB# 2h = PIRQC# 3h = PIRQD# 4h = PIRQE# 5h = PIRQF# 6h = PIRQG# 7h = PIRQH#
Definition at line 81 of file chip.h.
◆ ir01_routing
uint16_t soc_intel_xeon_sp_cpx_config::ir01_routing |
◆ ir02_routing
uint16_t soc_intel_xeon_sp_cpx_config::ir02_routing |
◆ ir03_routing
uint16_t soc_intel_xeon_sp_cpx_config::ir03_routing |
◆ ir04_routing
uint16_t soc_intel_xeon_sp_cpx_config::ir04_routing |
◆ pch_pci_port
◆ pirqa_routing
uint8_t soc_intel_xeon_sp_cpx_config::pirqa_routing |
Interrupt Routing configuration If bit7 is 1, the interrupt is disabled.
Definition at line 60 of file chip.h.
◆ pirqb_routing
uint8_t soc_intel_xeon_sp_cpx_config::pirqb_routing |
◆ pirqc_routing
uint8_t soc_intel_xeon_sp_cpx_config::pirqc_routing |
◆ pirqd_routing
uint8_t soc_intel_xeon_sp_cpx_config::pirqd_routing |
◆ pirqe_routing
uint8_t soc_intel_xeon_sp_cpx_config::pirqe_routing |
◆ pirqf_routing
uint8_t soc_intel_xeon_sp_cpx_config::pirqf_routing |
◆ pirqg_routing
uint8_t soc_intel_xeon_sp_cpx_config::pirqg_routing |
◆ pirqh_routing
uint8_t soc_intel_xeon_sp_cpx_config::pirqh_routing |
◆ pstate_req_ratio
uint32_t soc_intel_xeon_sp_cpx_config::pstate_req_ratio |
◆ tcc_offset
uint32_t soc_intel_xeon_sp_cpx_config::tcc_offset |
◆ turbo_ratio_limit
uint64_t soc_intel_xeon_sp_cpx_config::turbo_ratio_limit |
◆ turbo_ratio_limit_cores
uint64_t soc_intel_xeon_sp_cpx_config::turbo_ratio_limit_cores |
◆ vtd_support
uint8_t soc_intel_xeon_sp_cpx_config::vtd_support |
◆ x2apic
uint8_t soc_intel_xeon_sp_cpx_config::x2apic |
The documentation for this struct was generated from the following file:
- src/soc/intel/xeon_sp/cpx/chip.h