coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
smihandler.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <console/console.h>
4 #include <cpu/x86/smm.h>
5 #include <device/pci.h>
7 #include <soc/pci_devs.h>
8 #include <soc/pm.h>
9 
10 /*
11  * Specific SOC SMI handler during ramstage finalize phase
12  */
14 {
15  /* SMM_FEATURE_CONTROL can only be written within SMM. */
16  printk(BIOS_DEBUG, "Lock SMM_FEATURE_CONTROL\n");
17  const pci_devfn_t dev = UBOX_DEV_PMON;
20 
21 }
22 
23 /* This is needed by common SMM code */
27 #if CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE)
29 #endif
30 };
#define SMI_STS_BITS
Definition: pm.h:51
#define TCO_STS_BIT
Definition: pm.h:63
#define PM1_STS_BIT
Definition: pm.h:68
#define APM_STS_BIT
Definition: pm.h:70
#define printk(level,...)
Definition: stdlib.h:16
static __always_inline void pci_or_config32(const struct device *dev, u16 reg, u32 ormask)
Definition: pci_ops.h:191
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition: loglevel.h:128
u32 pci_devfn_t
Definition: pci_type.h:8
const smi_handler_t southbridge_smi[SMI_STS_BITS]
Definition: smihandler.c:17
void(* smi_handler_t)(void)
Definition: smihandler.c:361
void smihandler_soc_at_finalize(void)
Definition: smihandler.c:17
void smihandler_southbridge_tco(const struct smm_save_state_ops *save_state_ops)
Definition: smihandler.c:420
void smihandler_southbridge_pm1(const struct smm_save_state_ops *save_state_ops)
Definition: smihandler.c:396
void smihandler_southbridge_apmc(const struct smm_save_state_ops *save_state_ops)
Definition: smihandler.c:367
#define SMM_FEATURE_CONTROL_LOCK
Definition: pci_devs.h:95
#define SMM_FEATURE_CONTROL
Definition: pci_devs.h:93
#define UBOX_DEV_PMON
Definition: pci_devs.h:92
#define SMM_CODE_CHK_EN
Definition: pci_devs.h:94