24 #include <soc/pci_devs.h>
27 #include <soc/iomap.h>
28 #include <soc/smbus.h>
74 for (node = 0; node < CONFIG_MAX_CPUS; node++) {
80 if (!(io_misc_info & (1 << 0)))
83 if (io_misc_info & (1 << 4))
86 if (((io_misc_info >> 16) & 0xff) !=
APM_CNT)
109 for (slot = 0; slot < 0x20; slot++) {
110 for (func = 0; func < 8; func++) {
119 if (
val == 0xffffffff ||
val == 0x00000000 ||
120 val == 0x0000ffff ||
val == 0xffff0000)
161 slp_typ = acpi_sleep_from_pm1(reg32);
181 if (
CONFIG(SOC_INTEL_COMMON_BLOCK_UART))
207 mdelay(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS);
255 sub_command = (save_state_ops->
get_reg(io_smi,
RAX) >> 8)
259 reg_ebx = save_state_ops->
get_reg(io_smi,
RBX);
291 sub_command = (save_state_ops->
get_reg(io_smi,
RAX) >> 8) & 0xff;
294 reg_ebx = save_state_ops->
get_reg(io_smi,
RBX);
335 static int finalize_done;
343 if (
CONFIG(SPI_FLASH_SMM))
347 if (
CONFIG(BOOTMEDIA_SMM_BWP)) {
360 if (
CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_LOCK_GPIO_PADS))
532 if (!(smi_sts & (1 << i)))
539 "SMI_STS[%d] occurred, but no "
540 "handler available.\n", i);
547 em64t100_smm_state_save_area_t *smm_state =
state;
548 return smm_state->io_misc_info;
554 em64t100_smm_state_save_area_t *smm_state =
state;
558 value = smm_state->rax;
561 value = smm_state->rbx;
564 value = smm_state->rcx;
567 value = smm_state->rdx;
578 em64t100_smm_state_save_area_t *smm_state =
state;
581 smm_state->rax =
val;
584 smm_state->rbx =
val;
587 smm_state->rcx =
val;
590 smm_state->rdx =
val;
599 em64t101_smm_state_save_area_t *smm_state =
state;
600 return smm_state->io_misc_info;
606 em64t101_smm_state_save_area_t *smm_state =
state;
610 value = smm_state->rax;
613 value = smm_state->rbx;
616 value = smm_state->rcx;
619 value = smm_state->rdx;
630 em64t101_smm_state_save_area_t *smm_state =
state;
633 smm_state->rax =
val;
636 smm_state->rbx =
val;
639 smm_state->rcx =
val;
642 smm_state->rdx =
val;
static __always_inline void hlt(void)
#define ELOG_TYPE_ACPI_ENTER
#define ELOG_TYPE_POWER_BUTTON
#define printk(level,...)
void __weak mainboard_smi_finalize(void)
void __weak southbridge_smi_handler(void)
void __weak mainboard_smi_sleep(u8 slp_typ)
int __weak mainboard_smi_apmc(u8 data)
void * smm_get_save_state(int cpu)
void mdelay(unsigned int msecs)
uint32_t smmstore_exec(uint8_t command, void *param)
void fast_spi_enable_wp(void)
bool fast_spi_clear_sync_smi_status(void)
bool fast_spi_wpd_status(void)
void fast_spi_disable_wp(void)
u32 gsmi_exec(u8 command, u32 *param)
#define MSR_SPCL_CHIPSET_USAGE
static __always_inline void wrmsr(unsigned int index, msr_t msr)
#define APM_CNT_ELOG_GSMI
#define APM_CNT_ACPI_DISABLE
#define APM_CNT_ACPI_ENABLE
static __always_inline uint32_t read32p(const uintptr_t addr)
static __always_inline u16 pci_read_config16(const struct device *dev, u16 reg)
static __always_inline u32 pci_read_config32(const struct device *dev, u16 reg)
static __always_inline u8 pci_read_config8(const struct device *dev, u16 reg)
static __always_inline void pci_write_config16(const struct device *dev, u16 reg, u16 val)
static int elog_gsmi_add_event(u8 event_type)
static int elog_gsmi_add_event_byte(u8 event_type, u8 data)
#define ACPI_BASE_ADDRESS
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
#define BIOS_CRIT
BIOS_CRIT - Recovery unlikely.
#define BIOS_SPEW
BIOS_SPEW - Excessively verbose output.
void mainboard_smi_espi_handler(void)
void mainboard_smi_gpi_handler(const struct gpi_status *sts)
#define PCI_HEADER_TYPE_CARDBUS
#define PCI_SECONDARY_BUS
#define PCI_COMMAND_MASTER
#define PCI_HEADER_TYPE_BRIDGE
#define PCI_DEV(SEGBUS, DEV, FN)
const struct smm_save_state_ops *legacy_ops __weak
const smi_handler_t southbridge_smi[SMI_STS_BITS]
int smihandler_soc_disable_busmaster(pci_devfn_t dev)
const struct smm_save_state_ops * get_smm_save_state_ops(void)
void southbridge_smi_set_eos(void)
void smihandler_soc_at_finalize(void)
int gpio_lock_pads(const struct gpio_lock_config *pad_list, const size_t count)
void gpi_clear_get_smi_status(struct gpi_status *sts)
void pmc_clear_all_gpe_status(void)
uint16_t pmc_read_pm1_enable(void)
void pmc_disable_all_gpe(void)
void pmc_set_power_failure_state(bool target_on)
uint16_t pmc_clear_pm1_status(void)
void pmc_disable_pm1_control(uint32_t mask)
uint32_t pmc_read_pm1_control(void)
void pmc_disable_smi(uint32_t mask)
uint32_t pmc_clear_tco_status(void)
uint32_t pmc_get_smi_en(void)
uint32_t pmc_clear_smi_status(void)
void pmc_enable_pm1_control(uint32_t mask)
void pmc_enable_smi(uint32_t mask)
bool uart_is_controller_initialized(void)
void smihandler_southbridge_gpe0(const struct smm_save_state_ops *save_state_ops)
static void finalize(void)
void smihandler_southbridge_sleep(const struct smm_save_state_ops *save_state_ops)
static uint32_t em64t101_smm_save_state_get_io_misc_info(void *state)
__weak const struct gpio_lock_config * soc_gpio_lock_config(size_t *num)
static uint64_t em64t100_smm_save_state_get_reg(void *state, enum smm_reg reg)
static void southbridge_smi_gsmi(const struct smm_save_state_ops *save_state_ops)
static void busmaster_disable_on_bus(int bus)
void smihandler_southbridge_gpi(const struct smm_save_state_ops *save_state_ops)
static void em64t100_smm_save_state_set_reg(void *state, enum smm_reg reg, uint64_t val)
const struct smm_save_state_ops em64t101_smm_ops
void smihandler_southbridge_periodic(const struct smm_save_state_ops *save_state_ops)
void smihandler_southbridge_tco(const struct smm_save_state_ops *save_state_ops)
static void soc_lock_gpios(void)
void smihandler_southbridge_espi(const struct smm_save_state_ops *save_state_ops)
static uint64_t em64t101_smm_save_state_get_reg(void *state, enum smm_reg reg)
static void * find_save_state(const struct smm_save_state_ops *save_state_ops, int cmd)
static void set_insmm_sts(const bool enable_writes)
const struct smm_save_state_ops em64t100_smm_ops
static uint32_t em64t100_smm_save_state_get_io_misc_info(void *state)
void smihandler_southbridge_pm1(const struct smm_save_state_ops *save_state_ops)
static void southbridge_smi_store(const struct smm_save_state_ops *save_state_ops)
static void em64t101_smm_save_state_set_reg(void *state, enum smm_reg reg, uint64_t val)
void smihandler_southbridge_apmc(const struct smm_save_state_ops *save_state_ops)
unsigned long long uint64_t
int(* set_reg)(const enum cpu_reg reg, const int node, void *in, const uint8_t length)
int(* get_reg)(const enum cpu_reg reg, const int node, void *out, const uint8_t length)
uint32_t(* get_io_misc_info)(void *state)