coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <console/console.h>
#include <amdblocks/acpimmio.h>
#include <amdblocks/i2c.h>
#include <soc/i2c.h>
#include <soc/iomap.h>
#include <soc/pci_devs.h>
#include <soc/southbridge.h>
#include "chip.h"
Go to the source code of this file.
Functions | |
void | i2c_set_bar (unsigned int bus, uintptr_t bar) |
void | soc_i2c_misc_init (unsigned int bus, const struct dw_i2c_bus_config *cfg) |
const struct soc_i2c_ctrlr_info * | soc_get_i2c_ctrlr_info (size_t *num_ctrlrs) |
const struct dw_i2c_bus_config * | soc_get_i2c_bus_config (size_t *num_buses) |
Variables | |
static struct soc_i2c_ctrlr_info | i2c_ctrlr [I2C_CTRLR_COUNT] |
Definition at line 30 of file i2c.c.
References ARRAY_SIZE, soc_i2c_ctrlr_info::bar, BIOS_ERR, i2c_ctrlr, and printk.
const struct dw_i2c_bus_config* soc_get_i2c_bus_config | ( | size_t * | num_buses | ) |
Definition at line 58 of file i2c.c.
References ARRAY_SIZE, config, and config_of_soc.
const struct soc_i2c_ctrlr_info* soc_get_i2c_ctrlr_info | ( | size_t * | num_ctrlrs | ) |
Definition at line 52 of file i2c.c.
References ARRAY_SIZE, and i2c_ctrlr.
void soc_i2c_misc_init | ( | unsigned int | bus, |
const struct dw_i2c_bus_config * | cfg | ||
) |
Definition at line 41 of file i2c.c.
References fch_i2c_pad_init(), I2C_PAD_RX_3_3V, i2c_pad_control::rx_level, and dw_i2c_bus_config::speed.
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Definition at line 1 of file i2c.c.
Referenced by i2c_set_bar(), and soc_get_i2c_ctrlr_info().