coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
brd_gpio_early.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <soc/gpio.h>
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static
const
struct
pad_config
early_gpio_table
[] = {
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/* LPC */
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PAD_CFG_NF
(
LPC_ILB_SERIRQ
, UP_20K, DEEP, NF1),
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PAD_CFG_NF
(
LPC_CLKRUNB
, UP_20K, DEEP, NF1),
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PAD_CFG_NF
(
LPC_AD0
, UP_20K, DEEP, NF1),
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PAD_CFG_NF
(
LPC_AD1
, UP_20K, DEEP, NF1),
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PAD_CFG_NF
(
LPC_AD2
, UP_20K, DEEP, NF1),
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PAD_CFG_NF
(
LPC_AD3
, UP_20K, DEEP, NF1),
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PAD_CFG_NF
(
LPC_FRAMEB
, NATIVE, DEEP, NF1),
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PAD_CFG_NF
(
LPC_CLKOUT0
, UP_20K, DEEP, NF1),
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PAD_CFG_NF
(
LPC_CLKOUT1
, UP_20K, DEEP, NF1),
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/* UART */
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PAD_CFG_NF
(
GPIO_46
, NATIVE, DEEP, NF1),
/* UART2 RX */
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PAD_CFG_NF
(
GPIO_47
, NATIVE, DEEP, NF1),
/* UART2 TX */
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};
early_gpio_table
static const struct pad_config early_gpio_table[]
Definition:
brd_gpio_early.h:5
LPC_AD2
#define LPC_AD2
Definition:
gpio_apl.h:312
LPC_AD0
#define LPC_AD0
Definition:
gpio_apl.h:310
GPIO_46
#define GPIO_46
Definition:
gpio_apl.h:111
LPC_AD1
#define LPC_AD1
Definition:
gpio_apl.h:311
GPIO_47
#define GPIO_47
Definition:
gpio_apl.h:112
LPC_CLKOUT1
#define LPC_CLKOUT1
Definition:
gpio_apl.h:309
LPC_AD3
#define LPC_AD3
Definition:
gpio_apl.h:313
LPC_CLKRUNB
#define LPC_CLKRUNB
Definition:
gpio_apl.h:314
LPC_FRAMEB
#define LPC_FRAMEB
Definition:
gpio_apl.h:315
LPC_ILB_SERIRQ
#define LPC_ILB_SERIRQ
Definition:
gpio_apl.h:307
LPC_CLKOUT0
#define LPC_CLKOUT0
Definition:
gpio_apl.h:308
PAD_CFG_NF
#define PAD_CFG_NF(pad, pull, rst, func)
Definition:
gpio_defs.h:197
pad_config
Definition:
gpio.h:75
src
mainboard
intel
leafhill
brd_gpio_early.h
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