coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
nvs.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef SOUTHBRIDGE_INTEL_I82801GX_NVS_H
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#define SOUTHBRIDGE_INTEL_I82801GX_NVS_H
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#include <
stdint.h
>
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struct
__packed
global_nvs
{
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/* Miscellaneous */
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u16
unused_was_osys;
/* 0x00 - Operating System */
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u8
smif;
/* 0x02 - SMI function call ("TRAP") */
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u8
unused_was_prm0;
/* 0x03 - SMI function call parameter */
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u8
unused_was_prm1;
/* 0x04 - SMI function call parameter */
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u8
scif;
/* 0x05 - SCI function call (via _L00) */
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u8
unused_was_prm2;
/* 0x06 - SCI function call parameter */
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u8
unused_was_prm3;
/* 0x07 - SCI function call parameter */
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u8
unused_was_lckf;
/* 0x08 - Global Lock function for EC */
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u8
unused_was_prm4;
/* 0x09 - Lock function parameter */
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u8
unused_was_prm5;
/* 0x0a - Lock function parameter */
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u32
p80d;
/* 0x0b - Debug port (IO 0x80) value */
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u8
lids;
/* 0x0f - LID state (open = 1) */
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u8
unused_was_pwrs;
/* 0x10 - Power state (AC = 1) */
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u8
dbgs
;
/* 0x11 - Debug state */
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u8
linx
;
/* 0x12 - Linux OS */
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u8
dckn
;
/* 0x13 - PCIe docking state */
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/* Thermal policy */
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u8
actt
;
/* 0x14 - active trip point */
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u8
tpsv;
/* 0x15 - passive trip point */
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u8
tc1v
;
/* 0x16 - passive trip point TC1 */
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u8
tc2v
;
/* 0x17 - passive trip point TC2 */
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u8
tspv
;
/* 0x18 - passive trip point TSP */
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u8
tcrt;
/* 0x19 - critical trip point */
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u8
dtse
;
/* 0x1a - Digital Thermal Sensor enable */
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u8
dts1
;
/* 0x1b - DT sensor 1 */
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u8
flvl;
/* 0x1c - current fan level */
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u8
rsvd2;
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/* Battery Support */
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u8
bnum
;
/* 0x1e - number of batteries */
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u8
b0sc
, b1sc, b2sc;
/* 0x1f-0x21 - stored capacity */
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u8
b0ss
, b1ss, b2ss;
/* 0x22-0x24 - stored status */
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u8
rsvd3[3];
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/* Processor Identification */
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u8
unused_was_apic;
/* 0x28 - APIC enabled */
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u8
unused_was_mpen;
/* 0x29 - MP capable/enabled */
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u8
pcp0;
/* 0x2a - PDC CPU/CORE 0 */
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u8
pcp1;
/* 0x2b - PDC CPU/CORE 1 */
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u8
ppcm;
/* 0x2c - Max. PPC state */
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u8
rsvd4[5];
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/* Super I/O & CMOS config */
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u8
natp;
/* 0x32 - SIO type */
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u8
cmap
;
/* 0x33 - */
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u8
cmbp
;
/* 0x34 - */
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u8
lptp
;
/* 0x35 - LPT port */
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u8
fdcp
;
/* 0x36 - Floppy Disk Controller */
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u8
rfdv
;
/* 0x37 - */
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u8
hotk
;
/* 0x38 - Hot Key */
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u8
rtcf
;
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u8
util
;
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u8
acin
;
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/* Integrated Graphics Device */
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u8
igds;
/* 0x3c - IGD state */
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u8
tlst;
/* 0x3d - Display Toggle List Pointer */
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u8
cadl
;
/* 0x3e - currently attached devices */
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u8
padl;
/* 0x3f - previously attached devices */
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u8
rsvd5[36];
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/* Backlight Control */
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u8
blcs;
/* 0x64 - Backlight Control possible */
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u8
brtl;
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u8
odds;
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u8
rsvd6[0x7];
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/* Ambient Light Sensors*/
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u8
alse;
/* 0x6e - ALS enable */
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u8
alaf;
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u8
llow;
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u8
lhih;
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u8
rsvd7[0x6];
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/* EMA */
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u8
emae;
/* 0x78 - EMA enable */
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u16
emap;
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u16
emal;
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u8
rsvd8[0x5];
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/* MEF */
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u8
mefe;
/* 0x82 - MEF enable */
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u8
rsvd9[0x9];
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/* TPM support */
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u8
tpmp;
/* 0x8c - TPM */
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u8
tpme;
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u8
rsvd10[8];
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/* SATA */
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u8
gtf0[7];
/* 0x96 - GTF task file buffer for port 0 */
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u8
gtf1[7];
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u8
gtf2[7];
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u8
idem;
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u8
idet;
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u8
rsvd11[67];
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/* Mainboard specific */
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u8
dock
;
/* 0xf0 - Docking Status */
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u8
bten
;
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u32
cbmc;
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/* Required for future unified acpi_save_wake_source. */
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u32
pm1i;
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u32
gpei;
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};
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#endif
/* SOUTHBRIDGE_INTEL_I82801GX_NVS_H */
stdint.h
u32
uint32_t u32
Definition:
stdint.h:51
u16
uint16_t u16
Definition:
stdint.h:48
u8
uint8_t u8
Definition:
stdint.h:45
__packed
Definition:
x86.c:23
__packed::cadl
u32 cadl
Definition:
opregion.h:72
global_nvs
Definition:
nvs.h:14
global_nvs::tc1v
u8 tc1v
Definition:
nvs.h:29
global_nvs::dbgs
u8 dbgs
Definition:
nvs.h:23
global_nvs::cmbp
u8 cmbp
Definition:
nvs.h:52
global_nvs::dckn
u8 dckn
Definition:
nvs.h:25
global_nvs::b0ss
u8 b0ss
Definition:
nvs.h:40
global_nvs::linx
u8 linx
Definition:
nvs.h:24
global_nvs::tc2v
u8 tc2v
Definition:
nvs.h:30
global_nvs::util
u8 util
Definition:
nvs.h:58
global_nvs::bnum
u8 bnum
Definition:
nvs.h:38
global_nvs::dtse
u8 dtse
Definition:
nvs.h:33
global_nvs::hotk
u8 hotk
Definition:
nvs.h:56
global_nvs::cmap
u8 cmap
Definition:
nvs.h:51
global_nvs::acin
u8 acin
Definition:
nvs.h:59
global_nvs::dts1
u8 dts1
Definition:
nvs.h:34
global_nvs::fdcp
u8 fdcp
Definition:
nvs.h:54
global_nvs::dock
u8 dock
Definition:
nvs.h:97
global_nvs::rtcf
u8 rtcf
Definition:
nvs.h:57
global_nvs::tspv
u8 tspv
Definition:
nvs.h:31
global_nvs::rfdv
u8 rfdv
Definition:
nvs.h:55
global_nvs::bten
u8 bten
Definition:
nvs.h:98
global_nvs::actt
u8 actt
Definition:
nvs.h:27
global_nvs::b0sc
u8 b0sc
Definition:
nvs.h:39
global_nvs::lptp
u8 lptp
Definition:
nvs.h:53
src
southbridge
intel
i82801gx
include
soc
nvs.h
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