coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gsbi.c
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1 /* SPDX-License-Identifier: BSD-3-Clause */
2 
3 #include <device/mmio.h>
4 #include <soc/iomap.h>
5 #include <soc/gsbi.h>
6 #include <console/console.h>
7 
8 static inline void *gsbi_ctl_reg_addr(gsbi_id_t gsbi_id)
9 {
10  switch (gsbi_id) {
11  case GSBI_ID_1:
12  return GSBI1_CTL_REG;
13  case GSBI_ID_2:
14  return GSBI2_CTL_REG;
15  case GSBI_ID_3:
16  return GSBI3_CTL_REG;
17  case GSBI_ID_4:
18  return GSBI4_CTL_REG;
19  case GSBI_ID_5:
20  return GSBI5_CTL_REG;
21  case GSBI_ID_6:
22  return GSBI6_CTL_REG;
23  case GSBI_ID_7:
24  return GSBI7_CTL_REG;
25  default:
26  printk(BIOS_ERR, "Unsupported GSBI%d\n", gsbi_id);
27  return 0;
28  }
29 }
30 
32 {
33  unsigned int reg_val;
34  unsigned int m = 1;
35  unsigned int n = 4;
36  unsigned int pre_div = 4;
37  unsigned int src = 3;
38  unsigned int mnctr_mode = 2;
39  void *gsbi_ctl = gsbi_ctl_reg_addr(gsbi_id);
40 
41  if (!gsbi_ctl)
42  return GSBI_ID_ERROR;
43 
44  write32(GSBI_HCLK_CTL(gsbi_id),
46 
47  if (gsbi_init_board(gsbi_id))
48  return GSBI_UNSUPPORTED;
49 
50  write32(GSBI_QUP_APSS_NS_REG(gsbi_id), 0);
51  write32(GSBI_QUP_APSS_MD_REG(gsbi_id), 0);
52 
53  reg_val = ((m & GSBI_QUP_APPS_M_MASK) << GSBI_QUP_APPS_M_SHFT) |
55  write32(GSBI_QUP_APSS_MD_REG(gsbi_id), reg_val);
56 
57  reg_val = (((~(n - m)) & GSBI_QUP_APPS_N_MASK) <<
59  ((mnctr_mode & GSBI_QUP_APPS_MNCTR_MODE_MSK) <<
61  (((pre_div - 1) & GSBI_QUP_APPS_PRE_DIV_MSK) <<
64  write32(GSBI_QUP_APSS_NS_REG(gsbi_id), reg_val);
65 
66  reg_val |= (1 << GSBI_QUP_APPS_ROOT_ENA_SFT) |
68  write32(GSBI_QUP_APSS_NS_REG(gsbi_id), reg_val);
69 
70  reg_val |= (1 << GSBI_QUP_APPS_BRANCH_ENA_SFT);
71  write32(GSBI_QUP_APSS_NS_REG(gsbi_id), reg_val);
72 
73  /*Select i2c protocol*/
74  write32(gsbi_ctl,
76 
77  return GSBI_SUCCESS;
78 }
static void write32(void *addr, uint32_t val)
Definition: mmio.h:40
#define printk(level,...)
Definition: stdlib.h:16
gsbi_id_t
Definition: gsbi.h:18
@ GSBI_ID_2
Definition: gsbi.h:20
@ GSBI_ID_1
Definition: gsbi.h:19
@ GSBI_ID_5
Definition: gsbi.h:23
@ GSBI_ID_6
Definition: gsbi.h:24
@ GSBI_ID_7
Definition: gsbi.h:25
@ GSBI_ID_3
Definition: gsbi.h:21
@ GSBI_ID_4
Definition: gsbi.h:22
gsbi_return_t
Definition: gsbi.h:28
@ GSBI_UNSUPPORTED
Definition: gsbi.h:32
@ GSBI_SUCCESS
Definition: gsbi.h:29
@ GSBI_ID_ERROR
Definition: gsbi.h:30
gsbi_protocol_t
Definition: gsbi.h:35
#define BIOS_ERR
BIOS_ERR - System in incomplete state.
Definition: loglevel.h:72
int gsbi_init_board(gsbi_id_t gsbi_id)
Definition: gsbi.c:9
#define GSBI_HCLK_CTL_GATE_ENA
Definition: iomap.h:108
#define GSBI_QUP_APPS_N_MASK
Definition: iomap.h:115
#define GSBI_HCLK_CTL_BRANCH_ENA
Definition: iomap.h:109
#define GSBI_CTL_PROTO_I2C
Definition: iomap.h:105
#define GSBI_QUP_APPS_MNCTR_EN_SFT
Definition: iomap.h:118
#define GSBI_QUP_APPS_BRANCH_ENA_SFT
Definition: iomap.h:117
#define GSBI2_CTL_REG
Definition: iomap.h:90
#define GSBI_QUP_APPS_PRE_DIV_SFT
Definition: iomap.h:122
#define GSBI3_CTL_REG
Definition: iomap.h:91
#define GSBI_QUP_APSS_MD_REG(gsbi_n)
Definition: iomap.h:125
#define GSBI_QUP_APPS_M_MASK
Definition: iomap.h:111
#define GSBI_QUP_APPS_ROOT_ENA_SFT
Definition: iomap.h:116
#define GSBI_QUP_APSS_NS_REG(gsbi_n)
Definition: iomap.h:127
#define GSBI5_CTL_REG
Definition: iomap.h:93
#define GSBI_QUP_APPS_M_SHFT
Definition: iomap.h:110
#define GSBI7_CTL_REG
Definition: iomap.h:95
#define GSBI_QUP_APPS_MNCTR_MODE_SFT
Definition: iomap.h:120
#define GSBI_CTL_PROTO_CODE_SFT
Definition: iomap.h:106
#define GSBI1_CTL_REG
Definition: iomap.h:89
#define GSBI_CTL_PROTO_CODE_MSK
Definition: iomap.h:107
#define GSBI6_CTL_REG
Definition: iomap.h:94
#define GSBI_HCLK_CTL(n)
Definition: iomap.h:129
#define GSBI_QUP_APPS_MNCTR_MODE_MSK
Definition: iomap.h:119
#define GSBI_QUP_APPS_PRE_DIV_MSK
Definition: iomap.h:121
#define GSBI4_CTL_REG
Definition: iomap.h:92
#define GSBI_QUP_APPS_SRC_SEL_MSK
Definition: iomap.h:123
#define GSBI_QUP_APPS_D_SHFT
Definition: iomap.h:112
#define GSBI_QUP_APPS_D_MASK
Definition: iomap.h:113
#define GSBI_QUP_APPS_N_SHFT
Definition: iomap.h:114
static void * gsbi_ctl_reg_addr(gsbi_id_t gsbi_id)
Definition: gsbi.c:8
gsbi_return_t gsbi_init(gsbi_id_t gsbi_id, gsbi_protocol_t protocol)
Definition: gsbi.c:31
#define m(clkreg, src_bits, pmcreg, dst_bits)