coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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dptx_reg.h File Reference
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Macros

#define TOP_OFFSET   0x2000
 
#define ENC0_OFFSET   0x3000
 
#define ENC1_OFFSET   0x3200
 
#define TRANS_OFFSET   0x3400
 
#define AUX_OFFSET   0x3600
 
#define SEC_OFFSET   0x4000
 
#define REG_3000_DP_ENCODER0_P0   0x3000
 
#define LANE_NUM_DP_ENCODER0_P0_FLDMASK   0x3
 
#define LANE_NUM_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define LANE_NUM_DP_ENCODER0_P0_FLDMASK_LEN   2
 
#define VIDEO_MUTE_SW_DP_ENCODER0_P0_FLDMASK   0x4
 
#define VIDEO_MUTE_SW_DP_ENCODER0_P0_FLDMASK_POS   2
 
#define VIDEO_MUTE_SW_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define VIDEO_MUTE_SEL_DP_ENCODER0_P0_FLDMASK   0x8
 
#define VIDEO_MUTE_SEL_DP_ENCODER0_P0_FLDMASK_POS   3
 
#define VIDEO_MUTE_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define ENHANCED_FRAME_EN_DP_ENCODER0_P0_FLDMASK   0x10
 
#define ENHANCED_FRAME_EN_DP_ENCODER0_P0_FLDMASK_POS   4
 
#define ENHANCED_FRAME_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define HDCP_FRAME_EN_DP_ENCODER0_P0_FLDMASK   0x20
 
#define HDCP_FRAME_EN_DP_ENCODER0_P0_FLDMASK_POS   5
 
#define HDCP_FRAME_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define IDP_EN_DP_ENCODER0_P0_FLDMASK   0x40
 
#define IDP_EN_DP_ENCODER0_P0_FLDMASK_POS   6
 
#define IDP_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define BS_SYMBOL_CNT_RESET_DP_ENCODER0_P0_FLDMASK   0x80
 
#define BS_SYMBOL_CNT_RESET_DP_ENCODER0_P0_FLDMASK_POS   7
 
#define BS_SYMBOL_CNT_RESET_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define MIXER_DUMMY_DATA_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define MIXER_DUMMY_DATA_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define MIXER_DUMMY_DATA_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3004_DP_ENCODER0_P0   0x3004
 
#define MIXER_STUFF_DUMMY_DATA_DP_ENCODER0_P0_FLDMASK   0xff
 
#define MIXER_STUFF_DUMMY_DATA_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define MIXER_STUFF_DUMMY_DATA_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define VIDEO_M_CODE_SEL_DP_ENCODER0_P0_FLDMASK   0x100
 
#define VIDEO_M_CODE_SEL_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define VIDEO_M_CODE_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define DP_TX_ENCODER_4P_RESET_SW_DP_ENCODER0_P0_FLDMASK   0x200
 
#define DP_TX_ENCODER_4P_RESET_SW_DP_ENCODER0_P0_FLDMASK_POS   9
 
#define DP_TX_ENCODER_4P_RESET_SW_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define MIXER_RESET_SW_DP_ENCODER0_P0_FLDMASK   0x400
 
#define MIXER_RESET_SW_DP_ENCODER0_P0_FLDMASK_POS   10
 
#define MIXER_RESET_SW_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define VIDEO_RESET_SW_DP_ENCODER0_P0_FLDMASK   0x800
 
#define VIDEO_RESET_SW_DP_ENCODER0_P0_FLDMASK_POS   11
 
#define VIDEO_RESET_SW_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define VIDEO_PATTERN_GEN_RESET_SW_DP_ENCODER0_P0_FLDMASK   0x1000
 
#define VIDEO_PATTERN_GEN_RESET_SW_DP_ENCODER0_P0_FLDMASK_POS   12
 
#define VIDEO_PATTERN_GEN_RESET_SW_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define SDP_RESET_SW_DP_ENCODER0_P0_FLDMASK   0x2000
 
#define SDP_RESET_SW_DP_ENCODER0_P0_FLDMASK_POS   13
 
#define SDP_RESET_SW_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define DP_TX_MUX_DP_ENCODER0_P0_FLDMASK   0x4000
 
#define DP_TX_MUX_DP_ENCODER0_P0_FLDMASK_POS   14
 
#define DP_TX_MUX_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define MIXER_FSM_RESET_DP_ENCODER0_P0_FLDMASK   0x8000
 
#define MIXER_FSM_RESET_DP_ENCODER0_P0_FLDMASK_POS   15
 
#define MIXER_FSM_RESET_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define REG_3008_DP_ENCODER0_P0   0x3008
 
#define VIDEO_M_CODE_SW_0_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define VIDEO_M_CODE_SW_0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VIDEO_M_CODE_SW_0_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_300C_DP_ENCODER0_P0   0x300C
 
#define VIDEO_M_CODE_SW_1_DP_ENCODER0_P0_FLDMASK   0xff
 
#define VIDEO_M_CODE_SW_1_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VIDEO_M_CODE_SW_1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define VIDEO_M_CODE_PULSE_DP_ENCODER0_P0_FLDMASK   0x100
 
#define VIDEO_M_CODE_PULSE_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define VIDEO_M_CODE_PULSE_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define COMPRESSEDSTREAM_FLAG_DP_ENCODER0_P0_FLDMASK   0x200
 
#define COMPRESSEDSTREAM_FLAG_DP_ENCODER0_P0_FLDMASK_POS   9
 
#define COMPRESSEDSTREAM_FLAG_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define SDP_SPLIT_EN_DP_ENCODER0_P0_FLDMASK   0x400
 
#define SDP_SPLIT_EN_DP_ENCODER0_P0_FLDMASK_POS   10
 
#define SDP_SPLIT_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define SDP_SPLIT_FIFO_RST_DP_ENCODER0_P0_FLDMASK   0x800
 
#define SDP_SPLIT_FIFO_RST_DP_ENCODER0_P0_FLDMASK_POS   11
 
#define SDP_SPLIT_FIFO_RST_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define VIDEO_M_CODE_MULT_DIV_SEL_DP_ENCODER0_P0_FLDMASK   0x7000
 
#define VIDEO_M_CODE_MULT_DIV_SEL_DP_ENCODER0_P0_FLDMASK_POS   12
 
#define VIDEO_M_CODE_MULT_DIV_SEL_DP_ENCODER0_P0_FLDMASK_LEN   3
 
#define SDP_AUDIO_ONE_SAMPLE_MODE_DP_ENCODER0_P0_FLDMASK   0x8000
 
#define SDP_AUDIO_ONE_SAMPLE_MODE_DP_ENCODER0_P0_FLDMASK_POS   15
 
#define SDP_AUDIO_ONE_SAMPLE_MODE_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define REG_3010_DP_ENCODER0_P0   0x3010
 
#define HTOTAL_SW_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define HTOTAL_SW_DP_ENCODER0_P0_FLDMASK_PO   0
 
#define HTOTAL_SW_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_3014_DP_ENCODER0_P0   0x3014
 
#define VTOTAL_SW_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define VTOTAL_SW_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VTOTAL_SW_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_3018_DP_ENCODER0_P0   0x3018
 
#define HSTART_SW_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define HSTART_SW_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define HSTART_SW_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_301C_DP_ENCODER0_P0   0x301C
 
#define VSTART_SW_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define VSTART_SW_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VSTART_SW_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_3020_DP_ENCODER0_P0   0x3020
 
#define HWIDTH_SW_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define HWIDTH_SW_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define HWIDTH_SW_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_3024_DP_ENCODER0_P0   0x3024
 
#define VHEIGHT_SW_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define VHEIGHT_SW_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VHEIGHT_SW_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_3028_DP_ENCODER0_P0   0x3028
 
#define HSW_SW_DP_ENCODER0_P0_FLDMASK   0x7fff
 
#define HSW_SW_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define HSW_SW_DP_ENCODER0_P0_FLDMASK_LEN   15
 
#define HSP_SW_DP_ENCODER0_P0_FLDMASK   0x8000
 
#define HSP_SW_DP_ENCODER0_P0_FLDMASK_POS   15
 
#define HSP_SW_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define REG_302C_DP_ENCODER0_P0   0x302C
 
#define VSW_SW_DP_ENCODER0_P0_FLDMASK   0x7fff
 
#define VSW_SW_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VSW_SW_DP_ENCODER0_P0_FLDMASK_LEN   15
 
#define VSP_SW_DP_ENCODER0_P0_FLDMASK   0x8000
 
#define VSP_SW_DP_ENCODER0_P0_FLDMASK_POS   15
 
#define VSP_SW_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define REG_3030_DP_ENCODER0_P0   0x3030
 
#define HTOTAL_SEL_DP_ENCODER0_P0_FLDMASK   0x1
 
#define HTOTAL_SEL_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define HTOTAL_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define VTOTAL_SEL_DP_ENCODER0_P0_FLDMASK   0x2
 
#define VTOTAL_SEL_DP_ENCODER0_P0_FLDMASK_POS   1
 
#define VTOTAL_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define HSTART_SEL_DP_ENCODER0_P0_FLDMASK   0x4
 
#define HSTART_SEL_DP_ENCODER0_P0_FLDMASK_POS   2
 
#define HSTART_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define VSTART_SEL_DP_ENCODER0_P0_FLDMASK   0x8
 
#define VSTART_SEL_DP_ENCODER0_P0_FLDMASK_POS   3
 
#define VSTART_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define HWIDTH_SEL_DP_ENCODER0_P0_FLDMASK   0x10
 
#define HWIDTH_SEL_DP_ENCODER0_P0_FLDMASK_POS   4
 
#define HWIDTH_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define VHEIGHT_SEL_DP_ENCODER0_P0_FLDMASK   0x20
 
#define VHEIGHT_SEL_DP_ENCODER0_P0_FLDMASK_POS   5
 
#define VHEIGHT_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define HSP_SEL_DP_ENCODER0_P0_FLDMASK   0x40
 
#define HSP_SEL_DP_ENCODER0_P0_FLDMASK_POS   6
 
#define HSP_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define HSW_SEL_DP_ENCODER0_P0_FLDMASK   0x80
 
#define HSW_SEL_DP_ENCODER0_P0_FLDMASK_POS   7
 
#define HSW_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define VSP_SEL_DP_ENCODER0_P0_FLDMASK   0x100
 
#define VSP_SEL_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define VSP_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define VSW_SEL_DP_ENCODER0_P0_FLDMASK   0x200
 
#define VSW_SEL_DP_ENCODER0_P0_FLDMASK_POS   9
 
#define VSW_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define TX_VBID_SW_EN_DP_ENCODER0_P0_FLDMASK   0x400
 
#define TX_VBID_SW_EN_DP_ENCODER0_P0_FLDMASK_POS   10
 
#define TX_VBID_SW_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define VBID_AUDIO_MUTE_FLAG_SW_DP_ENCODER0_P0_FLDMASK   0x800
 
#define VBID_AUDIO_MUTE_SW_DP_ENCODER0_P0_FLDMASK_POS   11
 
#define VBID_AUDIO_MUTE_FLAG_SW_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define VBID_AUDIO_MUTE_FLAG_SEL_DP_ENCODER0_P0_FLDMASK   0x1000
 
#define VBID_AUDIO_MUTE_SEL_DP_ENCODER0_P0_FLDMASK_POS   12
 
#define VBID_AUDIO_MUTE_FLAG_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define VBID_INTERLACE_FLAG_SW_DP_ENCODER0_P0_FLDMASK   0x2000
 
#define VBID_INTERLACE_FLAG_SW_DP_ENCODER0_P0_FLDMASK_POS   13
 
#define VBID_INTERLACE_FLAG_SW_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define VBID_INTERLACE_FLAG_SEL_DP_ENCODER0_P0_FLDMASK   0x4000
 
#define VBID_INTERLACE_FLAG_SEL_DP_ENCODER0_P0_FLDMASK_POS   14
 
#define VBID_INTERLACE_FLAG_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define MIXER_SDP_EN_DP_ENCODER0_P0_FLDMASK   0x8000
 
#define MIXER_SDP_EN_DP_ENCODER0_P0_FLDMASK_POS   15
 
#define MIXER_SDP_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define REG_3034_DP_ENCODER0_P0   0x3034
 
#define MISC0_DATA_DP_ENCODER0_P0_FLDMASK   0xff
 
#define MISC0_DATA_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define MISC0_DATA_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define MISC1_DATA_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define MISC1_DATA_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define MISC1_DATA_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3038_DP_ENCODER0_P0   0x3038
 
#define TX_VBID_SW_DP_ENCODER0_P0_FLDMASK   0xff
 
#define TX_VBID_SW_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define TX_VBID_SW_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define VIDEO_DATA_SWAP_DP_ENCODER0_P0_FLDMASK   0x700
 
#define VIDEO_DATA_SWAP_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define VIDEO_DATA_SWAP_DP_ENCODER0_P0_FLDMASK_LEN   3
 
#define VIDEO_SOURCE_SEL_DP_ENCODER0_P0_FLDMASK   0x800
 
#define VIDEO_SOURCE_SEL_DP_ENCODER0_P0_FLDMASK_POS   11
 
#define VIDEO_SOURCE_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define FIELD_VBID_SW_EN_DP_ENCODER0_P0_FLDMASK   0x1000
 
#define FIELD_VBID_SW_EN_DP_ENCODER0_P0_FLDMASK_POS   12
 
#define FIELD_VBID_SW_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define FIELD_SW_DP_ENCODER0_P0_FLDMASK   0x2000
 
#define FIELD_SW_DP_ENCODER0_P0_FLDMASK_POS   13
 
#define FIELD_SW_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define V3D_EN_SW_DP_ENCODER0_P0_FLDMASK   0x4000
 
#define V3D_EN_SW_DP_ENCODER0_P0_FLDMASK_POS   14
 
#define V3D_EN_SW_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define V3D_LR_HW_SWAP_DP_ENCODER0_P0_FLDMASK   0x8000
 
#define V3D_LR_HW_SWAP_DP_ENCODER0_P0_FLDMASK_POS   15
 
#define V3D_LR_HW_SWAP_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define REG_303C_DP_ENCODER0_P0   0x303C
 
#define SRAM_START_READ_THRD_DP_ENCODER0_P0_FLDMASK   0x3f
 
#define SRAM_START_READ_THRD_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define SRAM_START_READ_THRD_DP_ENCODER0_P0_FLDMASK_LEN   6
 
#define VIDEO_COLOR_DEPTH_DP_ENCODER0_P0_FLDMASK   0x700
 
#define VIDEO_COLOR_DEPTH_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define VIDEO_COLOR_DEPTH_DP_ENCODER0_P0_FLDMASK_LEN   3
 
#define PIXEL_ENCODE_FORMAT_DP_ENCODER0_P0_FLDMASK   0x7000
 
#define PIXEL_ENCODE_FORMAT_DP_ENCODER0_P0_FLDMASK_POS   12
 
#define PIXEL_ENCODE_FORMAT_DP_ENCODER0_P0_FLDMASK_LEN   3
 
#define VIDEO_MN_GEN_EN_DP_ENCODER0_P0_FLDMASK   0x8000
 
#define VIDEO_MN_GEN_EN_DP_ENCODER0_P0_FLDMASK_POS   15
 
#define VIDEO_MN_GEN_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define REG_3040_DP_ENCODER0_P0   0x3040
 
#define SDP_DOWN_CNT_INIT_DP_ENCODER0_P0_FLDMASK   0xfff
 
#define SDP_DOWN_CNT_INIT_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define SDP_DOWN_CNT_INIT_DP_ENCODER0_P0_FLDMASK_LEN   12
 
#define AUDIO_32CH_EN_DP_ENCODER0_P0_FLDMASK   0x1000
 
#define AUDIO_32CH_EN_DP_ENCODER0_P0_FLDMASK_POS   12
 
#define AUDIO_32CH_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define AUDIO_32CH_SEL_DP_ENCODER0_P0_FLDMASK   0x2000
 
#define AUDIO_32CH_SEL_DP_ENCODER0_P0_FLDMASK_POS   13
 
#define AUDIO_32CH_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define AUDIO_16CH_EN_DP_ENCODER0_P0_FLDMASK   0x4000
 
#define AUDIO_16CH_EN_DP_ENCODER0_P0_FLDMASK_POS   14
 
#define AUDIO_16CH_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define AUDIO_16CH_SEL_DP_ENCODER0_P0_FLDMASK   0x8000
 
#define AUDIO_16CH_SEL_DP_ENCODER0_P0_FLDMASK_POS   15
 
#define AUDIO_16CH_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define REG_3044_DP_ENCODER0_P0   0x3044
 
#define VIDEO_N_CODE_0_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define VIDEO_N_CODE_0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VIDEO_N_CODE_0_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_3048_DP_ENCODER0_P0   0x3048
 
#define VIDEO_N_CODE_1_DP_ENCODER0_P0_FLDMASK   0xff
 
#define VIDEO_N_CODE_1_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VIDEO_N_CODE_1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_304C_DP_ENCODER0_P0   0x304C
 
#define VIDEO_SRAM_MODE_DP_ENCODER0_P0_FLDMASK   0x3
 
#define VIDEO_SRAM_MODE_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VIDEO_SRAM_MODE_DP_ENCODER0_P0_FLDMASK_LEN   2
 
#define VBID_VIDEO_MUTE_DP_ENCODER0_P0_FLDMASK   0x4
 
#define VBID_VIDEO_MUTE_DP_ENCODER0_P0_FLDMASK_POS   2
 
#define VBID_VIDEO_MUTE_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define VBID_VIDEO_MUTE_IDLE_PATTERN_SYNC_EN_DP_ENCODER0_P0_FLDMASK   0x8
 
#define VBID_VIDEO_MUTE_IDLE_PATTERN_SYNC_EN_DP_ENCODER0_P0_FLDMASK_POS   3
 
#define VBID_VIDEO_MUTE_IDLE_PATTERN_SYNC_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define HDCP_SYNC_SEL_DP_ENCODER0_P0_FLDMASK   0x10
 
#define HDCP_SYNC_SEL_DP_ENCODER0_P0_FLDMASK_POS   4
 
#define HDCP_SYNC_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define HDCP_SYNC_SW_DP_ENCODER0_P0_FLDMASK   0x20
 
#define HDCP_SYNC_SW_DP_ENCODER0_P0_FLDMASK_POS   5
 
#define HDCP_SYNC_SW_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define SDP_VSYNC_RISING_MASK_DP_ENCODER0_P0_FLDMASK   0x100
 
#define SDP_VSYNC_RISING_MASK_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define SDP_VSYNC_RISING_MASK_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define REG_3050_DP_ENCODER0_P0   0x3050
 
#define VIDEO_N_CODE_MN_GEN_0_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define VIDEO_N_CODE_MN_GEN_0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VIDEO_N_CODE_MN_GEN_0_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_3054_DP_ENCODER0_P0   0x3054
 
#define VIDEO_N_CODE_MN_GEN_1_DP_ENCODER0_P0_FLDMASK   0xff
 
#define VIDEO_N_CODE_MN_GEN_1_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VIDEO_N_CODE_MN_GEN_1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3058_DP_ENCODER0_P0   0x3058
 
#define AUDIO_N_CODE_MN_GEN_0_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define AUDIO_N_CODE_MN_GEN_0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define AUDIO_N_CODE_MN_GEN_0_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_305C_DP_ENCODER0_P0   0x305C
 
#define AUDIO_N_CODE_MN_GEN_1_DP_ENCODER0_P0_FLDMASK   0xff
 
#define AUDIO_N_CODE_MN_GEN_1_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define AUDIO_N_CODE_MN_GEN_1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3060_DP_ENCODER0_P0   0x3060
 
#define NUM_INTERLACE_FRAME_DP_ENCODER0_P0_FLDMASK   0x7
 
#define NUM_INTERLACE_FRAME_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define NUM_INTERLACE_FRAME_DP_ENCODER0_P0_FLDMASK_LEN   3
 
#define INTERLACE_DET_EVEN_EN_DP_ENCODER0_P0_FLDMASK   0x8
 
#define INTERLACE_DET_EVEN_EN_DP_ENCODER0_P0_FLDMASK_POS   3
 
#define INTERLACE_DET_EVEN_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define FIELD_DETECT_EN_DP_ENCODER0_P0_FLDMASK   0x10
 
#define FIELD_DETECT_EN_DP_ENCODER0_P0_FLDMASK_POS   4
 
#define FIELD_DETECT_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define FIELD_DETECT_UPDATE_THRD_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define FIELD_DETECT_UPDATE_THRD_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define FIELD_DETECT_UPDATE_THRD_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3064_DP_ENCODER0_P0   0x3064
 
#define HDE_NUM_LAST_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define HDE_NUM_LAST_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define HDE_NUM_LAST_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_3088_DP_ENCODER0_P0   0x3088
 
#define AUDIO_DETECT_EN_DP_ENCODER0_P0_FLDMASK   0x20
 
#define AUDIO_DETECT_EN_DP_ENCODER0_P0_FLDMASK_POS   5
 
#define AUDIO_DETECT_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define AU_EN_DP_ENCODER0_P0_FLDMASK   0x40
 
#define AU_EN_DP_ENCODER0_P0_FLDMASK_POS   6
 
#define AU_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define AUDIO_8CH_EN_DP_ENCODER0_P0_FLDMASK   0x80
 
#define AUDIO_8CH_EN_DP_ENCODER0_P0_FLDMASK_POS   7
 
#define AUDIO_8CH_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define AUDIO_8CH_SEL_DP_ENCODER0_P0_FLDMASK   0x100
 
#define AUDIO_8CH_SEL_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define AUDIO_8CH_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define AU_GEN_EN_DP_ENCODER0_P0_FLDMASK   0x200
 
#define AU_GEN_EN_DP_ENCODER0_P0_FLDMASK_POS   9
 
#define AU_GEN_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define AUDIO_MN_GEN_EN_DP_ENCODER0_P0_FLDMASK   0x1000
 
#define AUDIO_MN_GEN_EN_DP_ENCODER0_P0_FLDMASK_POS   12
 
#define AUDIO_MN_GEN_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define DIS_ASP_DP_ENCODER0_P0_FLDMASK   0x2000
 
#define DIS_ASP_DP_ENCODER0_P0_FLDMASK_POS   13
 
#define DIS_ASP_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define AUDIO_2CH_EN_DP_ENCODER0_P0_FLDMASK   0x4000
 
#define AUDIO_2CH_EN_DP_ENCODER0_P0_FLDMASK_POS   14
 
#define AUDIO_2CH_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define AUDIO_2CH_SEL_DP_ENCODER0_P0_FLDMASK   0x8000
 
#define AUDIO_2CH_SEL_DP_ENCODER0_P0_FLDMASK_POS   15
 
#define AUDIO_2CH_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define REG_308C_DP_ENCODER0_P0   0x308C
 
#define CH_STATUS_0_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define CH_STATUS_0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define CH_STATUS_0_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_3090_DP_ENCODER0_P0   0x3090
 
#define CH_STATUS_1_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define CH_STATUS_1_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define CH_STATUS_1_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_3094_DP_ENCODER0_P0   0x3094
 
#define CH_STATUS_2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define CH_STATUS_2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define CH_STATUS_2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3098_DP_ENCODER0_P0   0x3098
 
#define USER_DATA_0_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define USER_DATA_0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define USER_DATA_0_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_309C_DP_ENCODER0_P0   0x309C
 
#define USER_DATA_1_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define USER_DATA_1_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define USER_DATA_1_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_30A0_DP_ENCODER0_P0   0x30A0
 
#define USER_DATA_2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define USER_DATA_2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define USER_DATA_2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define VSC_EXT_VESA_CFG_DP_ENCODER0_P0_FLDMASK   0xf00
 
#define VSC_EXT_VESA_CFG_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define VSC_EXT_VESA_CFG_DP_ENCODER0_P0_FLDMASK_LEN   4
 
#define VSC_EXT_CEA_CFG_DP_ENCODER0_P0_FLDMASK   0xf000
 
#define VSC_EXT_CEA_CFG_DP_ENCODER0_P0_FLDMASK_POS   12
 
#define VSC_EXT_CEA_CFG_DP_ENCODER0_P0_FLDMASK_LEN   4
 
#define REG_30A4_DP_ENCODER0_P0   0x30A4
 
#define AU_TS_CFG_DP_ENCODER0_P0_FLDMASK   0xff
 
#define AU_TS_CFG_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define AU_TS_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define AVI_CFG_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define AVI_CFG_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define AVI_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30A8_DP_ENCODER0_P0   0x30A8
 
#define AUI_CFG_DP_ENCODER0_P0_FLDMASK   0xff
 
#define AUI_CFG_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define AUI_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define SPD_CFG_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define SPD_CFG_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define SPD_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30AC_DP_ENCODER0_P0   0x30AC
 
#define MPEG_CFG_DP_ENCODER0_P0_FLDMASK   0xff
 
#define MPEG_CFG_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define MPEG_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define NTSC_CFG_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define NTSC_CFG_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define NTSC_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30B0_DP_ENCODER0_P0   0x30B0
 
#define VSP_CFG_DP_ENCODER0_P0_FLDMASK   0xff
 
#define VSP_CFG_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VSP_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define EXT_CFG_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define EXT_CFG_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define EXT_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30B4_DP_ENCODER0_P0   0x30B4
 
#define ACM_CFG_DP_ENCODER0_P0_FLDMASK   0xff
 
#define ACM_CFG_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define ACM_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define ISRC_CFG_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define ISRC_CFG_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define ISRC_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30B8_DP_ENCODER0_P0   0x30B8
 
#define VSC_CFG_DP_ENCODER0_P0_FLDMASK   0xff
 
#define VSC_CFG_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VSC_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define MSA_CFG_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define MSA_CFG_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define MSA_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30BC_DP_ENCODER0_P0   0x30BC
 
#define ISRC_CONT_DP_ENCODER0_P0_FLDMASK   0x1
 
#define ISRC_CONT_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define ISRC_CONT_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define MSA_BY_SDP_DP_ENCODER0_P0_FLDMASK   0x2
 
#define MSA_BY_SDP_DP_ENCODER0_P0_FLDMASK_POS   1
 
#define MSA_BY_SDP_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define SDP_EN_DP_ENCODER0_P0_FLDMASK   0x4
 
#define SDP_EN_DP_ENCODER0_P0_FLDMASK_POS   2
 
#define SDP_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define NIBBLE_INTERLEAVER_EN_DP_ENCODER0_P0_FLDMASK   0x8
 
#define NIBBLE_INTERLEAVER_EN_DP_ENCODER0_P0_FLDMASK_POS   3
 
#define NIBBLE_INTERLEAVER_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define ECC_EN_DP_ENCODER0_P0_FLDMASK   0x10
 
#define ECC_EN_DP_ENCODER0_P0_FLDMASK_POS   4
 
#define ECC_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define ASP_MIN_PL_SIZE_DP_ENCODER0_P0_FLDMASK   0x60
 
#define ASP_MIN_PL_SIZE_DP_ENCODER0_P0_FLDMASK_POS   5
 
#define ASP_MIN_PL_SIZE_DP_ENCODER0_P0_FLDMASK_LEN   2
 
#define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENCODER0_P0_FLDMASK   0x700
 
#define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENCODER0_P0_FLDMASK_LEN   3
 
#define AUDIO_M_CODE_SEL_DP_ENCODER0_P0_FLDMASK   0x4000
 
#define AUDIO_M_CODE_SEL_DP_ENCODER0_P0_FLDMASK_POS   14
 
#define AUDIO_M_CODE_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define ASP_HB23_SEL_DP_ENCODER0_P0_FLDMASK   0x8000
 
#define ASP_HB23_SEL_DP_ENCODER0_P0_FLDMASK_POS   15
 
#define ASP_HB23_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define REG_30C0_DP_ENCODER0_P0   0x30C0
 
#define AU_TS_HB0_DP_ENCODER0_P0_FLDMASK   0xff
 
#define AU_TS_HB0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define AU_TS_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define AU_TS_HB1_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define AU_TS_HB1_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define AU_TS_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30C4_DP_ENCODER0_P0   0x30C4
 
#define AU_TS_HB2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define AU_TS_HB2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define AU_TS_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define AU_TS_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define AU_TS_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define AU_TS_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30C8_DP_ENCODER0_P0   0x30C8
 
#define AUDIO_M_CODE_SW_0_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define AUDIO_M_CODE_SW_0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define AUDIO_M_CODE_SW_0_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_30CC_DP_ENCODER0_P0   0x30CC
 
#define AUDIO_M_CODE_SW_1_DP_ENCODER0_P0_FLDMASK   0xff
 
#define AUDIO_M_CODE_SW_1_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define AUDIO_M_CODE_SW_1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30D0_DP_ENCODER0_P0   0x30D0
 
#define AUDIO_N_CODE_0_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define AUDIO_N_CODE_0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define AUDIO_N_CODE_0_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_30D4_DP_ENCODER0_P0   0x30D4
 
#define AUDIO_N_CODE_1_DP_ENCODER0_P0_FLDMASK   0xff
 
#define AUDIO_N_CODE_1_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define AUDIO_N_CODE_1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30D8_DP_ENCODER0_P0   0x30D8
 
#define ACM_HB0_DP_ENCODER0_P0_FLDMASK   0xff
 
#define ACM_HB0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define ACM_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define ACM_HB1_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define ACM_HB1_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define ACM_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30DC_DP_ENCODER0_P0   0x30DC
 
#define ACM_HB2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define ACM_HB2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define ACM_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define ACM_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define ACM_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define ACM_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30E0_DP_ENCODER0_P0   0x30E0
 
#define ISRC_HB0_DP_ENCODER0_P0_FLDMASK   0xff
 
#define ISRC_HB0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define ISRC_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define ISRC_HB1_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define ISRC_HB1_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define ISRC_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30E4_DP_ENCODER0_P0   0x30E4
 
#define ISRC_HB2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define ISRC_HB2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define ISRC_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define ISRC0_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define ISRC0_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define ISRC0_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30E8_DP_ENCODER0_P0   0x30E8
 
#define AVI_HB0_DP_ENCODER0_P0_FLDMASK   0xff
 
#define AVI_HB0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define AVI_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define AVI_HB1_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define AVI_HB1_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define AVI_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30EC_DP_ENCODER0_P0   0x30EC
 
#define AVI_HB2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define AVI_HB2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define AVI_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define AVI_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define AVI_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define AVI_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30F0_DP_ENCODER0_P0   0x30F0
 
#define AUI_HB0_DP_ENCODER0_P0_FLDMASK   0xff
 
#define AUI_HB0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define AUI_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define AUI_HB1_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define AUI_HB1_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define AUI_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30F4_DP_ENCODER0_P0   0x30F4
 
#define AUI_HB2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define AUI_HB2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define AUI_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define AUI_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define AUI_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define AUI_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30F8_DP_ENCODER0_P0   0x30F8
 
#define SPD_HB0_DP_ENCODER0_P0_FLDMASK   0xff
 
#define SPD_HB0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define SPD_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define SPD_HB1_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define SPD_HB1_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define SPD_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_30FC_DP_ENCODER0_P0   0x30FC
 
#define SPD_HB2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define SPD_HB2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define SPD_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define SPD_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define SPD_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define SPD_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3100_DP_ENCODER0_P0   0x3100
 
#define MPEG_HB0_DP_ENCODER0_P0_FLDMASK   0xff
 
#define MPEG_HB0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define MPEG_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define MPEG_HB1_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define MPEG_HB1_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define MPEG_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3104_DP_ENCODER0_P0   0x3104
 
#define MPEG_HB2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define MPEG_HB2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define MPEG_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define MPEG_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define MPEG_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define MPEG_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3108_DP_ENCODER0_P0   0x3108
 
#define NTSC_HB0_DP_ENCODER0_P0_FLDMASK   0xff
 
#define NTSC_HB0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define NTSC_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define NTSC_HB1_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define NTSC_HB1_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define NTSC_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_310C_DP_ENCODER0_P0   0x310C
 
#define NTSC_HB2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define NTSC_HB2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define NTSC_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define NTSC_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define NTSC_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define NTSC_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3110_DP_ENCODER0_P0   0x3110
 
#define VSP_HB0_DP_ENCODER0_P0_FLDMASK   0xff
 
#define VSP_HB0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VSP_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define VSP_HB1_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define VSP_HB1_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define VSP_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3114_DP_ENCODER0_P0   0x3114
 
#define VSP_HB2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define VSP_HB2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VSP_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define VSP_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define VSP_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define VSP_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3118_DP_ENCODER0_P0   0x3118
 
#define VSC_HB0_DP_ENCODER0_P0_FLDMASK   0xff
 
#define VSC_HB0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VSC_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define VSC_HB1_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define VSC_HB1_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define VSC_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_311C_DP_ENCODER0_P0   0x311C
 
#define VSC_HB2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define VSC_HB2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VSC_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define VSC_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define VSC_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define VSC_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3120_DP_ENCODER0_P0   0x3120
 
#define EXT_HB0_DP_ENCODER0_P0_FLDMASK   0xff
 
#define EXT_HB0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define EXT_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define EXT_HB1_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define EXT_HB1_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define EXT_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3124_DP_ENCODER0_P0   0x3124
 
#define EXT_HB2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define EXT_HB2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define EXT_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define EXT_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define EXT_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define EXT_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3128_DP_ENCODER0_P0   0x3128
 
#define ASP_HB0_DP_ENCODER0_P0_FLDMASK   0xff
 
#define ASP_HB0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define ASP_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define ASP_HB1_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define ASP_HB1_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define ASP_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_312C_DP_ENCODER0_P0   0x312C
 
#define ASP_HB2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define ASP_HB2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define ASP_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define ASP_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define ASP_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define ASP_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3130_DP_ENCODER0_P0   0x3130
 
#define PPS_HB0_DP_ENCODER0_P0_FLDMASK   0xff
 
#define PPS_HB0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PPS_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define PPS_HB1_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define PPS_HB1_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define PPS_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3134_DP_ENCODER0_P0   0x3134
 
#define PPS_HB2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define PPS_HB2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PPS_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define PPS_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define PPS_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define PPS_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3138_DP_ENCODER0_P0   0x3138
 
#define HDR0_HB0_DP_ENCODER0_P0_FLDMASK   0xff
 
#define HDR0_HB0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define HDR0_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define HDR0_HB1_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define HDR0_HB1_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define HDR0_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_313C_DP_ENCODER0_P0   0x313C
 
#define HDR0_HB2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define HDR0_HB2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define HDR0_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define HDR0_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define HDR0_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define HDR0_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_3140_DP_ENCODER0_P0   0x3140
 
#define PGEN_CURSOR_V_DP_ENCODER0_P0_FLDMASK   0x1fff
 
#define PGEN_CURSOR_V_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_CURSOR_V_DP_ENCODER0_P0_FLDMASK_LEN   13
 
#define PGEN_TG_SEL_DP_ENCODER0_P0_FLDMASK   0x2000
 
#define PGEN_TG_SEL_DP_ENCODER0_P0_FLDMASK_POS   13
 
#define PGEN_TG_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define PGEN_PG_SEL_DP_ENCODER0_P0_FLDMASK   0x4000
 
#define PGEN_PG_SEL_DP_ENCODER0_P0_FLDMASK_POS   14
 
#define PGEN_PG_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define PGEN_CURSOR_EN_DP_ENCODER0_P0_FLDMASK   0x8000
 
#define PGEN_CURSOR_EN_DP_ENCODER0_P0_FLDMASK_POS   15
 
#define PGEN_CURSOR_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define REG_3144_DP_ENCODER0_P0   0x3144
 
#define PGEN_CURSOR_H_DP_ENCODER0_P0_FLDMASK   0x3fff
 
#define PGEN_CURSOR_H_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_CURSOR_H_DP_ENCODER0_P0_FLDMASK_LEN   14
 
#define REG_3148_DP_ENCODER0_P0   0x3148
 
#define PGEN_CURSOR_RGB_COLOR_CODE_0_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define PGEN_CURSOR_RGB_COLOR_CODE_0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_CURSOR_RGB_COLOR_CODE_0_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_314C_DP_ENCODER0_P0   0x314C
 
#define PGEN_CURSOR_RGB_COLOR_CODE_1_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define PGEN_CURSOR_RGB_COLOR_CODE_1_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_CURSOR_RGB_COLOR_CODE_1_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_3150_DP_ENCODER0_P0   0x3150
 
#define PGEN_CURSOR_RGB_COLOR_CODE_2_DP_ENCODER0_P0_FLDMASK   0xf
 
#define PGEN_CURSOR_RGB_COLOR_CODE_2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_CURSOR_RGB_COLOR_CODE_2_DP_ENCODER0_P0_FLDMASK_LEN   4
 
#define REG_3154_DP_ENCODER0_P0   0x3154
 
#define PGEN_HTOTAL_DP_ENCODER0_P0_FLDMASK   0x3fff
 
#define PGEN_HTOTAL_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_HTOTAL_DP_ENCODER0_P0_FLDMASK_LEN   14
 
#define REG_3158_DP_ENCODER0_P0   0x3158
 
#define PGEN_HSYNC_RISING_DP_ENCODER0_P0_FLDMASK   0x3fff
 
#define PGEN_HSYNC_RISING_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_HSYNC_RISING_DP_ENCODER0_P0_FLDMASK_LEN   14
 
#define REG_315C_DP_ENCODER0_P0   0x315C
 
#define PGEN_HSYNC_PULSE_WIDTH_DP_ENCODER0_P0_FLDMASK   0x3fff
 
#define PGEN_HSYNC_PULSE_WIDTH_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_HSYNC_PULSE_WIDTH_DP_ENCODER0_P0_FLDMASK_LEN   14
 
#define REG_3160_DP_ENCODER0_P0   0x3160
 
#define PGEN_HFDE_START_DP_ENCODER0_P0_FLDMASK   0x3fff
 
#define PGEN_HFDE_START_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_HFDE_START_DP_ENCODER0_P0_FLDMASK_LEN   14
 
#define REG_3164_DP_ENCODER0_P0   0x3164
 
#define PGEN_HFDE_ACTIVE_WIDTH_DP_ENCODER0_P0_FLDMASK   0x3fff
 
#define PGEN_HFDE_ACTIVE_WIDTH_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_HFDE_ACTIVE_WIDTH_DP_ENCODER0_P0_FLDMASK_LEN   14
 
#define REG_3168_DP_ENCODER0_P0   0x3168
 
#define PGEN_VTOTAL_DP_ENCODER0_P0_FLDMASK   0x1fff
 
#define PGEN_VTOTAL_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_VTOTAL_DP_ENCODER0_P0_FLDMASK_LEN   13
 
#define REG_316C_DP_ENCODER0_P0   0x316C
 
#define PGEN_VSYNC_RISING_DP_ENCODER0_P0_FLDMASK   0x1fff
 
#define PGEN_VSYNC_RISING_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_VSYNC_RISING_DP_ENCODER0_P0_FLDMASK_LEN   13
 
#define REG_3170_DP_ENCODER0_P0   0x3170
 
#define PGEN_VSYNC_PULSE_WIDTH_DP_ENCODER0_P0_FLDMASK   0x1fff
 
#define PGEN_VSYNC_PULSE_WIDTH_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_VSYNC_PULSE_WIDTH_DP_ENCODER0_P0_FLDMASK_LEN   13
 
#define REG_3174_DP_ENCODER0_P0   0x3174
 
#define PGEN_VFDE_START_DP_ENCODER0_P0_FLDMASK   0x1fff
 
#define PGEN_VFDE_START_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_VFDE_START_DP_ENCODER0_P0_FLDMASK_LEN   13
 
#define REG_3178_DP_ENCODER0_P0   0x3178
 
#define PGEN_VFDE_ACTIVE_WIDTH_DP_ENCODER0_P0_FLDMASK   0x1fff
 
#define PGEN_VFDE_ACTIVE_WIDTH_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_VFDE_ACTIVE_WIDTH_DP_ENCODER0_P0_FLDMASK_LEN   13
 
#define REG_317C_DP_ENCODER0_P0   0x317C
 
#define PGEN_PAT_BASE_PIXEL_0_DP_ENCODER0_P0_FLDMASK   0xfff
 
#define PGEN_PAT_BASE_PIXEL_0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_PAT_BASE_PIXEL_0_DP_ENCODER0_P0_FLDMASK_LEN   12
 
#define REG_3180_DP_ENCODER0_P0   0x3180
 
#define PGEN_PAT_BASE_PIXEL_1_DP_ENCODER0_P0_FLDMASK   0xfff
 
#define PGEN_PAT_BASE_PIXEL_1_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_PAT_BASE_PIXEL_1_DP_ENCODER0_P0_FLDMASK_LEN   12
 
#define REG_3184_DP_ENCODER0_P0   0x3184
 
#define PGEN_PAT_BASE_PIXEL_2_DP_ENCODER0_P0_FLDMASK   0xfff
 
#define PGEN_PAT_BASE_PIXEL_2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_PAT_BASE_PIXEL_2_DP_ENCODER0_P0_FLDMASK_LEN   12
 
#define REG_3188_DP_ENCODER0_P0   0x3188
 
#define PGEN_INITIAL_H_CNT_DP_ENCODER0_P0_FLDMASK   0x3fff
 
#define PGEN_INITIAL_H_CNT_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_INITIAL_H_CNT_DP_ENCODER0_P0_FLDMASK_LEN   14
 
#define REG_318C_DP_ENCODER0_P0   0x318C
 
#define PGEN_INITIAL_V_CNT_DP_ENCODER0_P0_FLDMASK   0x1fff
 
#define PGEN_INITIAL_V_CNT_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_INITIAL_V_CNT_DP_ENCODER0_P0_FLDMASK_LEN   13
 
#define REG_3190_DP_ENCODER0_P0   0x3190
 
#define PGEN_INITIAL_CB_SEL_DP_ENCODER0_P0_FLDMASK   0x7
 
#define PGEN_INITIAL_CB_SEL_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_INITIAL_CB_SEL_DP_ENCODER0_P0_FLDMASK_LEN   3
 
#define PGEN_FRAME_8K4K_MODE_EN_DP_ENCODER0_P0_FLDMASK   0x10
 
#define PGEN_FRAME_8K4K_MODE_EN_DP_ENCODER0_P0_FLDMASK_POS   4
 
#define PGEN_FRAME_8K4K_MODE_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define PGEN_FRAME_8K4K_MODE_SET_DP_ENCODER0_P0_FLDMASK   0x20
 
#define PGEN_FRAME_8K4K_MODE_SET_DP_ENCODER0_P0_FLDMASK_POS   5
 
#define PGEN_FRAME_8K4K_MODE_SET_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define PGEN_INITIAL_H_GRAD_FLAG_DP_ENCODER0_P0_FLDMASK   0x40
 
#define PGEN_INITIAL_H_GRAD_FLAG_DP_ENCODER0_P0_FLDMASK_POS   6
 
#define PGEN_INITIAL_H_GRAD_FLAG_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define PGEN_INITIAL_V_GRAD_FLAG_DP_ENCODER0_P0_FLDMASK   0x80
 
#define PGEN_INITIAL_V_GRAD_FLAG_DP_ENCODER0_P0_FLDMASK_POS   7
 
#define PGEN_INITIAL_V_GRAD_FLAG_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define PGEN_FRAME_END_H_EN_DP_ENCODER0_P0_FLDMASK   0x100
 
#define PGEN_FRAME_END_H_EN_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define PGEN_FRAME_END_H_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define PGEN_FRAME_END_V_EN_DP_ENCODER0_P0_FLDMASK   0x200
 
#define PGEN_FRAME_END_V_EN_DP_ENCODER0_P0_FLDMASK_POS   9
 
#define PGEN_FRAME_END_V_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define REG_3194_DP_ENCODER0_P0   0x3194
 
#define PGEN_PAT_EXTRA_PIXEL_0_DP_ENCODER0_P0_FLDMASK   0xfff
 
#define PGEN_PAT_EXTRA_PIXEL_0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_PAT_EXTRA_PIXEL_0_DP_ENCODER0_P0_FLDMASK_LEN   12
 
#define REG_3198_DP_ENCODER0_P0   0x3198
 
#define PGEN_PAT_EXTRA_PIXEL_1_DP_ENCODER0_P0_FLDMASK   0xfff
 
#define PGEN_PAT_EXTRA_PIXEL_1_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_PAT_EXTRA_PIXEL_1_DP_ENCODER0_P0_FLDMASK_LEN   12
 
#define REG_319C_DP_ENCODER0_P0   0x319C
 
#define PGEN_PAT_EXTRA_PIXEL_2_DP_ENCODER0_P0_FLDMASK   0xfff
 
#define PGEN_PAT_EXTRA_PIXEL_2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_PAT_EXTRA_PIXEL_2_DP_ENCODER0_P0_FLDMASK_LEN   12
 
#define REG_31A0_DP_ENCODER0_P0   0x31A0
 
#define PGEN_PAT_INCREMENT_0_DP_ENCODER0_P0_FLDMASK   0xffff
 
#define PGEN_PAT_INCREMENT_0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_PAT_INCREMENT_0_DP_ENCODER0_P0_FLDMASK_LEN   16
 
#define REG_31A4_DP_ENCODER0_P0   0x31A4
 
#define PGEN_PAT_INCREMENT_1_DP_ENCODER0_P0_FLDMASK   0x1
 
#define PGEN_PAT_INCREMENT_1_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_PAT_INCREMENT_1_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define REG_31A8_DP_ENCODER0_P0   0x31A8
 
#define PGEN_PAT_HWIDTH_DP_ENCODER0_P0_FLDMASK   0x3fff
 
#define PGEN_PAT_HWIDTH_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_PAT_HWIDTH_DP_ENCODER0_P0_FLDMASK_LEN   14
 
#define REG_31AC_DP_ENCODER0_P0   0x31AC
 
#define PGEN_PAT_VWIDTH_DP_ENCODER0_P0_FLDMASK   0x1fff
 
#define PGEN_PAT_VWIDTH_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_PAT_VWIDTH_DP_ENCODER0_P0_FLDMASK_LEN   13
 
#define REG_31B0_DP_ENCODER0_P0   0x31B0
 
#define PGEN_PAT_RGB_ENABLE_DP_ENCODER0_P0_FLDMASK   0x7
 
#define PGEN_PAT_RGB_ENABLE_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_PAT_RGB_ENABLE_DP_ENCODER0_P0_FLDMASK_LEN   3
 
#define PGEN_PATTERN_SEL_DP_ENCODER0_P0_FLDMASK   0x70
 
#define PGEN_PATTERN_SEL_DP_ENCODER0_P0_FLDMASK_POS   4
 
#define PGEN_PATTERN_SEL_DP_ENCODER0_P0_FLDMASK_LEN   3
 
#define PGEN_PAT_DIRECTION_DP_ENCODER0_P0_FLDMASK   0x80
 
#define PGEN_PAT_DIRECTION_DP_ENCODER0_P0_FLDMASK_POS   7
 
#define PGEN_PAT_DIRECTION_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define PGEN_PAT_GRADIENT_NORMAL_MODE_DP_ENCODER0_P0_FLDMASK   0x100
 
#define PGEN_PAT_GRADIENT_NORMAL_MODE_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define PGEN_PAT_GRADIENT_NORMAL_MODE_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define PGEN_PAT_COLOR_BAR_GRADIENT_EN_DP_ENCODER0_P0_FLDMASK   0x200
 
#define PGEN_PAT_COLOR_BAR_GRADIENT_EN_DP_ENCODER0_P0_FLDMASK_POS   9
 
#define PGEN_PAT_COLOR_BAR_GRADIENT_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define PGEN_PAT_CHESSBOARD_NORMAL_MODE_DP_ENCODER0_P0_FLDMASK   0x400
 
#define PGEN_PAT_CHESSBOARD_NORMAL_MODE_DP_ENCODER0_P0_FLDMASK_POS   10
 
#define PGEN_PAT_CHESSBOARD_NORMAL_MODE_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define PGEN_PAT_EXCHANGE_DP_ENCODER0_P0_FLDMASK   0x800
 
#define PGEN_PAT_EXCHANGE_DP_ENCODER0_P0_FLDMASK_POS   11
 
#define PGEN_PAT_EXCHANGE_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define PGEN_PAT_RGB_SUB_PIXEL_MASK_DP_ENCODER0_P0_FLDMASK   0x1000
 
#define PGEN_PAT_RGB_SUB_PIXEL_MASK_DP_ENCODER0_P0_FLDMASK_POS   12
 
#define PGEN_PAT_RGB_SUB_PIXEL_MASK_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define REG_31B4_DP_ENCODER0_P0   0x31B4
 
#define PGEN_PAT_THICKNESS_DP_ENCODER0_P0_FLDMASK   0xf
 
#define PGEN_PAT_THICKNESS_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PGEN_PAT_THICKNESS_DP_ENCODER0_P0_FLDMASK_LEN   4
 
#define REG_31C0_DP_ENCODER0_P0   0x31C0
 
#define VIDEO_MUTE_CNT_THRD_DP_ENCODER0_P0_FLDMASK   0xfff
 
#define VIDEO_MUTE_CNT_THRD_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VIDEO_MUTE_CNT_THRD_DP_ENCODER0_P0_FLDMASK_LEN   12
 
#define REG_31C4_DP_ENCODER0_P0   0x31C4
 
#define PPS_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK   0x800
 
#define PPS_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK_POS   11
 
#define PPS_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define MST_EN_DP_ENCODER0_P0_FLDMASK   0x1000
 
#define MST_EN_DP_ENCODER0_P0_FLDMASK_POS   12
 
#define MST_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define DSC_BYPASS_EN_DP_ENCODER0_P0_FLDMASK   0x2000
 
#define DSC_BYPASS_EN_DP_ENCODER0_P0_FLDMASK_POS   13
 
#define DSC_BYPASS_EN_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define VSC_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK   0x4000
 
#define VSC_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK_POS   14
 
#define VSC_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define HDR0_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK   0x8000
 
#define HDR0_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK_POS   15
 
#define HDR0_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define REG_31C8_DP_ENCODER0_P0   0x31C8
 
#define VSC_EXT_VESA_HB0_DP_ENCODER0_P0_FLDMASK   0xff
 
#define VSC_EXT_VESA_HB0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VSC_EXT_VESA_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define VSC_EXT_VESA_HB1_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define VSC_EXT_VESA_HB1_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define VSC_EXT_VESA_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_31CC_DP_ENCODER0_P0   0x31CC
 
#define VSC_EXT_VESA_HB2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define VSC_EXT_VESA_HB2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VSC_EXT_VESA_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define VSC_EXT_VESA_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define VSC_EXT_VESA_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define VSC_EXT_VESA_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_31D0_DP_ENCODER0_P0   0x31D0
 
#define VSC_EXT_CEA_HB0_DP_ENCODER0_P0_FLDMASK   0xff
 
#define VSC_EXT_CEA_HB0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VSC_EXT_CEA_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define VSC_EXT_CEA_HB1_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define VSC_EXT_CEA_HB1_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define VSC_EXT_CEA_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_31D4_DP_ENCODER0_P0   0x31D4
 
#define VSC_EXT_CEA_HB2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define VSC_EXT_CEA_HB2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VSC_EXT_CEA_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define VSC_EXT_CEA_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define VSC_EXT_CEA_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define VSC_EXT_CEA_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_31D8_DP_ENCODER0_P0   0x31D8
 
#define VSC_EXT_VESA_NUM_DP_ENCODER0_P0_FLDMASK   0x3f
 
#define VSC_EXT_VESA_NUM_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VSC_EXT_VESA_NUM_DP_ENCODER0_P0_FLDMASK_LEN   6
 
#define VSC_EXT_CEA_NUM_DP_ENCODER0_P0_FLDMASK   0x3f00
 
#define VSC_EXT_CEA_NUM_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define VSC_EXT_CEA_NUM_DP_ENCODER0_P0_FLDMASK_LEN   6
 
#define REG_31DC_DP_ENCODER0_P0   0x31DC
 
#define HDR0_CFG_DP_ENCODER0_P0_FLDMASK   0xff
 
#define HDR0_CFG_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define HDR0_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define RESERVED_CFG_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define RESERVED_CFG_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define RESERVED_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_31E0_DP_ENCODER0_P0   0x31E0
 
#define RESERVED_HB0_DP_ENCODER0_P0_FLDMASK   0xff
 
#define RESERVED_HB0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define RESERVED_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define RESERVED_HB1_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define RESERVED_HB1_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define RESERVED_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_31E4_DP_ENCODER0_P0   0x31E4
 
#define RESERVED_HB2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define RESERVED_HB2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define RESERVED_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define RESERVED_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define RESERVED_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define RESERVED_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_31E8_DP_ENCODER0_P0   0x31E8
 
#define PPS_CFG_DP_ENCODER0_P0_FLDMASK   0xff
 
#define PPS_CFG_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define PPS_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define PPS_CFG_ONE_TIME_DP_ENCODER0_P0_FLDMASK   0x100
 
#define PPS_CFG_ONE_TIME_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define PPS_CFG_ONE_TIME_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define SDP_SPLIT_FIFO_READ_START_POINT_DP_ENCODER0_P0_FLDMASK   0xf000
 
#define SDP_SPLIT_FIFO_READ_START_POINT_DP_ENCODER0_P0_FLDMASK_POS   12
 
#define SDP_SPLIT_FIFO_READ_START_POINT_DP_ENCODER0_P0_FLDMASK_LEN   4
 
#define REG_31EC_DP_ENCODER0_P0   0x31EC
 
#define VIDEO_M_CODE_FROM_DPRX_DP_ENCODER0_P0_FLDMASK   0x1
 
#define VIDEO_M_CODE_FROM_DPRX_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VIDEO_M_CODE_FROM_DPRX_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define MSA_MISC_FROM_DPRX_DP_ENCODER0_P0_FLDMASK   0x2
 
#define MSA_MISC_FROM_DPRX_DP_ENCODER0_P0_FLDMASK_POS   1
 
#define MSA_MISC_FROM_DPRX_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define ADS_CFG_DP_ENCODER0_P0_FLDMASK   0x4
 
#define ADS_CFG_DP_ENCODER0_P0_FLDMASK_POS   2
 
#define ADS_CFG_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define ADS_MODE_DP_ENCODER0_P0_FLDMASK   0x8
 
#define ADS_MODE_DP_ENCODER0_P0_FLDMASK_POS   3
 
#define ADS_MODE_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define AUDIO_CH_SRC_SEL_DP_ENCODER0_P0_FLDMASK   0x10
 
#define AUDIO_CH_SRC_SEL_DP_ENCODER0_P0_FLDMASK_POS   4
 
#define AUDIO_CH_SRC_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define ISRC1_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define ISRC1_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define ISRC1_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_31F0_DP_ENCODER0_P0   0x31F0
 
#define ADS_HB0_DP_ENCODER0_P0_FLDMASK   0xff
 
#define ADS_HB0_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define ADS_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define ADS_HB1_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define ADS_HB1_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define ADS_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_31F8_DP_ENCODER0_P0   0x31F8
 
#define ADS_HB2_DP_ENCODER0_P0_FLDMASK   0xff
 
#define ADS_HB2_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define ADS_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define ADS_HB3_DP_ENCODER0_P0_FLDMASK   0xff00
 
#define ADS_HB3_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define ADS_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8
 
#define REG_31FC_DP_ENCODER0_P0   0x31FC
 
#define VIDEO_ARBITER_DE_LAST_NUM0_SW_DP_ENCODER0_P0_FLDMASK   0x3
 
#define VIDEO_ARBITER_DE_LAST_NUM0_SW_DP_ENCODER0_P0_FLDMASK_POS   0
 
#define VIDEO_ARBITER_DE_LAST_NUM0_SW_DP_ENCODER0_P0_FLDMASK_LEN   2
 
#define VIDEO_ARBITER_DE_LAST_NUM1_SW_DP_ENCODER0_P0_FLDMASK   0xc
 
#define VIDEO_ARBITER_DE_LAST_NUM1_SW_DP_ENCODER0_P0_FLDMASK_POS   2
 
#define VIDEO_ARBITER_DE_LAST_NUM1_SW_DP_ENCODER0_P0_FLDMASK_LEN   2
 
#define VIDEO_ARBITER_DE_LAST_NUM2_SW_DP_ENCODER0_P0_FLDMASK   0x30
 
#define VIDEO_ARBITER_DE_LAST_NUM2_SW_DP_ENCODER0_P0_FLDMASK_POS   4
 
#define VIDEO_ARBITER_DE_LAST_NUM2_SW_DP_ENCODER0_P0_FLDMASK_LEN   2
 
#define VIDEO_ARBITER_DE_LAST_NUM3_SW_DP_ENCODER0_P0_FLDMASK   0xc0
 
#define VIDEO_ARBITER_DE_LAST_NUM3_SW_DP_ENCODER0_P0_FLDMASK_POS   6
 
#define VIDEO_ARBITER_DE_LAST_NUM3_SW_DP_ENCODER0_P0_FLDMASK_LEN   2
 
#define HDE_NUM_EVEN_EN_SW_LANE0_DP_ENCODER0_P0_FLDMASK   0x100
 
#define HDE_NUM_EVEN_EN_SW_LANE0_DP_ENCODER0_P0_FLDMASK_POS   8
 
#define HDE_NUM_EVEN_EN_SW_LANE0_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define HDE_NUM_EVEN_EN_SW_LANE1_DP_ENCODER0_P0_FLDMASK   0x200
 
#define HDE_NUM_EVEN_EN_SW_LANE1_DP_ENCODER0_P0_FLDMASK_POS   9
 
#define HDE_NUM_EVEN_EN_SW_LANE1_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define HDE_NUM_EVEN_EN_SW_LANE2_DP_ENCODER0_P0_FLDMASK   0x400
 
#define HDE_NUM_EVEN_EN_SW_LANE2_DP_ENCODER0_P0_FLDMASK_POS   10
 
#define HDE_NUM_EVEN_EN_SW_LANE2_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define HDE_NUM_EVEN_EN_SW_LANE3_DP_ENCODER0_P0_FLDMASK   0x800
 
#define HDE_NUM_EVEN_EN_SW_LANE3_DP_ENCODER0_P0_FLDMASK_POS   11
 
#define HDE_NUM_EVEN_EN_SW_LANE3_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define DE_LAST_NUM_SW_DP_ENCODER0_P0_FLDMASK   0x1000
 
#define DE_LAST_NUM_SW_DP_ENCODER0_P0_FLDMASK_POS   12
 
#define DE_LAST_NUM_SW_DP_ENCODER0_P0_FLDMASK_LEN   1
 
#define REG_3200_DP_ENCODER1_P0   0x3200
 
#define SDP_DB0_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB0_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB0_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB1_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB1_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB1_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3204_DP_ENCODER1_P0   0x3204
 
#define SDP_DB2_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB2_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB2_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB3_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB3_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB3_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3208_DP_ENCODER1_P0   0x3208
 
#define SDP_DB4_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB4_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB4_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB5_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB5_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB5_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_320C_DP_ENCODER1_P0   0x320C
 
#define SDP_DB6_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB6_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB6_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB7_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB7_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB7_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3210_DP_ENCODER1_P0   0x3210
 
#define SDP_DB8_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB8_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB8_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB9_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB9_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB9_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3214_DP_ENCODER1_P0   0x3214
 
#define SDP_DB10_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB10_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB10_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB11_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB11_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB11_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3218_DP_ENCODER1_P0   0x3218
 
#define SDP_DB12_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB12_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB12_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB13_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB13_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB13_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_321C_DP_ENCODER1_P0   0x321C
 
#define SDP_DB14_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB14_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB14_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB15_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB15_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB15_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3220_DP_ENCODER1_P0   0x3220
 
#define SDP_DB16_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB16_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB16_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB17_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB17_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB17_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3224_DP_ENCODER1_P0   0x3224
 
#define SDP_DB18_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB18_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB18_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB19_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB19_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB19_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3228_DP_ENCODER1_P0   0x3228
 
#define SDP_DB20_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB20_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB20_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB21_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB21_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB21_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_322C_DP_ENCODER1_P0   0x322C
 
#define SDP_DB22_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB22_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB22_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB23_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB23_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB23_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3230_DP_ENCODER1_P0   0x3230
 
#define SDP_DB24_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB24_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB24_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB25_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB25_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB25_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3234_DP_ENCODER1_P0   0x3234
 
#define SDP_DB26_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB26_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB26_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB27_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB27_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB27_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3238_DP_ENCODER1_P0   0x3238
 
#define SDP_DB28_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB28_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB28_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB29_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB29_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB29_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_323C_DP_ENCODER1_P0   0x323C
 
#define SDP_DB30_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB30_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB30_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB31_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB31_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB31_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3240_DP_ENCODER1_P0   0x3240
 
#define SDP_DB0_R_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB0_R_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB0_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB1_R_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB1_R_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB1_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3244_DP_ENCODER1_P0   0x3244
 
#define SDP_DB2_R_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB2_R_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB2_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB3_R_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB3_R_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB3_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3248_DP_ENCODER1_P0   0x3248
 
#define SDP_DB4_R_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB4_R_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB4_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB5_R_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB5_R_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB5_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_324C_DP_ENCODER1_P0   0x324C
 
#define SDP_DB6_R_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB6_R_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB6_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB7_R_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB7_R_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB7_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3250_DP_ENCODER1_P0   0x3250
 
#define SDP_DB8_R_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB8_R_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB8_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB9_R_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB9_R_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB9_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3254_DP_ENCODER1_P0   0x3254
 
#define SDP_DB10_R_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB10_R_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB10_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB11_R_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB11_R_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB11_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3258_DP_ENCODER1_P0   0x3258
 
#define SDP_DB12_R_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB12_R_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB12_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB13_R_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB13_R_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB13_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_325C_DP_ENCODER1_P0   0x325C
 
#define SDP_DB14_R_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB14_R_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB14_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB15_R_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB15_R_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB15_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3260_DP_ENCODER1_P0   0x3260
 
#define SDP_DB16_R_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB16_R_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB16_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB17_R_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB17_R_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB17_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3264_DP_ENCODER1_P0   0x3264
 
#define SDP_DB18_R_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB18_R_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB18_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB19_R_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB19_R_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB19_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3268_DP_ENCODER1_P0   0x3268
 
#define SDP_DB20_R_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB20_R_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB20_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB21_R_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB21_R_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB21_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_326C_DP_ENCODER1_P0   0x326C
 
#define SDP_DB22_R_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB22_R_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB22_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB23_R_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB23_R_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB23_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3270_DP_ENCODER1_P0   0x3270
 
#define SDP_DB24_R_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB24_R_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB24_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB25_R_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB25_R_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB25_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3274_DP_ENCODER1_P0   0x3274
 
#define SDP_DB26_R_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB26_R_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB26_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB27_R_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB27_R_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB27_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3278_DP_ENCODER1_P0   0x3278
 
#define SDP_DB28_R_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB28_R_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB28_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB29_R_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB29_R_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB29_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_327C_DP_ENCODER1_P0   0x327C
 
#define SDP_DB30_R_DP_ENCODER1_P0_FLDMASK   0xff
 
#define SDP_DB30_R_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DB30_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_DB31_R_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define SDP_DB31_R_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DB31_R_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3280_DP_ENCODER1_P0   0x3280
 
#define SDP_PACKET_TYPE_DP_ENCODER1_P0_FLDMASK   0x1f
 
#define SDP_PACKET_TYPE_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_PACKET_TYPE_DP_ENCODER1_P0_FLDMASK_LEN   5
 
#define SDP_PACKET_W_DP_ENCODER1_P0_FLDMASK   0x20
 
#define SDP_PACKET_W_DP_ENCODER1_P0_FLDMASK_POS   5
 
#define SDP_PACKET_W_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define SDP_PACKET_R_DP_ENCODER1_P0_FLDMASK   0x40
 
#define SDP_PACKET_R_DP_ENCODER1_P0_FLDMASK_POS   6
 
#define SDP_PACKET_R_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define REG_328C_DP_ENCODER1_P0   0x328C
 
#define VSC_SW_HW_SEL_VESA_DP_ENCODER1_P0_FLDMASK   0x1
 
#define VSC_SW_HW_SEL_VESA_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VSC_SW_HW_SEL_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_SRAM_HW_RST_VESA_DP_ENCODER1_P0_FLDMASK   0x2
 
#define VSC_SRAM_HW_RST_VESA_DP_ENCODER1_P0_FLDMASK_POS   1
 
#define VSC_SRAM_HW_RST_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_SRAM_SW_RST_VESA_DP_ENCODER1_P0_FLDMASK   0x4
 
#define VSC_SRAM_SW_RST_VESA_DP_ENCODER1_P0_FLDMASK_POS   2
 
#define VSC_SRAM_SW_RST_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_SRAM_HW_EMPTY_VESA_DP_ENCODER1_P0_FLDMASK   0x8
 
#define VSC_SRAM_HW_EMPTY_VESA_DP_ENCODER1_P0_FLDMASK_POS   3
 
#define VSC_SRAM_HW_EMPTY_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_SRAM_HW_FULL_VESA_DP_ENCODER1_P0_FLDMASK   0x10
 
#define VSC_SRAM_HW_FULL_VESA_DP_ENCODER1_P0_FLDMASK_POS   4
 
#define VSC_SRAM_HW_FULL_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_SRAM_HW_FULL_CLR_VESA_DP_ENCODER1_P0_FLDMASK   0x20
 
#define VSC_SRAM_HW_FULL_CLR_VESA_DP_ENCODER1_P0_FLDMASK_POS   5
 
#define VSC_SRAM_HW_FULL_CLR_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_DATA_TOGGLE_VESA_DP_ENCODER1_P0_FLDMASK   0x40
 
#define VSC_DATA_TOGGLE_VESA_DP_ENCODER1_P0_FLDMASK_POS   6
 
#define VSC_DATA_TOGGLE_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_DATA_RDY_VESA_DP_ENCODER1_P0_FLDMASK   0x80
 
#define VSC_DATA_RDY_VESA_DP_ENCODER1_P0_FLDMASK_POS   7
 
#define VSC_DATA_RDY_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_SRAM_SW_EMPTY_VESA_DP_ENCODER1_P0_FLDMASK   0x100
 
#define VSC_SRAM_SW_EMPTY_VESA_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define VSC_SRAM_SW_EMPTY_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define REG_3290_DP_ENCODER1_P0   0x3290
 
#define VSC_DATA_BYTE0_VESA_DP_ENCODER1_P0_FLDMASK   0xff
 
#define VSC_DATA_BYTE0_VESA_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VSC_DATA_BYTE0_VESA_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE1_VESA_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define VSC_DATA_BYTE1_VESA_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define VSC_DATA_BYTE1_VESA_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3294_DP_ENCODER1_P0   0x3294
 
#define VSC_DATA_BYTE2_VESA_DP_ENCODER1_P0_FLDMASK   0xff
 
#define VSC_DATA_BYTE2_VESA_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VSC_DATA_BYTE2_VESA_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE3_VESA_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define VSC_DATA_BYTE3_VESA_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define VSC_DATA_BYTE3_VESA_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_3298_DP_ENCODER1_P0   0x3298
 
#define VSC_DATA_BYTE4_VESA_DP_ENCODER1_P0_FLDMASK   0xff
 
#define VSC_DATA_BYTE4_VESA_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VSC_DATA_BYTE4_VESA_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE5_VESA_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define VSC_DATA_BYTE5_VESA_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define VSC_DATA_BYTE5_VESA_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_329C_DP_ENCODER1_P0   0x329C
 
#define VSC_DATA_BYTE6_VESA_DP_ENCODER1_P0_FLDMASK   0xff
 
#define VSC_DATA_BYTE6_VESA_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VSC_DATA_BYTE6_VESA_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE7_VESA_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define VSC_DATA_BYTE7_VESA_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define VSC_DATA_BYTE7_VESA_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_32A0_DP_ENCODER1_P0   0x32A0
 
#define VSC_SW_HW_SEL_CEA_DP_ENCODER1_P0_FLDMASK   0x1
 
#define VSC_SW_HW_SEL_CEA_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VSC_SW_HW_SEL_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_SRAM_HW_RST_CEA_DP_ENCODER1_P0_FLDMASK   0x2
 
#define VSC_SRAM_HW_RST_CEA_DP_ENCODER1_P0_FLDMASK_POS   1
 
#define VSC_SRAM_HW_RST_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_SRAM_SW_RST_CEA_DP_ENCODER1_P0_FLDMASK   0x4
 
#define VSC_SRAM_SW_RST_CEA_DP_ENCODER1_P0_FLDMASK_POS   2
 
#define VSC_SRAM_SW_RST_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_SRAM_HW_EMPTY_CEA_DP_ENCODER1_P0_FLDMASK   0x8
 
#define VSC_SRAM_HW_EMPTY_CEA_DP_ENCODER1_P0_FLDMASK_POS   3
 
#define VSC_SRAM_HW_EMPTY_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_SRAM_HW_FULL_CEA_DP_ENCODER1_P0_FLDMASK   0x10
 
#define VSC_SRAM_HW_FULL_CEA_DP_ENCODER1_P0_FLDMASK_POS   4
 
#define VSC_SRAM_HW_FULL_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_SRAM_HW_FULL_CLR_CEA_DP_ENCODER1_P0_FLDMASK   0x20
 
#define VSC_SRAM_HW_FULL_CLR_CEA_DP_ENCODER1_P0_FLDMASK_POS   5
 
#define VSC_SRAM_HW_FULL_CLR_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_DATA_TOGGLE_CEA_DP_ENCODER1_P0_FLDMASK   0x40
 
#define VSC_DATA_TOGGLE_CEA_DP_ENCODER1_P0_FLDMASK_POS   6
 
#define VSC_DATA_TOGGLE_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_DATA_RDY_CEA_DP_ENCODER1_P0_FLDMASK   0x80
 
#define VSC_DATA_RDY_CEA_DP_ENCODER1_P0_FLDMASK_POS   7
 
#define VSC_DATA_RDY_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_SRAM_SW_EMPTY_CEA_DP_ENCODER1_P0_FLDMASK   0x100
 
#define VSC_SRAM_SW_EMPTY_CEA_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define VSC_SRAM_SW_EMPTY_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define REG_32A4_DP_ENCODER1_P0   0x32A4
 
#define VSC_DATA_BYTE0_CEA_DP_ENCODER1_P0_FLDMASK   0xff
 
#define VSC_DATA_BYTE0_CEA_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VSC_DATA_BYTE0_CEA_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE1_CEA_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define VSC_DATA_BYTE1_CEA_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define VSC_DATA_BYTE1_CEA_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_32A8_DP_ENCODER1_P0   0x32A8
 
#define VSC_DATA_BYTE2_CEA_DP_ENCODER1_P0_FLDMASK   0xff
 
#define VSC_DATA_BYTE2_CEA_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VSC_DATA_BYTE2_CEA_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE3_CEA_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define VSC_DATA_BYTE3_CEA_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define VSC_DATA_BYTE3_CEA_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_32AC_DP_ENCODER1_P0   0x32AC
 
#define VSC_DATA_BYTE4_CEA_DP_ENCODER1_P0_FLDMASK   0xff
 
#define VSC_DATA_BYTE4_CEA_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VSC_DATA_BYTE4_CEA_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE5_CEA_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define VSC_DATA_BYTE5_CEA_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define VSC_DATA_BYTE5_CEA_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_32B0_DP_ENCODER1_P0   0x32B0
 
#define VSC_DATA_BYTE6_CEA_DP_ENCODER1_P0_FLDMASK   0xff
 
#define VSC_DATA_BYTE6_CEA_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VSC_DATA_BYTE6_CEA_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE7_CEA_DP_ENCODER1_P0_FLDMASK   0xff00
 
#define VSC_DATA_BYTE7_CEA_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define VSC_DATA_BYTE7_CEA_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_32B4_DP_ENCODER1_P0   0x32B4
 
#define VSC_DATA_SW_CAN_WRITE_VESA_DP_ENCODER1_P0_FLDMASK   0x1
 
#define VSC_DATA_SW_CAN_WRITE_VESA_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VSC_DATA_SW_CAN_WRITE_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_DATA_SW_CAN_WRITE_CEA_DP_ENCODER1_P0_FLDMASK   0x2
 
#define VSC_DATA_SW_CAN_WRITE_CEA_DP_ENCODER1_P0_FLDMASK_POS   1
 
#define VSC_DATA_SW_CAN_WRITE_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_DATA_TRANSMIT_SEL_VESA_DP_ENCODER1_P0_FLDMASK   0x4
 
#define VSC_DATA_TRANSMIT_SEL_VESA_DP_ENCODER1_P0_FLDMASK_POS   2
 
#define VSC_DATA_TRANSMIT_SEL_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VSC_DATA_TRANSMIT_SEL_CEA_DP_ENCODER1_P0_FLDMASK   0x8
 
#define VSC_DATA_TRANSMIT_SEL_CEA_DP_ENCODER1_P0_FLDMASK_POS   3
 
#define VSC_DATA_TRANSMIT_SEL_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define REG_32C0_DP_ENCODER1_P0   0x32C0
 
#define IRQ_MASK_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define IRQ_MASK_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define IRQ_MASK_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_32C4_DP_ENCODER1_P0   0x32C4
 
#define IRQ_CLR_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define IRQ_CLR_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define IRQ_CLR_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_32C8_DP_ENCODER1_P0   0x32C8
 
#define IRQ_FORCE_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define IRQ_FORCE_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define IRQ_FORCE_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_32CC_DP_ENCODER1_P0   0x32CC
 
#define IRQ_STATUS_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define IRQ_STATUS_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define IRQ_STATUS_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_32D0_DP_ENCODER1_P0   0x32D0
 
#define IRQ_FINAL_STATUS_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define IRQ_FINAL_STATUS_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define IRQ_FINAL_STATUS_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_32D4_DP_ENCODER1_P0   0x32D4
 
#define IRQ_MASK_51_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define IRQ_MASK_51_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define IRQ_MASK_51_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_32D8_DP_ENCODER1_P0   0x32D8
 
#define IRQ_CLR_51_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define IRQ_CLR_51_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define IRQ_CLR_51_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_32DC_DP_ENCODER1_P0   0x32DC
 
#define IRQ_FORCE_51_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define IRQ_FORCE_51_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define IRQ_FORCE_51_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_32E0_DP_ENCODER1_P0   0x32E0
 
#define IRQ_STATUS_51_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define IRQ_STATUS_51_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define IRQ_STATUS_51_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_32E4_DP_ENCODER1_P0   0x32E4
 
#define IRQ_FINAL_STATUS_51_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define IRQ_FINAL_STATUS_51_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define IRQ_FINAL_STATUS_51_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_32E8_DP_ENCODER1_P0   0x32E8
 
#define AUDIO_SRAM_WRITE_ADDR_0_DP_ENCODER1_P0_FLDMASK   0x7f
 
#define AUDIO_SRAM_WRITE_ADDR_0_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define AUDIO_SRAM_WRITE_ADDR_0_DP_ENCODER1_P0_FLDMASK_LEN   7
 
#define AUDIO_SRAM_WRITE_ADDR_1_DP_ENCODER1_P0_FLDMASK   0x7f00
 
#define AUDIO_SRAM_WRITE_ADDR_1_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define AUDIO_SRAM_WRITE_ADDR_1_DP_ENCODER1_P0_FLDMASK_LEN   7
 
#define REG_32EC_DP_ENCODER1_P0   0x32EC
 
#define AUDIO_SRAM_WRITE_ADDR_2_DP_ENCODER1_P0_FLDMASK   0x7f
 
#define AUDIO_SRAM_WRITE_ADDR_2_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define AUDIO_SRAM_WRITE_ADDR_2_DP_ENCODER1_P0_FLDMASK_LEN   7
 
#define AUDIO_SRAM_WRITE_ADDR_3_DP_ENCODER1_P0_FLDMASK   0x7f00
 
#define AUDIO_SRAM_WRITE_ADDR_3_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define AUDIO_SRAM_WRITE_ADDR_3_DP_ENCODER1_P0_FLDMASK_LEN   7
 
#define REG_32F0_DP_ENCODER1_P0   0x32F0
 
#define M_CODE_FEC_MERGE_0_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define M_CODE_FEC_MERGE_0_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define M_CODE_FEC_MERGE_0_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_32F4_DP_ENCODER1_P0   0x32F4
 
#define M_CODE_FEC_MERGE_1_DP_ENCODER1_P0_FLDMASK   0xff
 
#define M_CODE_FEC_MERGE_1_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define M_CODE_FEC_MERGE_1_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_32F8_DP_ENCODER1_P0   0x32F8
 
#define MSA_UPDATE_LINE_CNT_THRD_DP_ENCODER1_P0_FLDMASK   0xff
 
#define MSA_UPDATE_LINE_CNT_THRD_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define MSA_UPDATE_LINE_CNT_THRD_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_SPLIT_BUG_FIX_DP_ENCODER1_P0_FLDMASK   0x200
 
#define SDP_SPLIT_BUG_FIX_DP_ENCODER1_P0_FLDMASK_POS   9
 
#define SDP_SPLIT_BUG_FIX_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define MSA_MUTE_MASK_DP_ENCODER1_P0_FLDMASK   0x400
 
#define MSA_MUTE_MASK_DP_ENCODER1_P0_FLDMASK_POS   10
 
#define MSA_MUTE_MASK_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define MSA_UPDATE_SEL_DP_ENCODER1_P0_FLDMASK   0x3000
 
#define MSA_UPDATE_SEL_DP_ENCODER1_P0_FLDMASK_POS   12
 
#define MSA_UPDATE_SEL_DP_ENCODER1_P0_FLDMASK_LEN   2
 
#define VIDEO_MUTE_TOGGLE_SEL_DP_ENCODER1_P0_FLDMASK   0xc000
 
#define VIDEO_MUTE_TOGGLE_SEL_DP_ENCODER1_P0_FLDMASK_POS   14
 
#define VIDEO_MUTE_TOGGLE_SEL_DP_ENCODER1_P0_FLDMASK_LEN   2
 
#define REG_3300_DP_ENCODER1_P0   0x3300
 
#define AUDIO_AFIFO_CNT_SEL_DP_ENCODER1_P0_FLDMASK   0x1
 
#define AUDIO_AFIFO_CNT_SEL_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define AUDIO_AFIFO_CNT_SEL_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define AUDIO_SRAM_CNT_SEL_DP_ENCODER1_P0_FLDMASK   0x2
 
#define AUDIO_SRAM_CNT_SEL_DP_ENCODER1_P0_FLDMASK_POS   1
 
#define AUDIO_SRAM_CNT_SEL_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define AUDIO_AFIFO_CNT_DP_ENCODER1_P0_FLDMASK   0xf0
 
#define AUDIO_AFIFO_CNT_DP_ENCODER1_P0_FLDMASK_POS   4
 
#define AUDIO_AFIFO_CNT_DP_ENCODER1_P0_FLDMASK_LEN   4
 
#define VIDEO_AFIFO_RDY_SEL_DP_ENCODER1_P0_FLDMASK   0x300
 
#define VIDEO_AFIFO_RDY_SEL_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define VIDEO_AFIFO_RDY_SEL_DP_ENCODER1_P0_FLDMASK_LEN   2
 
#define REG_3304_DP_ENCODER1_P0   0x3304
 
#define AUDIO_SRAM_CNT_DP_ENCODER1_P0_FLDMASK   0x7f
 
#define AUDIO_SRAM_CNT_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define AUDIO_SRAM_CNT_DP_ENCODER1_P0_FLDMASK_LEN   7
 
#define AU_PRTY_REGEN_DP_ENCODER1_P0_FLDMASK   0x100
 
#define AU_PRTY_REGEN_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define AU_PRTY_REGEN_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define AU_CH_STS_REGEN_DP_ENCODER1_P0_FLDMASK   0x200
 
#define AU_CH_STS_REGEN_DP_ENCODER1_P0_FLDMASK_POS   9
 
#define AU_CH_STS_REGEN_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define AUDIO_VALIDITY_REGEN_DP_ENCODER1_P0_FLDMASK   0x400
 
#define AUDIO_VALIDITY_REGEN_DP_ENCODER1_P0_FLDMASK_POS   10
 
#define AUDIO_VALIDITY_REGEN_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define AUDIO_RESERVED_REGEN_DP_ENCODER1_P0_FLDMASK   0x800
 
#define AUDIO_RESERVED_REGEN_DP_ENCODER1_P0_FLDMASK_POS   11
 
#define AUDIO_RESERVED_REGEN_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define AUDIO_SAMPLE_PRSENT_REGEN_DP_ENCODER1_P0_FLDMASK   0x1000
 
#define AUDIO_SAMPLE_PRSENT_REGEN_DP_ENCODER1_P0_FLDMASK_POS   12
 
#define AUDIO_SAMPLE_PRSENT_REGEN_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define REG_3320_DP_ENCODER1_P0   0x3320
 
#define AUDIO_PATTERN_GEN_DSTB_CNT_THRD_DP_ENCODER1_P0_FLDMASK   0x1ff
 
#define AUDIO_PATTERN_GEN_DSTB_CNT_THRD_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define AUDIO_PATTERN_GEN_DSTB_CNT_THRD_DP_ENCODER1_P0_FLDMASK_LEN   9
 
#define REG_3324_DP_ENCODER1_P0   0x3324
 
#define AUDIO_SOURCE_MUX_DP_ENCODER1_P0_FLDMASK   0x300
 
#define AUDIO_SOURCE_MUX_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define AUDIO_SOURCE_MUX_DP_ENCODER1_P0_FLDMASK_LEN   2
 
#define AUDIO_PATTERN_GEN_CH_NUM_DP_ENCODER1_P0_FLDMASK   0x3000
 
#define AUDIO_PATGEN_CH_NUM_DP_ENCODER1_P0_FLDMASK_POS   12
 
#define AUDIO_PATTERN_GEN_CH_NUM_DP_ENCODER1_P0_FLDMASK_LEN   2
 
#define AUDIO_PATTERN_GEN_FS_SEL_DP_ENCODER1_P0_FLDMASK   0xc000
 
#define AUDIO_PATGEN_FS_SEL_DP_ENCODER1_P0_FLDMASK_POS   14
 
#define AUDIO_PATTERN_GEN_FS_SEL_DP_ENCODER1_P0_FLDMASK_LEN   2
 
#define REG_3328_DP_ENCODER1_P0   0x3328
 
#define VSYNC_DETECT_POL_DP_ENCODER1_P0_FLDMASK   0x1
 
#define VSYNC_DETECT_POL_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VSYNC_DETECT_POL_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define HSYNC_DETECT_POL_DP_ENCODER1_P0_FLDMASK   0x2
 
#define HSYNC_DETECT_POL_DP_ENCODER1_P0_FLDMASK_POS   1
 
#define HSYNC_DETECT_POL_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define HTOTAL_DETECT_STABLE_DP_ENCODER1_P0_FLDMASK   0x4
 
#define HTOTAL_DETECT_STABLE_DP_ENCODER1_P0_FLDMASK_POS   2
 
#define HTOTAL_DETECT_STABLE_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define HDE_DETECT_STABLE_DP_ENCODER1_P0_FLDMASK   0x8
 
#define HDE_DETECT_STABLE_DP_ENCODER1_P0_FLDMASK_POS   3
 
#define HDE_DETECT_STABLE_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define REG_332C_DP_ENCODER1_P0   0x332C
 
#define VTOTAL_DETECT_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define VTOTAL_DETECT_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VTOTAL_DETECT_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_3330_DP_ENCODER1_P0   0x3330
 
#define VDE_DETECT_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define VDE_DETECT_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VDE_DETECT_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_3334_DP_ENCODER1_P0   0x3334
 
#define HTOTAL_DETECT_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define HTOTAL_DETECT_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define HTOTAL_DETECT_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_3338_DP_ENCODER1_P0   0x3338
 
#define HDE_DETECT_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define HDE_DETECT_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define HDE_DETECT_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_3340_DP_ENCODER1_P0   0x3340
 
#define BIST_FAIL_VIDEO_L0_DP_ENCODER1_P0_FLDMASK   0x1
 
#define BIST_FAIL_VIDEO_L0_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define BIST_FAIL_VIDEO_L0_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define BIST_FAIL_VIDEO_L1_DP_ENCODER1_P0_FLDMASK   0x2
 
#define BIST_FAIL_VIDEO_L1_DP_ENCODER1_P0_FLDMASK_POS   1
 
#define BIST_FAIL_VIDEO_L1_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define BIST_FAIL_VIDEO_L2_DP_ENCODER1_P0_FLDMASK   0x4
 
#define BIST_FAIL_VIDEO_L2_DP_ENCODER1_P0_FLDMASK_POS   2
 
#define BIST_FAIL_VIDEO_L2_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define BIST_FAIL_VIDEO_L3_DP_ENCODER1_P0_FLDMASK   0x8
 
#define BIST_FAIL_VIDEO_L3_DP_ENCODER1_P0_FLDMASK_POS   3
 
#define BIST_FAIL_VIDEO_L3_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define BIST_FAIL_AUDIO_L0_DP_ENCODER1_P0_FLDMASK   0x10
 
#define BIST_FAIL_AUDIO_L0_DP_ENCODER1_P0_FLDMASK_POS   4
 
#define BIST_FAIL_AUDIO_L0_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define BIST_FAIL_AUDIO_L1_DP_ENCODER1_P0_FLDMASK   0x20
 
#define BIST_FAIL_AUDIO_L1_DP_ENCODER1_P0_FLDMASK_POS   5
 
#define BIST_FAIL_AUDIO_L1_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define BIST_FAIL_AUDIO_L2_DP_ENCODER1_P0_FLDMASK   0x40
 
#define BIST_FAIL_AUDIO_L2_DP_ENCODER1_P0_FLDMASK_POS   6
 
#define BIST_FAIL_AUDIO_L2_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define BIST_FAIL_AUDIO_L3_DP_ENCODER1_P0_FLDMASK   0x80
 
#define BIST_FAIL_AUDIO_L3_DP_ENCODER1_P0_FLDMASK_POS   7
 
#define BIST_FAIL_AUDIO_L3_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define BIST_FAIL_VSC_VESA_HW_DP_ENCODER1_P0_FLDMASK   0x100
 
#define BIST_FAIL_VSC_VESA_HW_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define BIST_FAIL_VSC_VESA_HW_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define BIST_FAIL_VSC_CEA_HW_DP_ENCODER1_P0_FLDMASK   0x200
 
#define BIST_FAIL_VSC_CEA_HW_DP_ENCODER1_P0_FLDMASK_POS   9
 
#define BIST_FAIL_VSC_CEA_HW_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define BIST_FAIL_VSC_VESA_SW_DP_ENCODER1_P0_FLDMASK   0x400
 
#define BIST_FAIL_VSC_VESA_SW_DP_ENCODER1_P0_FLDMASK_POS   10
 
#define BIST_FAIL_VSC_VESA_SW_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define BIST_FAIL_VSC_CEA_SW_DP_ENCODER1_P0_FLDMASK   0x800
 
#define BIST_FAIL_VSC_CEA_SW_DP_ENCODER1_P0_FLDMASK_POS   11
 
#define BIST_FAIL_VSC_CEA_SW_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define LR_FIELD_SYNC_SEL_DP_ENCODER1_P0_FLDMASK   0x7000
 
#define LR_FIELD_SYNC_SEL_DP_ENCODER1_P0_FLDMASK_POS   12
 
#define LR_FIELD_SYNC_SEL_DP_ENCODER1_P0_FLDMASK_LEN   3
 
#define REG_3344_DP_ENCODER1_P0   0x3344
 
#define DP_CH1_MATRIX_DP_ENCODER1_P0_FLDMASK   0x1f
 
#define DP_CH1_MATRIX_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define DP_CH1_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN   5
 
#define DP_CH2_MATRIX_DP_ENCODER1_P0_FLDMASK   0x1f00
 
#define DP_CH2_MATRIX_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define DP_CH2_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN   5
 
#define REG_3348_DP_ENCODER1_P0   0x3348
 
#define DP_CH3_MATRIX_DP_ENCODER1_P0_FLDMASK   0x1f
 
#define DP_CH3_MATRIX_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define DP_CH3_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN   5
 
#define DP_CH4_MATRIX_DP_ENCODER1_P0_FLDMASK   0x1f00
 
#define DP_CH4_MATRIX_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define DP_CH4_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN   5
 
#define REG_334C_DP_ENCODER1_P0   0x334C
 
#define DP_CH5_MATRIX_DP_ENCODER1_P0_FLDMASK   0x1f
 
#define DP_CH5_MATRIX_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define DP_CH5_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN   5
 
#define DP_CH6_MATRIX_DP_ENCODER1_P0_FLDMASK   0x1f00
 
#define DP_CH6_MATRIX_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define DP_CH6_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN   5
 
#define REG_3350_DP_ENCODER1_P0   0x3350
 
#define DP_CH7_MATRIX_DP_ENCODER1_P0_FLDMASK   0x1f
 
#define DP_CH7_MATRIX_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define DP_CH7_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN   5
 
#define DP_CH8_MATRIX_DP_ENCODER1_P0_FLDMASK   0x1f00
 
#define DP_CH8_MATRIX_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define DP_CH8_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN   5
 
#define REG_3354_DP_ENCODER1_P0   0x3354
 
#define DP_S2P_LAUNCH_CFG_DP_ENCODER1_P0_FLDMASK   0x7f
 
#define DP_S2P_LAUNCH_CFG_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define DP_S2P_LAUNCH_CFG_DP_ENCODER1_P0_FLDMASK_LEN   7
 
#define AUDIO_HAYDN_EN_FORCE_DP_ENCODER1_P0_FLDMASK   0x1000
 
#define AUDIO_HAYDN_EN_FORCE_DP_ENCODER1_P0_FLDMASK_POS   12
 
#define AUDIO_HAYDN_EN_FORCE_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define AUDIO_HAYDN_FORMAT_DP_ENCODER1_P0_FLDMASK   0xf00
 
#define AUDIO_HAYDN_FORMAT_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define AUDIO_HAYDN_FORMAT_DP_ENCODER1_P0_FLDMASK_LEN   4
 
#define REG_3358_DP_ENCODER1_P0   0x3358
 
#define TU_SIZE_DP_ENCODER1_P0_FLDMASK   0x7f
 
#define TU_SIZE_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define TU_SIZE_DP_ENCODER1_P0_FLDMASK_LEN   7
 
#define TU_CALC_SW_DP_ENCODER1_P0_FLDMASK   0x80
 
#define TU_CALC_SW_DP_ENCODER1_P0_FLDMASK_POS   7
 
#define TU_CALC_SW_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define REG_335C_DP_ENCODER1_P0   0x335C
 
#define SYMBOL_DATA_PER_TU_SW_0_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define SYMBOL_DATA_PER_TU_SW_0_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SYMBOL_DATA_PER_TU_SW_0_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_3360_DP_ENCODER1_P0   0x3360
 
#define SYMBOL_DATA_PER_TU_SW_1_DP_ENCODER1_P0_FLDMASK   0x7fff
 
#define SYMBOL_DATA_PER_TU_SW_1_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SYMBOL_DATA_PER_TU_SW_1_DP_ENCODER1_P0_FLDMASK_LEN   15
 
#define REG_3364_DP_ENCODER1_P0   0x3364
 
#define SDP_DOWN_CNT_INIT_IN_HBLANK_DP_ENCODER1_P0_FLDMASK   0xfff
 
#define SDP_DOWN_CNT_INIT_IN_HBLANK_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define SDP_DOWN_CNT_INIT_IN_HBLANK_DP_ENCODER1_P0_FLDMASK_LEN   12
 
#define FIFO_READ_START_POINT_DP_ENCODER1_P0_FLDMASK   0xf000
 
#define FIFO_READ_START_POINT_DP_ENCODER1_P0_FLDMASK_POS   12
 
#define FIFO_READ_START_POINT_DP_ENCODER1_P0_FLDMASK_LEN   4
 
#define REG_3368_DP_ENCODER1_P0   0x3368
 
#define VIDEO_SRAM_FIFO_CNT_RESET_SEL_DP_ENCODER1_P0_FLDMASK   0x3
 
#define VIDEO_SRAM_FIFO_CNT_RESET_SEL_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VIDEO_SRAM_FIFO_CNT_RESET_SEL_DP_ENCODER1_P0_FLDMASK_LEN   2
 
#define VIDEO_STABLE_EN_DP_ENCODER1_P0_FLDMASK   0x4
 
#define VIDEO_STABLE_EN_DP_ENCODER1_P0_FLDMASK_POS   2
 
#define VIDEO_STABLE_EN_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VIDEO_STABLE_CNT_THRD_DP_ENCODER1_P0_FLDMASK   0xf0
 
#define VIDEO_STABLE_CNT_THRD_DP_ENCODER1_P0_FLDMASK_POS   4
 
#define VIDEO_STABLE_CNT_THRD_DP_ENCODER1_P0_FLDMASK_LEN   4
 
#define SDP_DP13_EN_DP_ENCODER1_P0_FLDMASK   0x100
 
#define SDP_DP13_EN_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_DP13_EN_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VIDEO_PIXEL_SWAP_DP_ENCODER1_P0_FLDMASK   0x600
 
#define VIDEO_PIXEL_SWAP_DP_ENCODER1_P0_FLDMASK_POS   9
 
#define VIDEO_PIXEL_SWAP_DP_ENCODER1_P0_FLDMASK_LEN   2
 
#define BS2BS_MODE_DP_ENCODER1_P0_FLDMASK   0x3000
 
#define BS2BS_MODE_DP_ENCODER1_P0_FLDMASK_POS   12
 
#define BS2BS_MODE_DP_ENCODER1_P0_FLDMASK_LEN   2
 
#define REG_336C_DP_ENCODER1_P0   0x336C
 
#define DSC_EN_DP_ENCODER1_P0_FLDMASK   0x1
 
#define DSC_EN_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define DSC_EN_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define DSC_BYTE_SWAP_DP_ENCODER1_P0_FLDMASK   0x2
 
#define DSC_BYTE_SWAP_DP_ENCODER1_P0_FLDMASK_POS   1
 
#define DSC_BYTE_SWAP_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define DSC_SLICE_NUM_DP_ENCODER1_P0_FLDMASK   0xf0
 
#define DSC_SLICE_NUM_DP_ENCODER1_P0_FLDMASK_POS   4
 
#define DSC_SLICE_NUM_DP_ENCODER1_P0_FLDMASK_LEN   4
 
#define DSC_CHUNK_REMAINDER_DP_ENCODER1_P0_FLDMASK   0xf00
 
#define DSC_CHUNK_REMAINDER_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define DSC_CHUNK_REMAINDER_DP_ENCODER1_P0_FLDMASK_LEN   4
 
#define REG_3370_DP_ENCODER1_P0   0x3370
 
#define DSC_CHUNK_NUM_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define DSC_CHUNK_NUM_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define DSC_CHUNK_NUM_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_33AC_DP_ENCODER1_P0   0x33AC
 
#define TEST_CRC_R_CR_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define TEST_CRC_R_CR_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define TEST_CRC_R_CR_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_33B0_DP_ENCODER1_P0   0x33B0
 
#define TEST_CRC_G_Y_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define TEST_CRC_G_Y_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define TEST_CRC_G_Y_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_33B4_DP_ENCODER1_P0   0x33B4
 
#define TEST_CRC_B_CB_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define TEST_CRC_B_CB_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define TEST_CRC_B_CB_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_33B8_DP_ENCODER1_P0   0x33B8
 
#define TEST_CRC_WRAP_CNT_DP_ENCODER1_P0_FLDMASK   0xf
 
#define TEST_CRC_WRAP_CNT_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define TEST_CRC_WRAP_CNT_DP_ENCODER1_P0_FLDMASK_LEN   4
 
#define CRC_COLOR_FORMAT_DP_ENCODER1_P0_FLDMASK   0x1f0
 
#define CRC_COLOR_FORMAT_DP_ENCODER1_P0_FLDMASK_POS   4
 
#define CRC_COLOR_FORMAT_DP_ENCODER1_P0_FLDMASK_LEN   5
 
#define CRC_TEST_SINK_START_DP_ENCODER1_P0_FLDMASK   0x200
 
#define CRC_TEST_SINK_START_DP_ENCODER1_P0_FLDMASK_POS   9
 
#define CRC_TEST_SINK_START_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define REG_33BC_DP_ENCODER1_P0   0x33BC
 
#define CRC_TEST_CONFIG_DP_ENCODER1_P0_FLDMASK   0x1fff
 
#define CRC_TEST_CONFIG_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define CRC_TEST_CONFIG_DP_ENCODER1_P0_FLDMASK_LEN   13
 
#define REG_33C0_DP_ENCODER1_P0   0x33C0
 
#define VIDEO_TU_VALUE_DP_ENCODER1_P0_FLDMASK   0x7f
 
#define VIDEO_TU_VALUE_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VIDEO_TU_VALUE_DP_ENCODER1_P0_FLDMASK_LEN   7
 
#define DP_TX_MIXER_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK   0xf00
 
#define DP_TX_MIXER_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define DP_TX_MIXER_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_LEN   4
 
#define DP_TX_SDP_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK   0xf000
 
#define DP_TX_SDP_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_POS   12
 
#define DP_TX_SDP_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_LEN   4
 
#define REG_33C4_DP_ENCODER1_P0   0x33C4
 
#define DP_TX_VIDEO_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK   0x1f
 
#define DP_TX_VIDEO_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define DP_TX_VIDEO_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_LEN   5
 
#define DP_TX_ENCODER_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK   0x60
 
#define DP_TX_ENCODER_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_POS   5
 
#define DP_TX_ENCODER_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_LEN   2
 
#define REG_33C8_DP_ENCODER1_P0   0x33C8
 
#define VIDEO_M_CODE_READ_0_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define VIDEO_M_CODE_READ_0_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VIDEO_M_CODE_READ_0_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_33CC_DP_ENCODER1_P0   0x33CC
 
#define VIDEO_M_CODE_READ_1_DP_ENCODER1_P0_FLDMASK   0xff
 
#define VIDEO_M_CODE_READ_1_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VIDEO_M_CODE_READ_1_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_33D0_DP_ENCODER1_P0   0x33D0
 
#define AUDIO_M_CODE_READ_0_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define AUDIO_M_CODE_READ_0_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define AUDIO_M_CODE_READ_0_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_33D4_DP_ENCODER1_P0   0x33D4
 
#define AUDIO_M_CODE_READ_1_DP_ENCODER1_P0_FLDMASK   0xff
 
#define AUDIO_M_CODE_READ_1_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define AUDIO_M_CODE_READ_1_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define REG_33D8_DP_ENCODER1_P0   0x33D8
 
#define VSC_EXT_CFG_DP_ENCODER1_P0_FLDMASK   0xff
 
#define VSC_EXT_CFG_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VSC_EXT_CFG_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define SDP_SPLIT_FIFO_EMPTY_DP_ENCODER1_P0_FLDMASK   0x100
 
#define SDP_SPLIT_FIFO_EMPTY_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define SDP_SPLIT_FIFO_EMPTY_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define SDP_SPLIT_FIFO_FULL_DP_ENCODER1_P0_FLDMASK   0x200
 
#define SDP_SPLIT_FIFO_FULL_DP_ENCODER1_P0_FLDMASK_POS   9
 
#define SDP_SPLIT_FIFO_FULL_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define SDP_SPLIT_FIFO_FULL_CLR_DP_ENCODER1_P0_FLDMASK   0x400
 
#define SDP_SPLIT_FIFO_FULL_CLR_DP_ENCODER1_P0_FLDMASK_POS   10
 
#define SDP_SPLIT_FIFO_FULL_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define SDP_SPLIT_INSERT_INVALID_CNT_THRD_DP_ENCODER1_P0_FLDMASK   0xf000
 
#define SDP_SPLIT_INSERT_INVALID_CNT_THRD_DP_ENCODER1_P0_FLDMASK_POS   12
 
#define SDP_SPLIT_INSERT_INVALID_CNT_THRD_DP_ENCODER1_P0_FLDMASK_LEN   4
 
#define REG_33DC_DP_ENCODER1_P0   0x33DC
 
#define VIDEO_SRAM0_FULL_DP_ENCODER1_P0_FLDMASK   0x1
 
#define VIDEO_SRAM0_FULL_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define VIDEO_SRAM0_FULL_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VIDEO_SRAM0_FULL_CLR_DP_ENCODER1_P0_FLDMASK   0x2
 
#define VIDEO_SRAM0_FULL_CLR_DP_ENCODER1_P0_FLDMASK_POS   1
 
#define VIDEO_SRAM0_FULL_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VIDEO_SRAM1_FULL_DP_ENCODER1_P0_FLDMASK   0x4
 
#define VIDEO_SRAM1_FULL_DP_ENCODER1_P0_FLDMASK_POS   2
 
#define VIDEO_SRAM1_FULL_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VIDEO_SRAM1_FULL_CLR_DP_ENCODER1_P0_FLDMASK   0x8
 
#define VIDEO_SRAM1_FULL_CLR_DP_ENCODER1_P0_FLDMASK_POS   3
 
#define VIDEO_SRAM1_FULL_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VIDEO_SRAM2_FULL_DP_ENCODER1_P0_FLDMASK   0x10
 
#define VIDEO_SRAM2_FULL_DP_ENCODER1_P0_FLDMASK_POS   4
 
#define VIDEO_SRAM2_FULL_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VIDEO_SRAM2_FULL_CLR_DP_ENCODER1_P0_FLDMASK   0x20
 
#define VIDEO_SRAM2_FULL_CLR_DP_ENCODER1_P0_FLDMASK_POS   5
 
#define VIDEO_SRAM2_FULL_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VIDEO_SRAM3_FULL_DP_ENCODER1_P0_FLDMASK   0x40
 
#define VIDEO_SRAM3_FULL_DP_ENCODER1_P0_FLDMASK_POS   6
 
#define VIDEO_SRAM3_FULL_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VIDEO_SRAM3_FULL_CLR_DP_ENCODER1_P0_FLDMASK   0x80
 
#define VIDEO_SRAM3_FULL_CLR_DP_ENCODER1_P0_FLDMASK_POS   7
 
#define VIDEO_SRAM3_FULL_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VIDEO_SRAM0_EMPTY_DP_ENCODER1_P0_FLDMASK   0x100
 
#define VIDEO_SRAM0_EMPTY_DP_ENCODER1_P0_FLDMASK_POS   8
 
#define VIDEO_SRAM0_EMPTY_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VIDEO_SRAM0_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK   0x200
 
#define VIDEO_SRAM0_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_POS   9
 
#define VIDEO_SRAM0_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VIDEO_SRAM1_EMPTY_DP_ENCODER1_P0_FLDMASK   0x400
 
#define VIDEO_SRAM1_EMPTY_DP_ENCODER1_P0_FLDMASK_POS   10
 
#define VIDEO_SRAM1_EMPTY_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VIDEO_SRAM1_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK   0x800
 
#define VIDEO_SRAM1_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_POS   11
 
#define VIDEO_SRAM1_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VIDEO_SRAM2_EMPTY_DP_ENCODER1_P0_FLDMASK   0x1000
 
#define VIDEO_SRAM2_EMPTY_DP_ENCODER1_P0_FLDMASK_POS   12
 
#define VIDEO_SRAM2_EMPTY_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VIDEO_SRAM2_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK   0x2000
 
#define VIDEO_SRAM2_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_POS   13
 
#define VIDEO_SRAM2_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VIDEO_SRAM3_EMPTY_DP_ENCODER1_P0_FLDMASK   0x4000
 
#define VIDEO_SRAM3_EMPTY_DP_ENCODER1_P0_FLDMASK_POS   14
 
#define VIDEO_SRAM3_EMPTY_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define VIDEO_SRAM3_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK   0x8000
 
#define VIDEO_SRAM3_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_POS   15
 
#define VIDEO_SRAM3_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define REG_33E0_DP_ENCODER1_P0   0x33E0
 
#define BS2BS_CNT_SW_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define BS2BS_CNT_SW_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define BS2BS_CNT_SW_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_33E4_DP_ENCODER1_P0   0x33E4
 
#define MIXER_STATE_0_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define MIXER_STATE_0_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define MIXER_STATE_0_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_33E8_DP_ENCODER1_P0   0x33E8
 
#define MIXER_STATE_1_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define MIXER_STATE_1_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define MIXER_STATE_1_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_33EC_DP_ENCODER1_P0   0x33EC
 
#define MIXER_STATE_2_DP_ENCODER1_P0_FLDMASK   0xff
 
#define MIXER_STATE_2_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define MIXER_STATE_2_DP_ENCODER1_P0_FLDMASK_LEN   8
 
#define VIDEO_PERIOD_ENABLE_DP_ENCODER1_P0_FLDMASK   0x200
 
#define VIDEO_PERIOD_ENABLE_DP_ENCODER1_P0_FLDMASK_POS   9
 
#define VIDEO_PERIOD_ENABLE_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define BS2BS_CNT_SW_SEL_DP_ENCODER1_P0_FLDMASK   0x400
 
#define BS2BS_CNT_SW_SEL_DP_ENCODER1_P0_FLDMASK_POS   10
 
#define BS2BS_CNT_SW_SEL_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define AUDIO_SRAM_FULL_DP_ENCODER1_P0_FLDMASK   0x800
 
#define AUDIO_SRAM_FULL_DP_ENCODER1_P0_FLDMASK_POS   11
 
#define AUDIO_SRAM_FULL_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define AUDIO_SRAM_FULL_CLR_DP_ENCODER1_P0_FLDMASK   0x1000
 
#define AUDIO_SRAM_FULL_CLR_DP_ENCODER1_P0_FLDMASK_POS   12
 
#define AUDIO_SRAM_FULL_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define AUDIO_SRAM_EMPTY_DP_ENCODER1_P0_FLDMASK   0x2000
 
#define AUDIO_SRAM_EMPTY_DP_ENCODER1_P0_FLDMASK_POS   13
 
#define AUDIO_SRAM_EMPTY_DP_ENCODER1_P0_FLDMASK_LEN   1
 
#define REG_33F0_DP_ENCODER1_P0   0x33F0
 
#define DP_ENCODER_DUMMY_RW_0_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define DP_ENCODER_DUMMY_RW_0_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define DP_ENCODER_DUMMY_RW_0_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_33F4_DP_ENCODER1_P0   0x33F4
 
#define DP_ENCODER_DUMMY_RW_1_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define DP_ENCODER_DUMMY_RW_1_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define DP_ENCODER_DUMMY_RW_1_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_33F8_DP_ENCODER1_P0   0x33F8
 
#define DP_ENCODER_DUMMY_R_0_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define DP_ENCODER_DUMMY_R_0_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define DP_ENCODER_DUMMY_R_0_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_33FC_DP_ENCODER1_P0   0x33FC
 
#define DP_ENCODER_DUMMY_R_1_DP_ENCODER1_P0_FLDMASK   0xffff
 
#define DP_ENCODER_DUMMY_R_1_DP_ENCODER1_P0_FLDMASK_POS   0
 
#define DP_ENCODER_DUMMY_R_1_DP_ENCODER1_P0_FLDMASK_LEN   16
 
#define REG_3400_DP_TRANS_P0   0x3400
 
#define PRE_MISC_LANE0_MUX_DP_TRANS_P0_FLDMASK   0x3
 
#define PRE_MISC_LANE0_MUX_DP_TRANS_P0_FLDMASK_POS   0
 
#define PRE_MISC_LANE0_MUX_DP_TRANS_P0_FLDMASK_LEN   2
 
#define PRE_MISC_LANE1_MUX_DP_TRANS_P0_FLDMASK   0xc
 
#define PRE_MISC_LANE1_MUX_DP_TRANS_P0_FLDMASK_POS   2
 
#define PRE_MISC_LANE1_MUX_DP_TRANS_P0_FLDMASK_LEN   2
 
#define PRE_MISC_LANE2_MUX_DP_TRANS_P0_FLDMASK   0x30
 
#define PRE_MISC_LANE2_MUX_DP_TRANS_P0_FLDMASK_POS   4
 
#define PRE_MISC_LANE2_MUX_DP_TRANS_P0_FLDMASK_LEN   2
 
#define PRE_MISC_LANE3_MUX_DP_TRANS_P0_FLDMASK   0xc0
 
#define PRE_MISC_LANE3_MUX_DP_TRANS_P0_FLDMASK_POS   6
 
#define PRE_MISC_LANE3_MUX_DP_TRANS_P0_FLDMASK_LEN   2
 
#define PRE_MISC_PORT_MUX_DP_TRANS_P0_FLDMASK   0x700
 
#define PRE_MISC_PORT_MUX_DP_TRANS_P0_FLDMASK_POS   8
 
#define PRE_MISC_PORT_MUX_DP_TRANS_P0_FLDMASK_LEN   3
 
#define HDCP_SEL_DP_TRANS_P0_FLDMASK   0x800
 
#define HDCP_SEL_DP_TRANS_P0_FLDMASK_POS   11
 
#define HDCP_SEL_DP_TRANS_P0_FLDMASK_LEN   1
 
#define PATTERN1_EN_DP_TRANS_P0_FLDMASK   0x1000
 
#define PATTERN1_EN_DP_TRANS_P0_FLDMASK_POS   12
 
#define PATTERN1_EN_DP_TRANS_P0_FLDMASK_LEN   1
 
#define PATTERN2_EN_DP_TRANS_P0_FLDMASK   0x2000
 
#define PATTERN2_EN_DP_TRANS_P0_FLDMASK_POS   13
 
#define PATTERN2_EN_DP_TRANS_P0_FLDMASK_LEN   1
 
#define PATTERN3_EN_DP_TRANS_P0_FLDMASK   0x4000
 
#define PATTERN3_EN_DP_TRANS_P0_FLDMASK_POS   14
 
#define PATTERN3_EN_DP_TRANS_P0_FLDMASK_LEN   1
 
#define PATTERN4_EN_DP_TRANS_P0_FLDMASK   0x8000
 
#define PATTERN4_EN_DP_TRANS_P0_FLDMASK_POS   15
 
#define PATTERN4_EN_DP_TRANS_P0_FLDMASK_LEN   1
 
#define REG_3404_DP_TRANS_P0   0x3404
 
#define DP_SCR_EN_DP_TRANS_P0_FLDMASK   0x1
 
#define DP_SCR_EN_DP_TRANS_P0_FLDMASK_POS   0
 
#define DP_SCR_EN_DP_TRANS_P0_FLDMASK_LEN   1
 
#define ALTER_SCRAMBLER_RESET_EN_DP_TRANS_P0_FLDMASK   0x2
 
#define ALTER_SCRAMBLER_RESET_EN_DP_TRANS_P0_FLDMASK_POS   1
 
#define ALTER_SCRAMBLER_RESET_EN_DP_TRANS_P0_FLDMASK_LEN   1
 
#define SCRAMB_BYPASS_IN_EN_DP_TRANS_P0_FLDMASK   0x4
 
#define SCRAMB_BYPASS_IN_EN_DP_TRANS_P0_FLDMASK_POS   2
 
#define SCRAMB_BYPASS_IN_EN_DP_TRANS_P0_FLDMASK_LEN   1
 
#define SCRAMB_BYPASS_MASK_DP_TRANS_P0_FLDMASK   0x8
 
#define SCRAMB_BYPASS_MASK_DP_TRANS_P0_FLDMASK_POS   3
 
#define SCRAMB_BYPASS_MASK_DP_TRANS_P0_FLDMASK_LEN   1
 
#define INDEX_SCR_MODE_DP_TRANS_P0_FLDMASK   0x30
 
#define INDEX_SCR_MODE_DP_TRANS_P0_FLDMASK_POS   4
 
#define INDEX_SCR_MODE_DP_TRANS_P0_FLDMASK_LEN   2
 
#define PAT_INIT_DISPARITY_DP_TRANS_P0_FLDMASK   0x40
 
#define PAT_INIT_DISPARITY_DP_TRANS_P0_FLDMASK_POS   6
 
#define PAT_INIT_DISPARITY_DP_TRANS_P0_FLDMASK_LEN   1
 
#define TPS_DISPARITY_RESET_DP_TRANS_P0_FLDMASK   0x80
 
#define TPS_DISPARITY_RESET_DP_TRANS_P0_FLDMASK_POS   7
 
#define TPS_DISPARITY_RESET_DP_TRANS_P0_FLDMASK_LEN   1
 
#define REG_3408_DP_TRANS_P0   0x3408
 
#define LANE_SKEW_SEL_LANE0_DP_TRANS_P0_FLDMASK   0x3
 
#define LANE_SKEW_SEL_LANE0_DP_TRANS_P0_FLDMASK_POS   0
 
#define LANE_SKEW_SEL_LANE0_DP_TRANS_P0_FLDMASK_LEN   2
 
#define LANE_SKEW_SEL_LANE1_DP_TRANS_P0_FLDMASK   0xc
 
#define LANE_SKEW_SEL_LANE1_DP_TRANS_P0_FLDMASK_POS   2
 
#define LANE_SKEW_SEL_LANE1_DP_TRANS_P0_FLDMASK_LEN   2
 
#define LANE_SKEW_SEL_LANE2_DP_TRANS_P0_FLDMASK   0x30
 
#define LANE_SKEW_SEL_LANE2_DP_TRANS_P0_FLDMASK_POS   4
 
#define LANE_SKEW_SEL_LANE2_DP_TRANS_P0_FLDMASK_LEN   2
 
#define LANE_SKEW_SEL_LANE3_DP_TRANS_P0_FLDMASK   0xc0
 
#define LANE_SKEW_SEL_LANE3_DP_TRANS_P0_FLDMASK_POS   6
 
#define LANE_SKEW_SEL_LANE3_DP_TRANS_P0_FLDMASK_LEN   2
 
#define POST_MISC_LANE0_MUX_DP_TRANS_P0_FLDMASK   0x300
 
#define POST_MISC_LANE0_MUX_DP_TRANS_P0_FLDMASK_POS   8
 
#define POST_MISC_LANE0_MUX_DP_TRANS_P0_FLDMASK_LEN   2
 
#define POST_MISC_LANE1_MUX_DP_TRANS_P0_FLDMASK   0xc00
 
#define POST_MISC_LANE1_MUX_DP_TRANS_P0_FLDMASK_POS   10
 
#define POST_MISC_LANE1_MUX_DP_TRANS_P0_FLDMASK_LEN   2
 
#define POST_MISC_LANE2_MUX_DP_TRANS_P0_FLDMASK   0x3000
 
#define POST_MISC_LANE2_MUX_DP_TRANS_P0_FLDMASK_POS   12
 
#define POST_MISC_LANE2_MUX_DP_TRANS_P0_FLDMASK_LEN   2
 
#define POST_MISC_LANE3_MUX_DP_TRANS_P0_FLDMASK   0xc000
 
#define POST_MISC_LANE3_MUX_DP_TRANS_P0_FLDMASK_POS   14
 
#define POST_MISC_LANE3_MUX_DP_TRANS_P0_FLDMASK_LEN   2
 
#define REG_340C_DP_TRANS_P0   0x340C
 
#define TOP_RESET_SW_DP_TRANS_P0_FLDMASK   0x100
 
#define TOP_RESET_SW_DP_TRANS_P0_FLDMASK_POS   8
 
#define TOP_RESET_SW_DP_TRANS_P0_FLDMASK_LEN   1
 
#define LANE0_RESET_SW_DP_TRANS_P0_FLDMASK   0x200
 
#define LANE0_RESET_SW_DP_TRANS_P0_FLDMASK_POS   9
 
#define LANE0_RESET_SW_DP_TRANS_P0_FLDMASK_LEN   1
 
#define LANE1_RESET_SW_DP_TRANS_P0_FLDMASK   0x400
 
#define LANE1_RESET_SW_DP_TRANS_P0_FLDMASK_POS   10
 
#define LANE1_RESET_SW_DP_TRANS_P0_FLDMASK_LEN   1
 
#define LANE2_RESET_SW_DP_TRANS_P0_FLDMASK   0x800
 
#define LANE2_RESET_SW_DP_TRANS_P0_FLDMASK_POS   11
 
#define LANE2_RESET_SW_DP_TRANS_P0_FLDMASK_LEN   1
 
#define LANE3_RESET_SW_DP_TRANS_P0_FLDMASK   0x1000
 
#define LANE3_RESET_SW_DP_TRANS_P0_FLDMASK_POS   12
 
#define LANE3_RESET_SW_DP_TRANS_P0_FLDMASK_LEN   1
 
#define DP_TX_TRANSMITTER_4P_RESET_SW_DP_TRANS_P0_FLDMASK   0x2000
 
#define DP_TX_TRANSMITTER_4P_RESET_SW_DP_TRANS_P0_FLDMASK_POS   13
 
#define DP_TX_TRANSMITTER_4P_RESET_SW_DP_TRANS_P0_FLDMASK_LEN   1
 
#define HDCP13_RST_SW_DP_TRANS_P0_FLDMASK   0x4000
 
#define HDCP13_RST_SW_DP_TRANS_P0_FLDMASK_POS   14
 
#define HDCP13_RST_SW_DP_TRANS_P0_FLDMASK_LEN   1
 
#define HDCP22_RST_SW_DP_TRANS_P0_FLDMASK   0x8000
 
#define HDCP22_RST_SW_DP_TRANS_P0_FLDMASK_POS   15
 
#define HDCP22_RST_SW_DP_TRANS_P0_FLDMASK_LEN   1
 
#define REG_3410_DP_TRANS_P0   0x3410
 
#define HPD_DEB_THD_DP_TRANS_P0_FLDMASK   0xf
 
#define HPD_DEB_THD_DP_TRANS_P0_FLDMASK_POS   0
 
#define HPD_DEB_THD_DP_TRANS_P0_FLDMASK_LEN   4
 
#define HPD_INT_THD_DP_TRANS_P0_FLDMASK   0xf0
 
#define HPD_INT_THD_DP_TRANS_P0_FLDMASK_POS   4
 
#define HPD_INT_THD_DP_TRANS_P0_FLDMASK_LEN   4
 
#define HPD_DISC_THD_DP_TRANS_P0_FLDMASK   0xf00
 
#define HPD_DISC_THD_DP_TRANS_P0_FLDMASK_POS   8
 
#define HPD_DISC_THD_DP_TRANS_P0_FLDMASK_LEN   4
 
#define HPD_CONN_THD_DP_TRANS_P0_FLDMASK   0xf000
 
#define HPD_CONN_THD_DP_TRANS_P0_FLDMASK_POS   12
 
#define HPD_CONN_THD_DP_TRANS_P0_FLDMASK_LEN   4
 
#define REG_3414_DP_TRANS_P0   0x3414
 
#define HPD_OVR_EN_DP_TRANS_P0_FLDMASK   0x1
 
#define HPD_OVR_EN_DP_TRANS_P0_FLDMASK_POS   0
 
#define HPD_OVR_EN_DP_TRANS_P0_FLDMASK_LEN   1
 
#define HPD_SET_DP_TRANS_P0_FLDMASK   0x2
 
#define HPD_SET_DP_TRANS_P0_FLDMASK_POS   1
 
#define HPD_SET_DP_TRANS_P0_FLDMASK_LEN   1
 
#define HPD_DB_DP_TRANS_P0_FLDMASK   0x4
 
#define HPD_DB_DP_TRANS_P0_FLDMASK_POS   2
 
#define HPD_DB_DP_TRANS_P0_FLDMASK_LEN   1
 
#define REG_3418_DP_TRANS_P0   0x3418
 
#define IRQ_CLR_DP_TRANS_P0_FLDMASK   0xf
 
#define IRQ_CLR_DP_TRANS_P0_FLDMASK_POS   0
 
#define IRQ_CLR_DP_TRANS_P0_FLDMASK_LEN   4
 
#define IRQ_MASK_DP_TRANS_P0_FLDMASK   0xf0
 
#define IRQ_MASK_DP_TRANS_P0_FLDMASK_POS   4
 
#define IRQ_MASK_DP_TRANS_P0_FLDMASK_LEN   4
 
#define IRQ_FORCE_DP_TRANS_P0_FLDMASK   0xf00
 
#define IRQ_FORCE_DP_TRANS_P0_FLDMASK_POS   8
 
#define IRQ_FORCE_DP_TRANS_P0_FLDMASK_LEN   4
 
#define IRQ_STATUS_DP_TRANS_P0_FLDMASK   0xf000
 
#define IRQ_STATUS_DP_TRANS_P0_FLDMASK_POS   12
 
#define IRQ_STATUS_DP_TRANS_P0_FLDMASK_LEN   4
 
#define REG_341C_DP_TRANS_P0   0x341C
 
#define IRQ_CLR_51_DP_TRANS_P0_FLDMASK   0xf
 
#define IRQ_CLR_51_DP_TRANS_P0_FLDMASK_POS   0
 
#define IRQ_CLR_51_DP_TRANS_P0_FLDMASK_LEN   4
 
#define IRQ_MASK_51_DP_TRANS_P0_FLDMASK   0xf0
 
#define IRQ_MASK_51_DP_TRANS_P0_FLDMASK_POS   4
 
#define IRQ_MASK_51_DP_TRANS_P0_FLDMASK_LEN   4
 
#define IRQ_FORCE_51_DP_TRANS_P0_FLDMASK   0xf00
 
#define IRQ_FORCE_51_DP_TRANS_P0_FLDMASK_POS   8
 
#define IRQ_FORCE_51_DP_TRANS_P0_FLDMASK_LEN   4
 
#define IRQ_STATUS_51_DP_TRANS_P0_FLDMASK   0xf000
 
#define IRQ_STATUS_51_DP_TRANS_P0_FLDMASK_POS   12
 
#define IRQ_STATUS_51_DP_TRANS_P0_FLDMASK_LEN   4
 
#define REG_3420_DP_TRANS_P0   0x3420
 
#define HPD_STATUS_DP_TRANS_P0_FLDMASK   0x1
 
#define HPD_STATUS_DP_TRANS_P0_FLDMASK_POS   0
 
#define HPD_STATUS_DP_TRANS_P0_FLDMASK_LEN   1
 
#define REG_3428_DP_TRANS_P0   0x3428
 
#define POST_MISC_BIT_REVERSE_EN_LANE0_DP_TRANS_P0_FLDMASK   0x1
 
#define POST_MISC_BIT_REVERSE_EN_LANE0_DP_TRANS_P0_FLDMASK_POS   0
 
#define POST_MISC_BIT_REVERSE_EN_LANE0_DP_TRANS_P0_FLDMASK_LEN   1
 
#define POST_MISC_BIT_REVERSE_EN_LANE1_DP_TRANS_P0_FLDMASK   0x2
 
#define POST_MISC_BIT_REVERSE_EN_LANE1_DP_TRANS_P0_FLDMASK_POS   1
 
#define POST_MISC_BIT_REVERSE_EN_LANE1_DP_TRANS_P0_FLDMASK_LEN   1
 
#define POST_MISC_BIT_REVERSE_EN_LANE2_DP_TRANS_P0_FLDMASK   0x4
 
#define POST_MISC_BIT_REVERSE_EN_LANE2_DP_TRANS_P0_FLDMASK_POS   2
 
#define POST_MISC_BIT_REVERSE_EN_LANE2_DP_TRANS_P0_FLDMASK_LEN   1
 
#define POST_MISC_BIT_REVERSE_EN_LANE3_DP_TRANS_P0_FLDMASK   0x8
 
#define POST_MISC_BIT_REVERSE_EN_LANE3_DP_TRANS_P0_FLDMASK_POS   3
 
#define POST_MISC_BIT_REVERSE_EN_LANE3_DP_TRANS_P0_FLDMASK_LEN   1
 
#define POST_MISC_PN_SWAP_EN_LANE0_DP_TRANS_P0_FLDMASK   0x10
 
#define POST_MISC_PN_SWAP_EN_LANE0_DP_TRANS_P0_FLDMASK_POS   4
 
#define POST_MISC_PN_SWAP_EN_LANE0_DP_TRANS_P0_FLDMASK_LEN   1
 
#define POST_MISC_PN_SWAP_EN_LANE1_DP_TRANS_P0_FLDMASK   0x20
 
#define POST_MISC_PN_SWAP_EN_LANE1_DP_TRANS_P0_FLDMASK_POS   5
 
#define POST_MISC_PN_SWAP_EN_LANE1_DP_TRANS_P0_FLDMASK_LEN   1
 
#define POST_MISC_PN_SWAP_EN_LANE2_DP_TRANS_P0_FLDMASK   0x40
 
#define POST_MISC_PN_SWAP_EN_LANE2_DP_TRANS_P0_FLDMASK_POS   6
 
#define POST_MISC_PN_SWAP_EN_LANE2_DP_TRANS_P0_FLDMASK_LEN   1
 
#define POST_MISC_PN_SWAP_EN_LANE3_DP_TRANS_P0_FLDMASK   0x80
 
#define POST_MISC_PN_SWAP_EN_LANE3_DP_TRANS_P0_FLDMASK_POS   7
 
#define POST_MISC_PN_SWAP_EN_LANE3_DP_TRANS_P0_FLDMASK_LEN   1
 
#define POST_MISC_DATA_SWAP_EN_LANE0_DP_TRANS_P0_FLDMASK   0x100
 
#define POST_MISC_DATA_SWAP_EN_LANE0_DP_TRANS_P0_FLDMASK_POS   8
 
#define POST_MISC_DATA_SWAP_EN_LANE0_DP_TRANS_P0_FLDMASK_LEN   1
 
#define POST_MISC_DATA_SWAP_EN_LANE1_DP_TRANS_P0_FLDMASK   0x200
 
#define POST_MISC_DATA_SWAP_EN_LANE1_DP_TRANS_P0_FLDMASK_POS   9
 
#define POST_MISC_DATA_SWAP_EN_LANE1_DP_TRANS_P0_FLDMASK_LEN   1
 
#define POST_MISC_DATA_SWAP_EN_LANE2_DP_TRANS_P0_FLDMASK   0x400
 
#define POST_MISC_DATA_SWAP_EN_LANE2_DP_TRANS_P0_FLDMASK_POS   10
 
#define POST_MISC_DATA_SWAP_EN_LANE2_DP_TRANS_P0_FLDMASK_LEN   1
 
#define POST_MISC_DATA_SWAP_EN_LANE3_DP_TRANS_P0_FLDMASK   0x800
 
#define POST_MISC_DATA_SWAP_EN_LANE3_DP_TRANS_P0_FLDMASK_POS   11
 
#define POST_MISC_DATA_SWAP_EN_LANE3_DP_TRANS_P0_FLDMASK_LEN   1
 
#define REG_342C_DP_TRANS_P0   0x342C
 
#define XTAL_FREQ_DP_TRANS_P0_FLDMASK   0xff
 
#define XTAL_FREQ_DP_TRANS_P0_FLDMASK_POS   0
 
#define XTAL_FREQ_DP_TRANS_P0_FLDMASK_LEN   8
 
#define REG_3430_DP_TRANS_P0   0x3430
 
#define HPD_INT_THD_ECO_DP_TRANS_P0_FLDMASK   0x3
 
#define HPD_INT_THD_ECO_DP_TRANS_P0_FLDMASK_POS   0
 
#define HPD_INT_THD_ECO_DP_TRANS_P0_FLDMASK_LEN   2
 
#define REG_3440_DP_TRANS_P0   0x3440
 
#define PGM_PAT_EN_DP_TRANS_P0_FLDMASK   0xf
 
#define PGM_PAT_EN_DP_TRANS_P0_FLDMASK_POS   0
 
#define PGM_PAT_EN_DP_TRANS_P0_FLDMASK_LEN   4
 
#define PGM_PAT_SEL_L0_DP_TRANS_P0_FLDMASK   0x70
 
#define PGM_PAT_SEL_L0_DP_TRANS_P0_FLDMASK_POS   4
 
#define PGM_PAT_SEL_L0_DP_TRANS_P0_FLDMASK_LEN   3
 
#define PGM_PAT_SEL_L1_DP_TRANS_P0_FLDMASK   0x700
 
#define PGM_PAT_SEL_L1_DP_TRANS_P0_FLDMASK_POS   8
 
#define PGM_PAT_SEL_L1_DP_TRANS_P0_FLDMASK_LEN   3
 
#define PGM_PAT_SEL_L2_DP_TRANS_P0_FLDMASK   0x7000
 
#define PGM_PAT_SEL_L2_DP_TRANS_P0_FLDMASK_POS   12
 
#define PGM_PAT_SEL_L2_DP_TRANS_P0_FLDMASK_LEN   3
 
#define REG_3444_DP_TRANS_P0   0x3444
 
#define PGM_PAT_SEL_L3_DP_TRANS_P0_FLDMASK   0x7
 
#define PGM_PAT_SEL_L3_DP_TRANS_P0_FLDMASK_POS   0
 
#define PGM_PAT_SEL_L3_DP_TRANS_P0_FLDMASK_LEN   3
 
#define PRBS_EN_DP_TRANS_P0_FLDMASK   0x8
 
#define PRBS_EN_DP_TRANS_P0_FLDMASK_POS   3
 
#define PRBS_EN_DP_TRANS_P0_FLDMASK_LEN   1
 
#define REG_3448_DP_TRANS_P0   0x3448
 
#define PGM_PAT_L0_0_DP_TRANS_P0_FLDMASK   0xffff
 
#define PGM_PAT_L0_0_DP_TRANS_P0_FLDMASK_POS   0
 
#define PGM_PAT_L0_0_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_344C_DP_TRANS_P0   0x344C
 
#define PGM_PAT_L0_1_DP_TRANS_P0_FLDMASK   0xffff
 
#define PGM_PAT_L0_1_DP_TRANS_P0_FLDMASK_POS   0
 
#define PGM_PAT_L0_1_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_3450_DP_TRANS_P0   0x3450
 
#define PGM_PAT_L0_2_DP_TRANS_P0_FLDMASK   0xff
 
#define PGM_PAT_L0_2_DP_TRANS_P0_FLDMASK_POS   0
 
#define PGM_PAT_L0_2_DP_TRANS_P0_FLDMASK_LEN   8
 
#define REG_3454_DP_TRANS_P0   0x3454
 
#define PGM_PAT_L1_0_DP_TRANS_P0_FLDMASK   0xffff
 
#define PGM_PAT_L1_0_DP_TRANS_P0_FLDMASK_POS   0
 
#define PGM_PAT_L1_0_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_3458_DP_TRANS_P0   0x3458
 
#define PGM_PAT_L1_1_DP_TRANS_P0_FLDMASK   0xffff
 
#define PGM_PAT_L1_1_DP_TRANS_P0_FLDMASK_POS   0
 
#define PGM_PAT_L1_1_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_345C_DP_TRANS_P0   0x345C
 
#define PGM_PAT_L1_2_DP_TRANS_P0_FLDMASK   0xff
 
#define PGM_PAT_L1_2_DP_TRANS_P0_FLDMASK_POS   0
 
#define PGM_PAT_L1_2_DP_TRANS_P0_FLDMASK_LEN   8
 
#define REG_3460_DP_TRANS_P0   0x3460
 
#define PGM_PAT_L2_0_DP_TRANS_P0_FLDMASK   0xffff
 
#define PGM_PAT_L2_0_DP_TRANS_P0_FLDMASK_POS   0
 
#define PGM_PAT_L2_0_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_3464_DP_TRANS_P0   0x3464
 
#define PGM_PAT_L2_1_DP_TRANS_P0_FLDMASK   0xffff
 
#define PGM_PAT_L2_1_DP_TRANS_P0_FLDMASK_POS   0
 
#define PGM_PAT_L2_1_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_3468_DP_TRANS_P0   0x3468
 
#define PGM_PAT_L2_2_DP_TRANS_P0_FLDMASK   0xff
 
#define PGM_PAT_L2_2_DP_TRANS_P0_FLDMASK_POS   0
 
#define PGM_PAT_L2_2_DP_TRANS_P0_FLDMASK_LEN   8
 
#define REG_346C_DP_TRANS_P0   0x346C
 
#define PGM_PAT_L3_0_DP_TRANS_P0_FLDMASK   0xffff
 
#define PGM_PAT_L3_0_DP_TRANS_P0_FLDMASK_POS   0
 
#define PGM_PAT_L3_0_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_3470_DP_TRANS_P0   0x3470
 
#define PGM_PAT_L3_1_DP_TRANS_P0_FLDMASK   0xffff
 
#define PGM_PAT_L3_1_DP_TRANS_P0_FLDMASK_POS   0
 
#define PGM_PAT_L3_1_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_3474_DP_TRANS_P0   0x3474
 
#define PGM_PAT_L3_2_DP_TRANS_P0_FLDMASK   0xff
 
#define PGM_PAT_L3_2_DP_TRANS_P0_FLDMASK_POS   0
 
#define PGM_PAT_L3_2_DP_TRANS_P0_FLDMASK_LEN   8
 
#define REG_3478_DP_TRANS_P0   0x3478
 
#define CP2520_PATTERN1_DP_TRANS_P0_FLDMASK   0x1
 
#define CP2520_PATTERN1_DP_TRANS_P0_FLDMASK_POS   0
 
#define CP2520_PATTERN1_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN2_DP_TRANS_P0_FLDMASK   0x2
 
#define CP2520_PATTERN2_DP_TRANS_P0_FLDMASK_POS   1
 
#define CP2520_PATTERN2_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN1_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK   0x10
 
#define CP2520_PATTERN1_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS   4
 
#define CP2520_PATTERN1_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN1_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK   0x20
 
#define CP2520_PATTERN1_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS   5
 
#define CP2520_PATTERN1_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN1_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK   0x40
 
#define CP2520_PATTERN1_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS   6
 
#define CP2520_PATTERN1_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN1_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK   0x80
 
#define CP2520_PATTERN1_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS   7
 
#define CP2520_PATTERN1_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN1_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK   0x100
 
#define CP2520_PATTERN1_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS   8
 
#define CP2520_PATTERN1_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN1_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK   0x200
 
#define CP2520_PATTERN1_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS   9
 
#define CP2520_PATTERN1_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN1_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK   0x400
 
#define CP2520_PATTERN1_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS   10
 
#define CP2520_PATTERN1_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN1_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK   0x800
 
#define CP2520_PATTERN1_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS   11
 
#define CP2520_PATTERN1_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN   1
 
#define REG_347C_DP_TRANS_P0   0x347C
 
#define CP2520_PATTERN2_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK   0x1
 
#define CP2520_PATTERN2_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS   0
 
#define CP2520_PATTERN2_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN2_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK   0x2
 
#define CP2520_PATTERN2_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS   1
 
#define CP2520_PATTERN2_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN2_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK   0x4
 
#define CP2520_PATTERN2_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS   2
 
#define CP2520_PATTERN2_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN2_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK   0x8
 
#define CP2520_PATTERN2_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS   3
 
#define CP2520_PATTERN2_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN2_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK   0x10
 
#define CP2520_PATTERN2_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS   4
 
#define CP2520_PATTERN2_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN2_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK   0x20
 
#define CP2520_PATTERN2_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS   5
 
#define CP2520_PATTERN2_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN2_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK   0x40
 
#define CP2520_PATTERN2_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS   6
 
#define CP2520_PATTERN2_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN2_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK   0x80
 
#define CP2520_PATTERN2_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS   7
 
#define CP2520_PATTERN2_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN3_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK   0x100
 
#define CP2520_PATTERN3_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS   8
 
#define CP2520_PATTERN3_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN3_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK   0x200
 
#define CP2520_PATTERN3_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS   9
 
#define CP2520_PATTERN3_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN3_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK   0x400
 
#define CP2520_PATTERN3_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS   10
 
#define CP2520_PATTERN3_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN3_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK   0x800
 
#define CP2520_PATTERN3_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS   11
 
#define CP2520_PATTERN3_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN3_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK   0x1000
 
#define CP2520_PATTERN3_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS   12
 
#define CP2520_PATTERN3_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN3_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK   0x2000
 
#define CP2520_PATTERN3_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS   13
 
#define CP2520_PATTERN3_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN3_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK   0x4000
 
#define CP2520_PATTERN3_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS   14
 
#define CP2520_PATTERN3_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN   1
 
#define CP2520_PATTERN3_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK   0x8000
 
#define CP2520_PATTERN3_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS   15
 
#define CP2520_PATTERN3_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN   1
 
#define REG_3480_DP_TRANS_P0   0x3480
 
#define DP_EN_DP_TRANS_P0_FLDMASK   0x1
 
#define DP_EN_DP_TRANS_P0_FLDMASK_POS   0
 
#define DP_EN_DP_TRANS_P0_FLDMASK_LEN   1
 
#define HDCP_CAPABLE_DP_TRANS_P0_FLDMASK   0x2
 
#define HDCP_CAPABLE_DP_TRANS_P0_FLDMASK_POS   1
 
#define HDCP_CAPABLE_DP_TRANS_P0_FLDMASK_LEN   1
 
#define SELECT_INTERNAL_AN_DP_TRANS_P0_FLDMASK   0x4
 
#define SELECT_INTERNAL_AN_DP_TRANS_P0_FLDMASK_POS   2
 
#define SELECT_INTERNAL_AN_DP_TRANS_P0_FLDMASK_LEN   1
 
#define AN_FREERUN_DP_TRANS_P0_FLDMASK   0x8
 
#define AN_FREERUN_DP_TRANS_P0_FLDMASK_POS   3
 
#define AN_FREERUN_DP_TRANS_P0_FLDMASK_LEN   1
 
#define KM_GENERATED_DP_TRANS_P0_FLDMASK   0x10
 
#define KM_GENERATED_DP_TRANS_P0_FLDMASK_POS   4
 
#define KM_GENERATED_DP_TRANS_P0_FLDMASK_LEN   1
 
#define REQ_BLOCK_CIPHER_AUTH_DP_TRANS_P0_FLDMASK   0x1000
 
#define REQ_BLOCK_CIPHER_AUTH_DP_TRANS_P0_FLDMASK_POS   12
 
#define REQ_BLOCK_CIPHER_AUTH_DP_TRANS_P0_FLDMASK_LEN   1
 
#define HDCP_1LANE_SEL_DP_TRANS_P0_FLDMASK   0x2000
 
#define HDCP_1LANE_SEL_DP_TRANS_P0_FLDMASK_POS   13
 
#define HDCP_1LANE_SEL_DP_TRANS_P0_FLDMASK_LEN   1
 
#define HDCP_24LANE_SEL_DP_TRANS_P0_FLDMASK   0x4000
 
#define HDCP_24LANE_SEL_DP_TRANS_P0_FLDMASK_POS   14
 
#define HDCP_24LANE_SEL_DP_TRANS_P0_FLDMASK_LEN   1
 
#define MST_EN_DP_TRANS_P0_FLDMASK   0x8000
 
#define MST_EN_DP_TRANS_P0_FLDMASK_POS   15
 
#define MST_EN_DP_TRANS_P0_FLDMASK_LEN   1
 
#define REG_34A4_DP_TRANS_P0   0x34A4
 
#define EN_COPY_2LANE_MSA_DP_TRANS_P0_FLDMASK   0x1
 
#define EN_COPY_2LANE_MSA_DP_TRANS_P0_FLDMASK_POS   0
 
#define EN_COPY_2LANE_MSA_DP_TRANS_P0_FLDMASK_LEN   1
 
#define EN_COPY_4LANE_MSA_DP_TRANS_P0_FLDMASK   0x2
 
#define EN_COPY_4LANE_MSA_DP_TRANS_P0_FLDMASK_POS   1
 
#define EN_COPY_4LANE_MSA_DP_TRANS_P0_FLDMASK_LEN   1
 
#define LANE_NUM_DP_TRANS_P0_FLDMASK   0xc
 
#define LANE_NUM_DP_TRANS_P0_FLDMASK_POS   2
 
#define LANE_NUM_DP_TRANS_P0_FLDMASK_LEN   2
 
#define HDCP22_AUTH_DONE_DP_TRANS_P0_FLDMASK   0x10
 
#define HDCP22_AUTH_DONE_DP_TRANS_P0_FLDMASK_POS   4
 
#define HDCP22_AUTH_DONE_DP_TRANS_P0_FLDMASK_LEN   1
 
#define DISCARD_UNUSED_CIPHER_DP_TRANS_P0_FLDMASK   0x20
 
#define DISCARD_UNUSED_CIPHER_DP_TRANS_P0_FLDMASK_POS   5
 
#define DISCARD_UNUSED_CIPHER_DP_TRANS_P0_FLDMASK_LEN   1
 
#define HDCP22_CIPHER_REVERSE_DP_TRANS_P0_FLDMASK   0x40
 
#define HDCP22_CIPHER_REVERSE_DP_TRANS_P0_FLDMASK_POS   6
 
#define HDCP22_CIPHER_REVERSE_DP_TRANS_P0_FLDMASK_LEN   1
 
#define MST_DELAY_CYCLE_FLAG_SEL_DP_TRANS_P0_FLDMASK   0x80
 
#define MST_DELAY_CYCLE_FLAG_SEL_DP_TRANS_P0_FLDMASK_POS   7
 
#define MST_DELAY_CYCLE_FLAG_SEL_DP_TRANS_P0_FLDMASK_LEN   1
 
#define TEST_CONFIG_HDCP22_DP_TRANS_P0_FLDMASK   0xf00
 
#define TEST_CONFIG_HDCP22_DP_TRANS_P0_FLDMASK_POS   8
 
#define TEST_CONFIG_HDCP22_DP_TRANS_P0_FLDMASK_LEN   4
 
#define R0_AVAILABLE_DP_TRANS_P0_FLDMASK   0x1000
 
#define R0_AVAILABLE_DP_TRANS_P0_FLDMASK_POS   12
 
#define R0_AVAILABLE_DP_TRANS_P0_FLDMASK_LEN   1
 
#define DPES_TX_HDCP22_DP_TRANS_P0_FLDMASK   0x2000
 
#define DPES_TX_HDCP22_DP_TRANS_P0_FLDMASK_POS   13
 
#define DPES_TX_HDCP22_DP_TRANS_P0_FLDMASK_LEN   1
 
#define DP_AES_OUT_RDY_L_DP_TRANS_P0_FLDMASK   0x4000
 
#define DP_AES_OUT_RDY_L_DP_TRANS_P0_FLDMASK_POS   14
 
#define DP_AES_OUT_RDY_L_DP_TRANS_P0_FLDMASK_LEN   1
 
#define REPEATER_I_DP_TRANS_P0_FLDMASK   0x8000
 
#define REPEATER_I_DP_TRANS_P0_FLDMASK_POS   15
 
#define REPEATER_I_DP_TRANS_P0_FLDMASK_LEN   1
 
#define REG_34A8_DP_TRANS_P0   0x34A8
 
#define TEST_CONFIG_HDCP13_DP_TRANS_P0_FLDMASK   0xff00
 
#define TEST_CONFIG_HDCP13_DP_TRANS_P0_FLDMASK_POS   8
 
#define TEST_CONFIG_HDCP13_DP_TRANS_P0_FLDMASK_LEN   8
 
#define REG_34D0_DP_TRANS_P0   0x34D0
 
#define TX_HDCP22_TYPE_DP_TRANS_P0_FLDMASK   0xff
 
#define TX_HDCP22_TYPE_DP_TRANS_P0_FLDMASK_POS   0
 
#define TX_HDCP22_TYPE_DP_TRANS_P0_FLDMASK_LEN   8
 
#define PIPE_DELAY_EN_CNT_DP_TRANS_P0_FLDMASK   0xf00
 
#define PIPE_DELAY_EN_CNT_DP_TRANS_P0_FLDMASK_POS   8
 
#define PIPE_DELAY_EN_CNT_DP_TRANS_P0_FLDMASK_LEN   4
 
#define PIPE_DELAY_DP_TRANS_P0_FLDMASK   0xf000
 
#define PIPE_DELAY_DP_TRANS_P0_FLDMASK_POS   12
 
#define PIPE_DELAY_DP_TRANS_P0_FLDMASK_LEN   4
 
#define REG_34D4_DP_TRANS_P0   0x34D4
 
#define DP_AES_INCTR_L_0_DP_TRANS_P0_FLDMASK   0xffff
 
#define DP_AES_INCTR_L_0_DP_TRANS_P0_FLDMASK_POS   0
 
#define DP_AES_INCTR_L_0_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_34D8_DP_TRANS_P0   0x34D8
 
#define DP_AES_INCTR_L_1_DP_TRANS_P0_FLDMASK   0xffff
 
#define DP_AES_INCTR_L_1_DP_TRANS_P0_FLDMASK_POS   0
 
#define DP_AES_INCTR_L_1_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_34DC_DP_TRANS_P0   0x34DC
 
#define DP_AES_INCTR_L_2_DP_TRANS_P0_FLDMASK   0xffff
 
#define DP_AES_INCTR_L_2_DP_TRANS_P0_FLDMASK_POS   0
 
#define DP_AES_INCTR_L_2_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_34E0_DP_TRANS_P0   0x34E0
 
#define DP_AES_INCTR_L_3_DP_TRANS_P0_FLDMASK   0xffff
 
#define DP_AES_INCTR_L_3_DP_TRANS_P0_FLDMASK_POS   0
 
#define DP_AES_INCTR_L_3_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_34E4_DP_TRANS_P0   0x34E4
 
#define HDCP_TYPE_TX_0_DP_TRANS_P0_FLDMASK   0xffff
 
#define HDCP_TYPE_TX_0_DP_TRANS_P0_FLDMASK_POS   0
 
#define HDCP_TYPE_TX_0_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_34E8_DP_TRANS_P0   0x34E8
 
#define HDCP_TYPE_TX_1_DP_TRANS_P0_FLDMASK   0xffff
 
#define HDCP_TYPE_TX_1_DP_TRANS_P0_FLDMASK_POS   0
 
#define HDCP_TYPE_TX_1_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_34EC_DP_TRANS_P0   0x34EC
 
#define HDCP_TYPE_TX_2_DP_TRANS_P0_FLDMASK   0xffff
 
#define HDCP_TYPE_TX_2_DP_TRANS_P0_FLDMASK_POS   0
 
#define HDCP_TYPE_TX_2_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_34F0_DP_TRANS_P0   0x34F0
 
#define HDCP_TYPE_TX_3_DP_TRANS_P0_FLDMASK   0xffff
 
#define HDCP_TYPE_TX_3_DP_TRANS_P0_FLDMASK_POS   0
 
#define HDCP_TYPE_TX_3_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_34F4_DP_TRANS_P0   0x34F4
 
#define SST_HDCP_TYPE_TX_DP_TRANS_P0_FLDMASK   0xff
 
#define SST_HDCP_TYPE_TX_DP_TRANS_P0_FLDMASK_POS   0
 
#define SST_HDCP_TYPE_TX_DP_TRANS_P0_FLDMASK_LEN   8
 
#define PIPE_OV_VALUE_DP_TRANS_P0_FLDMASK   0xf00
 
#define PIPE_OV_VALUE_DP_TRANS_P0_FLDMASK_POS   8
 
#define PIPE_OV_VALUE_DP_TRANS_P0_FLDMASK_LEN   4
 
#define PIPE_OV_ENABLE_DP_TRANS_P0_FLDMASK   0x1000
 
#define PIPE_OV_ENABLE_DP_TRANS_P0_FLDMASK_POS   12
 
#define PIPE_OV_ENABLE_DP_TRANS_P0_FLDMASK_LEN   1
 
#define REG_34F8_DP_TRANS_P0   0x34F8
 
#define DP_AES_OUT_RDY_H_DP_TRANS_P0_FLDMASK   0x4000
 
#define DP_AES_OUT_RDY_H_DP_TRANS_P0_FLDMASK_POS   14
 
#define DP_AES_OUT_RDY_H_DP_TRANS_P0_FLDMASK_LEN   1
 
#define REG_34FC_DP_TRANS_P0   0x34FC
 
#define HDCP_4P_TO_2P_FIFO_RST_CHK_DP_TRANS_P0_FLDMASK   0xff
 
#define HDCP_4P_TO_2P_FIFO_RST_CHK_DP_TRANS_P0_FLDMASK_POS   0
 
#define HDCP_4P_TO_2P_FIFO_RST_CHK_DP_TRANS_P0_FLDMASK_LEN   8
 
#define HDCP_2P_TO_4P_FIFO_RST_CHK_DP_TRANS_P0_FLDMASK   0xff00
 
#define HDCP_2P_TO_4P_FIFO_RST_CHK_DP_TRANS_P0_FLDMASK_POS   8
 
#define HDCP_2P_TO_4P_FIFO_RST_CHK_DP_TRANS_P0_FLDMASK_LEN   8
 
#define REG_3500_DP_TRANS_P0   0x3500
 
#define DP_AES_INCTR_H_0_DP_TRANS_P0_FLDMASK   0xffff
 
#define DP_AES_INCTR_H_0_DP_TRANS_P0_FLDMASK_POS   0
 
#define DP_AES_INCTR_H_0_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_3504_DP_TRANS_P0   0x3504
 
#define DP_AES_INCTR_H_1_DP_TRANS_P0_FLDMASK   0xffff
 
#define DP_AES_INCTR_H_1_DP_TRANS_P0_FLDMASK_POS   0
 
#define DP_AES_INCTR_H_1_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_3508_DP_TRANS_P0   0x3508
 
#define DP_AES_INCTR_H_2_DP_TRANS_P0_FLDMASK   0xffff
 
#define DP_AES_INCTR_H_2_DP_TRANS_P0_FLDMASK_POS   0
 
#define DP_AES_INCTR_H_2_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_350C_DP_TRANS_P0   0x350C
 
#define DP_AES_INCTR_H_3_DP_TRANS_P0_FLDMASK   0xffff
 
#define DP_AES_INCTR_H_3_DP_TRANS_P0_FLDMASK_POS   0
 
#define DP_AES_INCTR_H_3_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_3510_DP_TRANS_P0   0x3510
 
#define HDCP22_TYPE_DP_TRANS_P0_FLDMASK   0xff
 
#define HDCP22_TYPE_DP_TRANS_P0_FLDMASK_POS   0
 
#define HDCP22_TYPE_DP_TRANS_P0_FLDMASK_LEN   8
 
#define REG_3540_DP_TRANS_P0   0x3540
 
#define FEC_EN_DP_TRANS_P0_FLDMASK   0x1
 
#define FEC_EN_DP_TRANS_P0_FLDMASK_POS   0
 
#define FEC_EN_DP_TRANS_P0_FLDMASK_LEN   1
 
#define FEC_END_MODE_DP_TRANS_P0_FLDMASK   0x6
 
#define FEC_END_MODE_DP_TRANS_P0_FLDMASK_POS   1
 
#define FEC_END_MODE_DP_TRANS_P0_FLDMASK_LEN   2
 
#define FEC_CLOCK_EN_MODE_DP_TRANS_P0_FLDMASK   0x8
 
#define FEC_CLOCK_EN_MODE_DP_TRANS_P0_FLDMASK_POS   3
 
#define FEC_CLOCK_EN_MODE_DP_TRANS_P0_FLDMASK_LEN   1
 
#define FEC_FIFO_READ_START_DP_TRANS_P0_FLDMASK   0xf0
 
#define FEC_FIFO_READ_START_DP_TRANS_P0_FLDMASK_POS   4
 
#define FEC_FIFO_READ_START_DP_TRANS_P0_FLDMASK_LEN   4
 
#define FEC_FIFO_UNDER_POINT_DP_TRANS_P0_FLDMASK   0xf00
 
#define FEC_FIFO_UNDER_POINT_DP_TRANS_P0_FLDMASK_POS   8
 
#define FEC_FIFO_UNDER_POINT_DP_TRANS_P0_FLDMASK_LEN   4
 
#define FEC_FIFO_OVER_POINT_DP_TRANS_P0_FLDMASK   0xf000
 
#define FEC_FIFO_OVER_POINT_DP_TRANS_P0_FLDMASK_POS   12
 
#define FEC_FIFO_OVER_POINT_DP_TRANS_P0_FLDMASK_LEN   4
 
#define REG_3544_DP_TRANS_P0   0x3544
 
#define FEC_FIFO_RST_DP_TRANS_P0_FLDMASK   0x1
 
#define FEC_FIFO_RST_DP_TRANS_P0_FLDMASK_POS   0
 
#define FEC_FIFO_RST_DP_TRANS_P0_FLDMASK_LEN   1
 
#define FEC_SUPPORT_DP_TRANS_P0_FLDMASK   0x2
 
#define FEC_SUPPORT_DP_TRANS_P0_FLDMASK_POS   1
 
#define FEC_SUPPORT_DP_TRANS_P0_FLDMASK_LEN   1
 
#define FEC_PATTERN_NEW_DP_TRANS_P0_FLDMASK   0x4
 
#define FEC_PATTERN_NEW_DP_TRANS_P0_FLDMASK_POS   2
 
#define FEC_PATTERN_NEW_DP_TRANS_P0_FLDMASK_LEN   1
 
#define FEC_INSERT_FIFO_EMPTY_DP_TRANS_P0_FLDMASK   0x10
 
#define FEC_INSERT_FIFO_EMPTY_DP_TRANS_P0_FLDMASK_POS   4
 
#define FEC_INSERT_FIFO_EMPTY_DP_TRANS_P0_FLDMASK_LEN   1
 
#define FEC_INSERT_FIFO_EMPTY_CLR_DP_TRANS_P0_FLDMASK   0x20
 
#define FEC_INSERT_FIFO_EMPTY_CLR_DP_TRANS_P0_FLDMASK_POS   5
 
#define FEC_INSERT_FIFO_EMPTY_CLR_DP_TRANS_P0_FLDMASK_LEN   1
 
#define FEC_INSERT_FIFO_FULL_DP_TRANS_P0_FLDMASK   0x40
 
#define FEC_INSERT_FIFO_FULL_DP_TRANS_P0_FLDMASK_POS   6
 
#define FEC_INSERT_FIFO_FULL_DP_TRANS_P0_FLDMASK_LEN   1
 
#define FEC_INSERT_FIFO_FULL_CLR_DP_TRANS_P0_FLDMASK   0x80
 
#define FEC_INSERT_FIFO_FULL_CLR_DP_TRANS_P0_FLDMASK_POS   7
 
#define FEC_INSERT_FIFO_FULL_CLR_DP_TRANS_P0_FLDMASK_LEN   1
 
#define PARITY_INTERLEAVER_DATA_INVERT_PIPE_SEL_DP_TRANS_P0_FLDMASK   0x700
 
#define PARITY_INTERLEAVER_DATA_INVERT_PIPE_SEL_DP_TRANS_P0_FLDMASK_POS   8
 
#define PARITY_INTERLEAVER_DATA_INVERT_PIPE_SEL_DP_TRANS_P0_FLDMASK_LEN   3
 
#define PAT_INIT_DISPARITY_FEC_DP_TRANS_P0_FLDMASK   0x800
 
#define PAT_INIT_DISPARITY_FEC_DP_TRANS_P0_FLDMASK_POS   11
 
#define PAT_INIT_DISPARITY_FEC_DP_TRANS_P0_FLDMASK_LEN   1
 
#define FEC_PARITY_DATA_LANE_SWAP_DP_TRANS_P0_FLDMASK   0x1000
 
#define FEC_PARITY_DATA_LANE_SWAP_DP_TRANS_P0_FLDMASK_POS   12
 
#define FEC_PARITY_DATA_LANE_SWAP_DP_TRANS_P0_FLDMASK_LEN   1
 
#define REG_3548_DP_TRANS_P0   0x3548
 
#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE0_DP_TRANS_P0_FLDMASK   0x7
 
#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE0_DP_TRANS_P0_FLDMASK_POS   0
 
#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE0_DP_TRANS_P0_FLDMASK_LEN   3
 
#define FEC_INSERT_SYMBOL_ERROR_LANE0_DP_TRANS_P0_FLDMASK   0x8
 
#define FEC_INSERT_SYMBOL_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS   3
 
#define FEC_INSERT_SYMBOL_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN   1
 
#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE1_DP_TRANS_P0_FLDMASK   0x70
 
#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE1_DP_TRANS_P0_FLDMASK_POS   4
 
#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE1_DP_TRANS_P0_FLDMASK_LEN   3
 
#define FEC_INSERT_SYMBOL_ERROR_LANE1_DP_TRANS_P0_FLDMASK   0x80
 
#define FEC_INSERT_SYMBOL_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS   7
 
#define FEC_INSERT_SYMBOL_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN   1
 
#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE2_DP_TRANS_P0_FLDMASK   0x700
 
#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE2_DP_TRANS_P0_FLDMASK_POS   8
 
#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE2_DP_TRANS_P0_FLDMASK_LEN   3
 
#define FEC_INSERT_SYMBOL_ERROR_LANE2_DP_TRANS_P0_FLDMASK   0x800
 
#define FEC_INSERT_SYMBOL_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS   11
 
#define FEC_INSERT_SYMBOL_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN   1
 
#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE3_DP_TRANS_P0_FLDMASK   0x7000
 
#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE3_DP_TRANS_P0_FLDMASK_POS   12
 
#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE3_DP_TRANS_P0_FLDMASK_LEN   3
 
#define FEC_INSERT_SYMBOL_ERROR_LANE3_DP_TRANS_P0_FLDMASK   0x8000
 
#define FEC_INSERT_SYMBOL_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS   15
 
#define FEC_INSERT_SYMBOL_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN   1
 
#define REG_354C_DP_TRANS_P0   0x354C
 
#define FEC_CP_HIT_LANE0_DP_TRANS_P0_FLDMASK   0x1
 
#define FEC_CP_HIT_LANE0_DP_TRANS_P0_FLDMASK_POS   0
 
#define FEC_CP_HIT_LANE0_DP_TRANS_P0_FLDMASK_LEN   1
 
#define FEC_CP_HIT_LANE1_DP_TRANS_P0_FLDMASK   0x2
 
#define FEC_CP_HIT_LANE1_DP_TRANS_P0_FLDMASK_POS   1
 
#define FEC_CP_HIT_LANE1_DP_TRANS_P0_FLDMASK_LEN   1
 
#define FEC_CP_HIT_LANE2_DP_TRANS_P0_FLDMASK   0x4
 
#define FEC_CP_HIT_LANE2_DP_TRANS_P0_FLDMASK_POS   2
 
#define FEC_CP_HIT_LANE2_DP_TRANS_P0_FLDMASK_LEN   1
 
#define FEC_CP_HIT_LANE3_DP_TRANS_P0_FLDMASK   0x8
 
#define FEC_CP_HIT_LANE3_DP_TRANS_P0_FLDMASK_POS   3
 
#define FEC_CP_HIT_LANE3_DP_TRANS_P0_FLDMASK_LEN   1
 
#define FEC_CP_HIT_CLR_DP_TRANS_P0_FLDMASK   0x10
 
#define FEC_CP_HIT_CLR_DP_TRANS_P0_FLDMASK_POS   4
 
#define FEC_CP_HIT_CLR_DP_TRANS_P0_FLDMASK_LEN   1
 
#define FEC_ENCODE_TOP_TESTBUS_SEL_DP_TRANS_P0_FLDMASK   0x300
 
#define FEC_ENCODE_TOP_TESTBUS_SEL_DP_TRANS_P0_FLDMASK_POS   8
 
#define FEC_ENCODE_TOP_TESTBUS_SEL_DP_TRANS_P0_FLDMASK_LEN   2
 
#define FEC_INSERT_TOP_TESTBUS_SEL_DP_TRANS_P0_FLDMASK   0xc00
 
#define FEC_INSERT_TOP_TESTBUS_SEL_DP_TRANS_P0_FLDMASK_POS   10
 
#define FEC_INSERT_TOP_TESTBUS_SEL_DP_TRANS_P0_FLDMASK_LEN   2
 
#define REG_3550_DP_TRANS_P0   0x3550
 
#define FEC_INSERT_FIFO_WCNT_DP_TRANS_P0_FLDMASK   0x1f
 
#define FEC_INSERT_FIFO_WCNT_DP_TRANS_P0_FLDMASK_POS   0
 
#define FEC_INSERT_FIFO_WCNT_DP_TRANS_P0_FLDMASK_LEN   5
 
#define FEC_INSERT_FIFO_RCNT_DP_TRANS_P0_FLDMASK   0x1f00
 
#define FEC_INSERT_FIFO_RCNT_DP_TRANS_P0_FLDMASK_POS   8
 
#define FEC_INSERT_FIFO_RCNT_DP_TRANS_P0_FLDMASK_LEN   5
 
#define REG_3554_DP_TRANS_P0   0x3554
 
#define FEC_CLK_GATE_DATA_CNT_0_DP_TRANS_P0_FLDMASK   0x7f
 
#define FEC_CLK_GATE_DATA_CNT_0_DP_TRANS_P0_FLDMASK_POS   0
 
#define FEC_CLK_GATE_DATA_CNT_0_DP_TRANS_P0_FLDMASK_LEN   7
 
#define REG_3558_DP_TRANS_P0   0x3558
 
#define FEC_CLK_GATE_DATA_CNT_1_0_DP_TRANS_P0_FLDMASK   0xffff
 
#define FEC_CLK_GATE_DATA_CNT_1_0_DP_TRANS_P0_FLDMASK_POS   0
 
#define FEC_CLK_GATE_DATA_CNT_1_0_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_355C_DP_TRANS_P0   0x355C
 
#define FEC_CLK_GATE_DATA_CNT_1_1_DP_TRANS_P0_FLDMASK   0x3
 
#define FEC_CLK_GATE_DATA_CNT_1_1_DP_TRANS_P0_FLDMASK_POS   0
 
#define FEC_CLK_GATE_DATA_CNT_1_1_DP_TRANS_P0_FLDMASK_LEN   2
 
#define REG_3580_DP_TRANS_P0   0x3580
 
#define DP_TX_TRANS_TESTBUS_SEL_DP_TRANS_P0_FLDMASK   0x1f
 
#define DP_TX_TRANS_TESTBUS_SEL_DP_TRANS_P0_FLDMASK_POS   0
 
#define DP_TX_TRANS_TESTBUS_SEL_DP_TRANS_P0_FLDMASK_LEN   5
 
#define POST_MISC_DATA_LANE0_OV_DP_TRANS_P0_FLDMASK   0x100
 
#define POST_MISC_DATA_LANE0_OV_DP_TRANS_P0_FLDMASK_POS   8
 
#define POST_MISC_DATA_LANE0_OV_DP_TRANS_P0_FLDMASK_LEN   1
 
#define POST_MISC_DATA_LANE1_OV_DP_TRANS_P0_FLDMASK   0x200
 
#define POST_MISC_DATA_LANE1_OV_DP_TRANS_P0_FLDMASK_POS   9
 
#define POST_MISC_DATA_LANE1_OV_DP_TRANS_P0_FLDMASK_LEN   1
 
#define POST_MISC_DATA_LANE2_OV_DP_TRANS_P0_FLDMASK   0x400
 
#define POST_MISC_DATA_LANE2_OV_DP_TRANS_P0_FLDMASK_POS   10
 
#define POST_MISC_DATA_LANE2_OV_DP_TRANS_P0_FLDMASK_LEN   1
 
#define POST_MISC_DATA_LANE3_OV_DP_TRANS_P0_FLDMASK   0x800
 
#define POST_MISC_DATA_LANE3_OV_DP_TRANS_P0_FLDMASK_POS   11
 
#define POST_MISC_DATA_LANE3_OV_DP_TRANS_P0_FLDMASK_LEN   1
 
#define REG_3584_DP_TRANS_P0   0x3584
 
#define POST_MISC_DATA_LANE0_0_DP_TRANS_P0_FLDMASK   0xffff
 
#define POST_MISC_DATA_LANE0_0_DP_TRANS_P0_FLDMASK_POS   0
 
#define POST_MISC_DATA_LANE0_0_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_3588_DP_TRANS_P0   0x3588
 
#define POST_MISC_DATA_LANE0_1_DP_TRANS_P0_FLDMASK   0xffff
 
#define POST_MISC_DATA_LANE0_1_DP_TRANS_P0_FLDMASK_POS   0
 
#define POST_MISC_DATA_LANE0_1_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_358C_DP_TRANS_P0   0x358C
 
#define POST_MISC_DATA_LANE0_2_DP_TRANS_P0_FLDMASK   0xff
 
#define POST_MISC_DATA_LANE0_2_DP_TRANS_P0_FLDMASK_POS   0
 
#define POST_MISC_DATA_LANE0_2_DP_TRANS_P0_FLDMASK_LEN   8
 
#define REG_3590_DP_TRANS_P0   0x3590
 
#define POST_MISC_DATA_LANE1_0_DP_TRANS_P0_FLDMASK   0xffff
 
#define POST_MISC_DATA_LANE1_0_DP_TRANS_P0_FLDMASK_POS   0
 
#define POST_MISC_DATA_LANE1_0_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_3594_DP_TRANS_P0   0x3594
 
#define POST_MISC_DATA_LANE1_1_DP_TRANS_P0_FLDMASK   0xffff
 
#define POST_MISC_DATA_LANE1_1_DP_TRANS_P0_FLDMASK_POS   0
 
#define POST_MISC_DATA_LANE1_1_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_3598_DP_TRANS_P0   0x3598
 
#define POST_MISC_DATA_LANE1_2_DP_TRANS_P0_FLDMASK   0xff
 
#define POST_MISC_DATA_LANE1_2_DP_TRANS_P0_FLDMASK_POS   0
 
#define POST_MISC_DATA_LANE1_2_DP_TRANS_P0_FLDMASK_LEN   8
 
#define REG_359C_DP_TRANS_P0   0x359C
 
#define POST_MISC_DATA_LANE2_0_DP_TRANS_P0_FLDMASK   0xffff
 
#define POST_MISC_DATA_LANE2_0_DP_TRANS_P0_FLDMASK_POS   0
 
#define POST_MISC_DATA_LANE2_0_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_35A0_DP_TRANS_P0   0x35A0
 
#define POST_MISC_DATA_LANE2_1_DP_TRANS_P0_FLDMASK   0xffff
 
#define POST_MISC_DATA_LANE2_1_DP_TRANS_P0_FLDMASK_POS   0
 
#define POST_MISC_DATA_LANE2_1_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_35A4_DP_TRANS_P0   0x35A4
 
#define POST_MISC_DATA_LANE2_2_DP_TRANS_P0_FLDMASK   0xff
 
#define POST_MISC_DATA_LANE2_2_DP_TRANS_P0_FLDMASK_POS   0
 
#define POST_MISC_DATA_LANE2_2_DP_TRANS_P0_FLDMASK_LEN   8
 
#define REG_35A8_DP_TRANS_P0   0x35A8
 
#define POST_MISC_DATA_LANE3_0_DP_TRANS_P0_FLDMASK   0xffff
 
#define POST_MISC_DATA_LANE3_0_DP_TRANS_P0_FLDMASK_POS   0
 
#define POST_MISC_DATA_LANE3_0_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_35AC_DP_TRANS_P0   0x35AC
 
#define POST_MISC_DATA_LANE3_1_DP_TRANS_P0_FLDMASK   0xffff
 
#define POST_MISC_DATA_LANE3_1_DP_TRANS_P0_FLDMASK_POS   0
 
#define POST_MISC_DATA_LANE3_1_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_35B0_DP_TRANS_P0   0x35B0
 
#define POST_MISC_DATA_LANE3_2_DP_TRANS_P0_FLDMASK   0xff
 
#define POST_MISC_DATA_LANE3_2_DP_TRANS_P0_FLDMASK_POS   0
 
#define POST_MISC_DATA_LANE3_2_DP_TRANS_P0_FLDMASK_LEN   8
 
#define REG_35C0_DP_TRANS_P0   0x35C0
 
#define SW_IRQ_SRC_DP_TRANS_P0_FLDMASK   0xffff
 
#define SW_IRQ_SRC_DP_TRANS_P0_FLDMASK_POS   0
 
#define SW_IRQ_SRC_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_35C4_DP_TRANS_P0   0x35C4
 
#define SW_IRQ_MASK_DP_TRANS_P0_FLDMASK   0xffff
 
#define SW_IRQ_MASK_DP_TRANS_P0_FLDMASK_POS   0
 
#define SW_IRQ_MASK_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_35C8_DP_TRANS_P0   0x35C8
 
#define SW_IRQ_CLR_DP_TRANS_P0_FLDMASK   0xffff
 
#define SW_IRQ_CLR_DP_TRANS_P0_FLDMASK_POS   0
 
#define SW_IRQ_CLR_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_35CC_DP_TRANS_P0   0x35CC
 
#define SW_IRQ_STATUS_DP_TRANS_P0_FLDMASK   0xffff
 
#define SW_IRQ_STATUS_DP_TRANS_P0_FLDMASK_POS   0
 
#define SW_IRQ_STATUS_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_35D0_DP_TRANS_P0   0x35D0
 
#define SW_IRQ_FINAL_STATUS_DP_TRANS_P0_FLDMASK   0xffff
 
#define SW_IRQ_FINAL_STATUS_DP_TRANS_P0_FLDMASK_POS   0
 
#define SW_IRQ_FINAL_STATUS_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_35D4_DP_TRANS_P0   0x35D4
 
#define SW_IRQ_RAW_STATUS_DP_TRANS_P0_FLDMASK   0xffff
 
#define SW_IRQ_RAW_STATUS_DP_TRANS_P0_FLDMASK_POS   0
 
#define SW_IRQ_RAW_STATUS_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_35D8_DP_TRANS_P0   0x35D8
 
#define SW_IRQ_FORCE_DP_TRANS_P0_FLDMASK   0xffff
 
#define SW_IRQ_FORCE_DP_TRANS_P0_FLDMASK_POS   0
 
#define SW_IRQ_FORCE_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_35F0_DP_TRANS_P0   0x35F0
 
#define DP_TRANSMITTER_DUMMY_RW_0_DP_TRANS_P0_FLDMASK   0xffff
 
#define DP_TRANSMITTER_DUMMY_RW_0_DP_TRANS_P0_FLDMASK_POS   0
 
#define DP_TRANSMITTER_DUMMY_RW_0_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_35F4_DP_TRANS_P0   0x35F4
 
#define DP_TRANSMITTER_DUMMY_RW_1_DP_TRANS_P0_FLDMASK   0xffff
 
#define DP_TRANSMITTER_DUMMY_RW_1_DP_TRANS_P0_FLDMASK_POS   0
 
#define DP_TRANSMITTER_DUMMY_RW_1_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_35F8_DP_TRANS_P0   0x35F8
 
#define DP_TRANSMITTER_DUMMY_R_0_DP_TRANS_P0_FLDMASK   0xffff
 
#define DP_TRANSMITTER_DUMMY_R_0_DP_TRANS_P0_FLDMASK_POS   0
 
#define DP_TRANSMITTER_DUMMY_R_0_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_35FC_DP_TRANS_P0   0x35FC
 
#define DP_TRANSMITTER_DUMMY_R_1_DP_TRANS_P0_FLDMASK   0xffff
 
#define DP_TRANSMITTER_DUMMY_R_1_DP_TRANS_P0_FLDMASK_POS   0
 
#define DP_TRANSMITTER_DUMMY_R_1_DP_TRANS_P0_FLDMASK_LEN   16
 
#define REG_3600_AUX_TX_P0   0x3600
 
#define DP_TX_SW_RESET_AUX_TX_P0_FLDMASK   0x1
 
#define DP_TX_SW_RESET_AUX_TX_P0_FLDMASK_POS   0
 
#define DP_TX_SW_RESET_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_TOP_RESET_AUX_TX_P0_FLDMASK   0x2
 
#define AUX_TOP_RESET_AUX_TX_P0_FLDMASK_POS   1
 
#define AUX_TOP_RESET_AUX_TX_P0_FLDMASK_LEN   1
 
#define SOFTWARE_RESET_RESERVED_AUX_TX_P0_FLDMASK   0x1c
 
#define SOFTWARE_RESET_RESERVED_AUX_TX_P0_FLDMASK_POS   2
 
#define SOFTWARE_RESET_RESERVED_AUX_TX_P0_FLDMASK_LEN   3
 
#define AUX_CLK_EN_AUX_TX_P0_FLDMASK   0x100
 
#define AUX_CLK_EN_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_CLK_EN_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_CLK_INV_AUX_TX_P0_FLDMASK   0x200
 
#define AUX_CLK_INV_AUX_TX_P0_FLDMASK_POS   9
 
#define AUX_CLK_INV_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_CLK_SEL_AUX_TX_P0_FLDMASK   0xc00
 
#define AUX_CLK_SEL_AUX_TX_P0_FLDMASK_POS   10
 
#define AUX_CLK_SEL_AUX_TX_P0_FLDMASK_LEN   2
 
#define REG_3604_AUX_TX_P0   0x3604
 
#define AUX_TX_FSM_SOFTWARE_RESET_AUX_TX_P0_FLDMASK   0x8000
 
#define AUX_TX_FSM_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_POS   15
 
#define AUX_TX_FSM_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_TX_PHY_SOFTWARE_RESET_AUX_TX_P0_FLDMASK   0x4000
 
#define AUX_TX_PHY_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_POS   14
 
#define AUX_TX_PHY_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_RX_FSM_SOFTWARE_RESET_AUX_TX_P0_FLDMASK   0x2000
 
#define AUX_RX_FSM_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_POS   13
 
#define AUX_RX_FSM_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_RX_PHY_SOFTWARE_RESET_AUX_TX_P0_FLDMASK   0x1000
 
#define AUX_RX_PHY_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_POS   12
 
#define AUX_RX_PHY_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_LEN   1
 
#define DP_TX_TESTBUS_SEL_AUX_TX_P0_FLDMASK   0xff
 
#define DP_TX_TESTBUS_SEL_AUX_TX_P0_FLDMASK_POS   0
 
#define DP_TX_TESTBUS_SEL_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3608_AUX_TX_P0   0x3608
 
#define DP_TX_INT_STATUS_AUX_TX_P0_FLDMASK   0xffff
 
#define DP_TX_INT_STATUS_AUX_TX_P0_FLDMASK_POS   0
 
#define DP_TX_INT_STATUS_AUX_TX_P0_FLDMASK_LEN   16
 
#define REG_360C_AUX_TX_P0   0x360C
 
#define AUX_SWAP_AUX_TX_P0_FLDMASK   0x8000
 
#define AUX_SWAP_AUX_TX_P0_FLDMASK_POS   15
 
#define AUX_SWAP_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_AUX_REPLY_MCU_AUX_TX_P0_FLDMASK   0x4000
 
#define AUX_AUX_REPLY_MCU_AUX_TX_P0_FLDMASK_POS   14
 
#define AUX_AUX_REPLY_MCU_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_TIMEOUT_CMP_MASK_AUX_TX_P0_FLDMASK   0x2000
 
#define AUX_TIMEOUT_CMP_MASK_AUX_TX_P0_FLDMASK_POS   13
 
#define AUX_TIMEOUT_CMP_MASK_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_TIMEOUT_THR_AUX_TX_P0_FLDMASK   0x1fff
 
#define AUX_TIMEOUT_THR_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_TIMEOUT_THR_AUX_TX_P0_FLDMASK_LEN   13
 
#define REG_3610_AUX_TX_P0   0x3610
 
#define AUX_EDID_REPLY_MCU_AUX_TX_P0_FLDMASK   0x8000
 
#define AUX_EDID_REPLY_MCU_AUX_TX_P0_FLDMASK_POS   15
 
#define AUX_EDID_REPLY_MCU_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_EDID_ADDR_AUX_TX_P0_FLDMASK   0x7f00
 
#define AUX_EDID_ADDR_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_EDID_ADDR_AUX_TX_P0_FLDMASK_LEN   7
 
#define AUX_MCCS_REPLY_MCU_AUX_TX_P0_FLDMASK   0x80
 
#define AUX_MCCS_REPLY_MCU_AUX_TX_P0_FLDMASK_POS   7
 
#define AUX_MCCS_REPLY_MCU_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_MCCS_ADDR_AUX_TX_P0_FLDMASK   0x7f
 
#define AUX_MCCS_ADDR_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_MCCS_ADDR_AUX_TX_P0_FLDMASK_LEN   7
 
#define REG_3614_AUX_TX_P0   0x3614
 
#define AUX_TIMEOUT_THR_EXTEN_AUX_TX_P0_FLDMASK   0x4000
 
#define AUX_TIMEOUT_THR_EXTEN_AUX_TX_P0_FLDMASK_POS   14
 
#define AUX_TIMEOUT_THR_EXTEN_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_RX_AVERAGE_SEL_AUX_TX_P0_FLDMASK   0x3000
 
#define AUX_RX_AVERAGE_SEL_AUX_TX_P0_FLDMASK_POS   12
 
#define AUX_RX_AVERAGE_SEL_AUX_TX_P0_FLDMASK_LEN   2
 
#define AUX_RX_SYNC_PATTERN_THR_AUX_TX_P0_FLDMASK   0xf00
 
#define AUX_RX_SYNC_PATTERN_THR_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_RX_SYNC_PATTERN_THR_AUX_TX_P0_FLDMASK_LEN   4
 
#define AUX_RX_DECODE_SEL_AUX_TX_P0_FLDMASK   0x80
 
#define AUX_RX_DECODE_SEL_AUX_TX_P0_FLDMASK_POS   7
 
#define AUX_RX_DECODE_SEL_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_RX_UI_CNT_THR_AUX_TX_P0_FLDMASK   0x7f
 
#define AUX_RX_UI_CNT_THR_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_RX_UI_CNT_THR_AUX_TX_P0_FLDMASK_LEN   7
 
#define REG_3618_AUX_TX_P0   0x3618
 
#define AUX_RX_DP_REV_AUX_TX_P0_FLDMASK   0x400
 
#define AUX_RX_DP_REV_AUX_TX_P0_FLDMASK_POS   10
 
#define AUX_RX_DP_REV_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_RX_FIFO_FULL_AUX_TX_P0_FLDMASK   0x200
 
#define AUX_RX_FIFO_FULL_AUX_TX_P0_FLDMASK_POS   9
 
#define AUX_RX_FIFO_FULL_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_RX_FIFO_EMPTY_AUX_TX_P0_FLDMASK   0x100
 
#define AUX_RX_FIFO_EMPTY_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_RX_FIFO_EMPTY_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_RX_FIFO_READ_POINTER_AUX_TX_P0_FLDMASK   0xf0
 
#define AUX_RX_FIFO_READ_POINTER_AUX_TX_P0_FLDMASK_POS   4
 
#define AUX_RX_FIFO_READ_POINTER_AUX_TX_P0_FLDMASK_LEN   4
 
#define AUX_RX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK   0xf
 
#define AUX_RX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_RX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK_LEN   4
 
#define REG_361C_AUX_TX_P0   0x361C
 
#define AUX_RX_DATA_BYTE_CNT_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_RX_DATA_BYTE_CNT_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_RX_DATA_BYTE_CNT_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_RESERVED_RO_0_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_RESERVED_RO_0_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_RESERVED_RO_0_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3620_AUX_TX_P0   0x3620
 
#define AUX_RD_MODE_AUX_TX_P0_FLDMASK   0x200
 
#define AUX_RD_MODE_AUX_TX_P0_FLDMASK_POS   9
 
#define AUX_RD_MODE_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_RX_FIFO_READ_PULSE_TX_P0_FLDMASK   0x100
 
#define AUX_RX_FIFO_R_PULSE_TX_P0_FLDMASK_POS   8
 
#define AUX_RX_FIFO_READ_PULSE_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_RX_FIFO_READ_DATA_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_RX_FIFO_READ_DATA_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_RX_FIFO_READ_DATA_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3624_AUX_TX_P0   0x3624
 
#define AUX_RX_REPLY_COMMAND_AUX_TX_P0_FLDMASK   0xf
 
#define AUX_RX_REPLY_COMMAND_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_RX_REPLY_COMMAND_AUX_TX_P0_FLDMASK_LEN   4
 
#define AUX_RX_REPLY_ADDRESS_NONE_AUX_TX_P0_FLDMASK   0xf00
 
#define AUX_RX_REPLY_ADDRESS_NONE_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_RX_REPLY_ADDRESS_NONE_AUX_TX_P0_FLDMASK_LEN   4
 
#define REG_3628_AUX_TX_P0   0x3628
 
#define AUX_RESERVED_RO_1_AUX_TX_P0_FLDMASK   0xfc00
 
#define AUX_RESERVED_RO_1_AUX_TX_P0_FLDMASK_POS   10
 
#define AUX_RESERVED_RO_1_AUX_TX_P0_FLDMASK_LEN   6
 
#define AUX_RX_PHY_STATE_AUX_TX_P0_FLDMASK   0x3ff
 
#define AUX_RX_PHY_STATE_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_RX_PHY_STATE_AUX_TX_P0_FLDMASK_LEN   10
 
#define REG_362C_AUX_TX_P0   0x362C
 
#define AUX_NO_LENGTH_AUX_TX_P0_FLDMASK   0x1
 
#define AUX_NO_LENGTH_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_NO_LENGTH_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_TX_AUXTX_OV_EN_AUX_TX_P0_FLDMASK   0x2
 
#define AUX_TX_AUXTX_OV_EN_AUX_TX_P0_FLDMASK_POS   1
 
#define AUX_TX_AUXTX_OV_EN_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_RESERVED_RW_0_AUX_TX_P0_FLDMASK   0xfffc
 
#define AUX_RESERVED_RW_0_AUX_TX_P0_FLDMASK_POS   2
 
#define AUX_RESERVED_RW_0_AUX_TX_P0_FLDMASK_LEN   14
 
#define REG_3630_AUX_TX_P0   0x3630
 
#define AUX_TX_REQUEST_READY_AUX_TX_P0_FLDMASK   0x8
 
#define AUX_TX_REQUEST_READY_AUX_TX_P0_FLDMASK_POS   3
 
#define AUX_TX_REQUEST_READY_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_TX_PRE_NUM_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_TX_PRE_NUM_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_TX_PRE_NUM_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3634_AUX_TX_P0   0x3634
 
#define AUX_TX_OVER_SAMPLE_RATE_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_TX_OVER_SAMPLE_RATE_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_TX_OVER_SAMPLE_RATE_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_TX_FIFO_WRITE_DATA_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_TX_FIFO_WRITE_DATA_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_TX_FIFO_WRITE_DATA_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3638_AUX_TX_P0   0x3638
 
#define AUX_TX_FIFO_READ_POINTER_AUX_TX_P0_FLDMASK   0xf0
 
#define AUX_TX_FIFO_READ_POINTER_AUX_TX_P0_FLDMASK_POS   4
 
#define AUX_TX_FIFO_READ_POINTER_AUX_TX_P0_FLDMASK_LEN   4
 
#define AUX_TX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK   0xf
 
#define AUX_TX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_TX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK_LEN   4
 
#define REG_363C_AUX_TX_P0   0x363C
 
#define AUX_TX_FIFO_FULL_AUX_TX_P0_FLDMASK   0x1000
 
#define AUX_TX_FIFO_FULL_AUX_TX_P0_FLDMASK_POS   12
 
#define AUX_TX_FIFO_FULL_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_TX_FIFO_EMPTY_AUX_TX_P0_FLDMASK   0x800
 
#define AUX_TX_FIFO_EMPTY_AUX_TX_P0_FLDMASK_POS   11
 
#define AUX_TX_FIFO_EMPTY_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_TX_PHY_STATE_AUX_TX_P0_FLDMASK   0x7ff
 
#define AUX_TX_PHY_STATE_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_TX_PHY_STATE_AUX_TX_P0_FLDMASK_LEN   11
 
#define REG_3640_AUX_TX_P0   0x3640
 
#define AUX_RX_RECV_COMPLETE_IRQ_TX_P0_FLDMASK   0x40
 
#define AUX_RX_AUX_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_POS   6
 
#define AUX_RX_AUX_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_RX_EDID_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK   0x20
 
#define AUX_RX_EDID_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_POS   5
 
#define AUX_RX_EDID_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_RX_MCCS_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK   0x10
 
#define AUX_RX_MCCS_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_POS   4
 
#define AUX_RX_MCCS_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_RX_CMD_RECV_IRQ_AUX_TX_P0_FLDMASK   0x8
 
#define AUX_RX_CMD_RECV_IRQ_AUX_TX_P0_FLDMASK_POS   3
 
#define AUX_RX_CMD_RECV_IRQ_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_RX_ADDR_RECV_IRQ_AUX_TX_P0_FLDMASK   0x4
 
#define AUX_RX_ADDR_RECV_IRQ_AUX_TX_P0_FLDMASK_POS   2
 
#define AUX_RX_ADDR_RECV_IRQ_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_RX_DATA_RECV_IRQ_AUX_TX_P0_FLDMASK   0x2
 
#define AUX_RX_DATA_RECV_IRQ_AUX_TX_P0_FLDMASK_POS   1
 
#define AUX_RX_DATA_RECV_IRQ_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_400US_TIMEOUT_IRQ_AUX_TX_P0_FLDMASK   0x1
 
#define AUX_400US_TIMEOUT_IRQ_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_400US_TIMEOUT_IRQ_AUX_TX_P0_FLDMASK_LEN   1
 
#define REG_3644_AUX_TX_P0   0x3644
 
#define MCU_REQUEST_COMMAND_AUX_TX_P0_FLDMASK   0xf
 
#define MCU_REQUEST_COMMAND_AUX_TX_P0_FLDMASK_POS   0
 
#define MCU_REQUEST_COMMAND_AUX_TX_P0_FLDMASK_LEN   4
 
#define AUX_STATE_AUX_TX_P0_FLDMASK   0xf00
 
#define AUX_STATE_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_STATE_AUX_TX_P0_FLDMASK_LEN   4
 
#define REG_3648_AUX_TX_P0   0x3648
 
#define MCU_REQUEST_ADDRESS_LSB_AUX_TX_P0_FLDMASK   0xffff
 
#define MCU_REQUEST_ADDRESS_LSB_AUX_TX_P0_FLDMASK_POS   0
 
#define MCU_REQUEST_ADDRESS_LSB_AUX_TX_P0_FLDMASK_LEN   16
 
#define REG_364C_AUX_TX_P0   0x364C
 
#define MCU_REQUEST_ADDRESS_MSB_AUX_TX_P0_FLDMASK   0xf
 
#define MCU_REQUEST_ADDRESS_MSB_AUX_TX_P0_FLDMASK_POS   0
 
#define MCU_REQUEST_ADDRESS_MSB_AUX_TX_P0_FLDMASK_LEN   4
 
#define REG_3650_AUX_TX_P0   0x3650
 
#define MCU_REQUEST_DATA_NUM_AUX_TX_P0_FLDMASK   0xf000
 
#define MCU_REQ_DATA_NUM_AUX_TX_P0_FLDMASK_POS   12
 
#define MCU_REQUEST_DATA_NUM_AUX_TX_P0_FLDMASK_LEN   4
 
#define PHY_FIFO_RST_AUX_TX_P0_FLDMASK   0x200
 
#define PHY_FIFO_RST_AUX_TX_P0_FLDMASK_POS   9
 
#define PHY_FIFO_RST_AUX_TX_P0_FLDMASK_LEN   1
 
#define MCU_ACK_TRANSACTION_COMPLETE_AUX_TX_P0_FLDMASK   0x100
 
#define MCU_ACK_TRAN_COMPLETE_AUX_TX_P0_FLDMASK_POS   8
 
#define MCU_ACK_TRANSACTION_COMPLETE_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_TEST_CONFIG_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_TEST_CONFIG_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_TEST_CONFIG_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3654_AUX_TX_P0   0x3654
 
#define TST_AUXRX_AUX_TX_P0_FLDMASK   0xff
 
#define TST_AUXRX_AUX_TX_P0_FLDMASK_POS   0
 
#define TST_AUXRX_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3658_AUX_TX_P0   0x3658
 
#define AUX_TX_OV_EN_AUX_TX_P0_FLDMASK   0x1
 
#define AUX_TX_OV_EN_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_TX_OV_EN_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_TX_VALUE_SET_AUX_TX_P0_FLDMASK   0x2
 
#define AUX_TX_VALUE_SET_AUX_TX_P0_FLDMASK_POS   1
 
#define AUX_TX_VALUE_SET_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_TX_OEN_SET_AUX_TX_P0_FLDMASK   0x4
 
#define AUX_TX_OEN_SET_AUX_TX_P0_FLDMASK_POS   2
 
#define AUX_TX_OEN_SET_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_TX_OV_MODE_AUX_TX_P0_FLDMASK   0x8
 
#define AUX_TX_OV_MODE_AUX_TX_P0_FLDMASK_POS   3
 
#define AUX_TX_OV_MODE_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_TX_OFF_AUX_TX_P0_FLDMASK   0x10
 
#define AUX_TX_OFF_AUX_TX_P0_FLDMASK_POS   4
 
#define AUX_TX_OFF_AUX_TX_P0_FLDMASK_LEN   1
 
#define EXT_AUX_PHY_MODE_AUX_TX_P0_FLDMASK   0x20
 
#define EXT_AUX_PHY_MODE_AUX_TX_P0_FLDMASK_POS   5
 
#define EXT_AUX_PHY_MODE_AUX_TX_P0_FLDMASK_LEN   1
 
#define EXT_TX_OEN_POLARITY_AUX_TX_P0_FLDMASK   0x40
 
#define EXT_TX_OEN_POLARITY_AUX_TX_P0_FLDMASK_POS   6
 
#define EXT_TX_OEN_POLARITY_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_RX_OEN_SET_AUX_TX_P0_FLDMASK   0x80
 
#define AUX_RX_OEN_SET_AUX_TX_P0_FLDMASK_POS   7
 
#define AUX_RX_OEN_SET_AUX_TX_P0_FLDMASK_LEN   1
 
#define REG_365C_AUX_TX_P0   0x365C
 
#define AUX_RCTRL_AUX_TX_P0_FLDMASK   0x1f
 
#define AUX_RCTRL_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_RCTRL_AUX_TX_P0_FLDMASK_LEN   5
 
#define AUX_RPD_AUX_TX_P0_FLDMASK   0x20
 
#define AUX_RPD_AUX_TX_P0_FLDMASK_POS   5
 
#define AUX_RPD_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_RX_SEL_AUX_TX_P0_FLDMASK   0x40
 
#define AUX_RX_SEL_AUX_TX_P0_FLDMASK_POS   6
 
#define AUX_RX_SEL_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUXRX_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK   0x80
 
#define AUXRX_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK_POS   7
 
#define AUXRX_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUXRXVALID_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK   0x100
 
#define AUXRXVALID_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK_POS   8
 
#define AUXRXVALID_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_DEBOUNCE_CLKSEL_AUX_TX_P0_FLDMASK   0xe00
 
#define AUX_DEBOUNCE_CLKSEL_AUX_TX_P0_FLDMASK_POS   9
 
#define AUX_DEBOUNCE_CLKSEL_AUX_TX_P0_FLDMASK_LEN   3
 
#define DATA_VALID_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK   0x1000
 
#define DATA_VALID_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK_POS   12
 
#define DATA_VALID_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK_LEN   1
 
#define REG_3660_AUX_TX_P0   0x3660
 
#define DP_TX_INT_MASK_AUX_TX_P0_FLDMASK   0xffff
 
#define DP_TX_INT_MASK_AUX_TX_P0_FLDMASK_POS   0
 
#define DP_TX_INT_MASK_AUX_TX_P0_FLDMASK_LEN   16
 
#define REG_3664_AUX_TX_P0   0x3664
 
#define DP_TX_INT_FORCE_AUX_TX_P0_FLDMASK   0xffff
 
#define DP_TX_INT_FORCE_AUX_TX_P0_FLDMASK_POS   0
 
#define DP_TX_INT_FORCE_AUX_TX_P0_FLDMASK_LEN   16
 
#define REG_3668_AUX_TX_P0   0x3668
 
#define DP_TX_INT_CLR_AUX_TX_P0_FLDMASK   0xffff
 
#define DP_TX_INT_CLR_AUX_TX_P0_FLDMASK_POS   0
 
#define DP_TX_INT_CLR_AUX_TX_P0_FLDMASK_LEN   16
 
#define REG_366C_AUX_TX_P0   0x366C
 
#define XTAL_FREQ_AUX_TX_P0_FLDMASK   0xff00
 
#define XTAL_FREQ_AUX_TX_P0_FLDMASK_POS   8
 
#define XTAL_FREQ_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3670_AUX_TX_P0   0x3670
 
#define DPTX_GPIO_OEN_AUX_TX_P0_FLDMASK   0x7
 
#define DPTX_GPIO_OEN_AUX_TX_P0_FLDMASK_POS   0
 
#define DPTX_GPIO_OEN_AUX_TX_P0_FLDMASK_LEN   3
 
#define DPTX_GPIO_OUT_AUX_TX_P0_FLDMASK   0x38
 
#define DPTX_GPIO_OUT_AUX_TX_P0_FLDMASK_POS   3
 
#define DPTX_GPIO_OUT_AUX_TX_P0_FLDMASK_LEN   3
 
#define DPTX_GPIO_IN_AUX_TX_P0_FLDMASK   0x1c0
 
#define DPTX_GPIO_IN_AUX_TX_P0_FLDMASK_POS   6
 
#define DPTX_GPIO_IN_AUX_TX_P0_FLDMASK_LEN   3
 
#define AUX_IN_AUX_TX_P0_FLDMASK   0x200
 
#define AUX_IN_AUX_TX_P0_FLDMASK_POS   9
 
#define AUX_IN_AUX_TX_P0_FLDMASK_LEN   1
 
#define PD_AUX_RTERM_AUX_TX_P0_FLDMASK   0x400
 
#define PD_AUX_RTERM_AUX_TX_P0_FLDMASK_POS   10
 
#define PD_AUX_RTERM_AUX_TX_P0_FLDMASK_LEN   1
 
#define DPTX_GPIO_EN_AUX_TX_P0_FLDMASK   0x7000
 
#define DPTX_GPIO_EN_AUX_TX_P0_FLDMASK_POS   12
 
#define DPTX_GPIO_EN_AUX_TX_P0_FLDMASK_LEN   3
 
#define REG_3674_AUX_TX_P0   0x3674
 
#define AUXTX_ISEL_AUX_TX_P0_FLDMASK   0x1f
 
#define AUXTX_ISEL_AUX_TX_P0_FLDMASK_POS   0
 
#define AUXTX_ISEL_AUX_TX_P0_FLDMASK_LEN   5
 
#define AUXRX_VTH_AUX_TX_P0_FLDMASK   0x60
 
#define AUXRX_VTH_AUX_TX_P0_FLDMASK_POS   5
 
#define AUXRX_VTH_AUX_TX_P0_FLDMASK_LEN   2
 
#define EN_RXCM_BOOST_AUX_TX_P0_FLDMASK   0x80
 
#define EN_RXCM_BOOST_AUX_TX_P0_FLDMASK_POS   7
 
#define EN_RXCM_BOOST_AUX_TX_P0_FLDMASK_LEN   1
 
#define DPTX_AUX_R_CTRL_AUX_TX_P0_FLDMASK   0x1f00
 
#define DPTX_AUX_R_CTRL_AUX_TX_P0_FLDMASK_POS   8
 
#define DPTX_AUX_R_CTRL_AUX_TX_P0_FLDMASK_LEN   5
 
#define I2C_EN_AUXN_AUX_TX_P0_FLDMASK   0x2000
 
#define I2C_EN_AUXN_AUX_TX_P0_FLDMASK_POS   13
 
#define I2C_EN_AUXN_AUX_TX_P0_FLDMASK_LEN   1
 
#define I2C_EN_AUXP_AUX_TX_P0_FLDMASK   0x4000
 
#define I2C_EN_AUXP_AUX_TX_P0_FLDMASK_POS   14
 
#define I2C_EN_AUXP_AUX_TX_P0_FLDMASK_LEN   1
 
#define REG_3678_AUX_TX_P0   0x3678
 
#define TEST_AUXTX_AUX_TX_P0_FLDMASK   0xff00
 
#define TEST_AUXTX_AUX_TX_P0_FLDMASK_POS   8
 
#define TEST_AUXTX_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_367C_AUX_TX_P0   0x367C
 
#define DPTX_AUXRX_AUX_TX_P0_FLDMASK   0x4
 
#define DPTX_AUXRX_AUX_TX_P0_FLDMASK_POS   2
 
#define DPTX_AUXRX_AUX_TX_P0_FLDMASK_LEN   1
 
#define DPTX_AUXRX_VALID_AUX_TX_P0_FLDMASK   0x8
 
#define DPTX_AUXRX_VALID_AUX_TX_P0_FLDMASK_POS   3
 
#define DPTX_AUXRX_VALID_AUX_TX_P0_FLDMASK_LEN   1
 
#define DPTX_AUXRX_WO_TH_AUX_TX_P0_FLDMASK   0x10
 
#define DPTX_AUXRX_WO_TH_AUX_TX_P0_FLDMASK_POS   4
 
#define DPTX_AUXRX_WO_TH_AUX_TX_P0_FLDMASK_LEN   1
 
#define DPTX_AUXRX_L_TEST_AUX_TX_P0_FLDMASK   0x20
 
#define DPTX_AUXRX_L_TEST_AUX_TX_P0_FLDMASK_POS   5
 
#define DPTX_AUXRX_L_TEST_AUX_TX_P0_FLDMASK_LEN   1
 
#define EN_AUXRX_AUX_TX_P0_FLDMASK   0x400
 
#define EN_AUXRX_AUX_TX_P0_FLDMASK_POS   10
 
#define EN_AUXRX_AUX_TX_P0_FLDMASK_LEN   1
 
#define EN_AUXTX_AUX_TX_P0_FLDMASK   0x800
 
#define EN_AUXTX_AUX_TX_P0_FLDMASK_POS   11
 
#define EN_AUXTX_AUX_TX_P0_FLDMASK_LEN   1
 
#define EN_AUX_AUX_TX_P0_FLDMASK   0x1000
 
#define EN_AUX_AUX_TX_P0_FLDMASK_POS   12
 
#define EN_AUX_AUX_TX_P0_FLDMASK_LEN   1
 
#define EN_5V_TOL_AUX_TX_P0_FLDMASK   0x2000
 
#define EN_5V_TOL_AUX_TX_P0_FLDMASK_POS   13
 
#define EN_5V_TOL_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUXP_I_AUX_TX_P0_FLDMASK   0x4000
 
#define AUXP_I_AUX_TX_P0_FLDMASK_POS   14
 
#define AUXP_I_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUXN_I_AUX_TX_P0_FLDMASK   0x8000
 
#define AUXN_I_AUX_TX_P0_FLDMASK_POS   15
 
#define AUXN_I_AUX_TX_P0_FLDMASK_LEN   1
 
#define REG_3680_AUX_TX_P0   0x3680
 
#define AUX_SWAP_TX_AUX_TX_P0_FLDMASK   0x1
 
#define AUX_SWAP_TX_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_SWAP_TX_AUX_TX_P0_FLDMASK_LEN   1
 
#define REG_3684_AUX_TX_P0   0x3684
 
#define TEST_IO_LOOPBK_AUX_TX_P0_FLDMASK   0x1f
 
#define TEST_IO_LOOPBK_AUX_TX_P0_FLDMASK_POS   0
 
#define TEST_IO_LOOPBK_AUX_TX_P0_FLDMASK_LEN   5
 
#define RO_IO_LOOPBKT_AUX_TX_P0_FLDMASK   0x300
 
#define RO_IO_LOOPBKT_AUX_TX_P0_FLDMASK_POS   8
 
#define RO_IO_LOOPBKT_AUX_TX_P0_FLDMASK_LEN   2
 
#define SEL_TCLK_AUX_TX_P0_FLDMASK   0x3000
 
#define SEL_TCLK_AUX_TX_P0_FLDMASK_POS   12
 
#define SEL_TCLK_AUX_TX_P0_FLDMASK_LEN   2
 
#define TESTEN_ASIO_AUX_TX_P0_FLDMASK   0x4000
 
#define TESTEN_ASIO_AUX_TX_P0_FLDMASK_POS   14
 
#define TESTEN_ASIO_AUX_TX_P0_FLDMASK_LEN   1
 
#define REG_3688_AUX_TX_P0   0x3688
 
#define TEST_AUXRX_VTH_AUX_TX_P0_FLDMASK   0x7
 
#define TEST_AUXRX_VTH_AUX_TX_P0_FLDMASK_POS   0
 
#define TEST_AUXRX_VTH_AUX_TX_P0_FLDMASK_LEN   3
 
#define REG_368C_AUX_TX_P0   0x368C
 
#define RX_FIFO_DONE_AUX_TX_P0_FLDMASK   0x1
 
#define RX_FIFO_DONE_AUX_TX_P0_FLDMASK_POS   0
 
#define RX_FIFO_DONE_AUX_TX_P0_FLDMASK_LEN   1
 
#define RX_FIFO_DONE_CLR_AUX_TX_P0_FLDMASK   0x2
 
#define RX_FIFO_DONE_CLR_AUX_TX_P0_FLDMASK_POS   1
 
#define RX_FIFO_DONE_CLR_AUX_TX_P0_FLDMASK_LEN   1
 
#define TX_FIFO_DONE_AUX_TX_P0_FLDMASK   0x4
 
#define TX_FIFO_DONE_AUX_TX_P0_FLDMASK_POS   2
 
#define TX_FIFO_DONE_AUX_TX_P0_FLDMASK_LEN   1
 
#define TX_FIFO_DONE_CLR_AUX_TX_P0_FLDMASK   0x8
 
#define TX_FIFO_DONE_CLR_AUX_TX_P0_FLDMASK_POS   3
 
#define TX_FIFO_DONE_CLR_AUX_TX_P0_FLDMASK_LEN   1
 
#define REG_3690_AUX_TX_P0   0x3690
 
#define DATA_LOW_CNT_THRD_AUX_TX_P0_FLDMASK   0x7f
 
#define DATA_LOW_CNT_THRD_AUX_TX_P0_FLDMASK_POS   0
 
#define DATA_LOW_CNT_THRD_AUX_TX_P0_FLDMASK_LEN   7
 
#define RX_REPLY_COMPLETE_MODE_AUX_TX_P0_FLDMASK   0x100
 
#define RX_REPLY_COMPLETE_MODE_AUX_TX_P0_FLDMASK_POS   8
 
#define RX_REPLY_COMPLETE_MODE_AUX_TX_P0_FLDMASK_LEN   1
 
#define REG_36C0_AUX_TX_P0   0x36C0
 
#define RX_GTC_VALUE_0_AUX_TX_P0_FLDMASK   0xffff
 
#define RX_GTC_VALUE_0_AUX_TX_P0_FLDMASK_POS   0
 
#define RX_GTC_VALUE_0_AUX_TX_P0_FLDMASK_LEN   16
 
#define REG_36C4_AUX_TX_P0   0x36C4
 
#define RX_GTC_VALUE_1_AUX_TX_P0_FLDMASK   0xffff
 
#define RX_GTC_VALUE_1_AUX_TX_P0_FLDMASK_POS   0
 
#define RX_GTC_VALUE_1_AUX_TX_P0_FLDMASK_LEN   16
 
#define REG_36C8_AUX_TX_P0   0x36C8
 
#define RX_GTC_MASTER_REQ_AUX_TX_P0_FLDMASK   0x1
 
#define RX_GTC_MASTER_REQ_AUX_TX_P0_FLDMASK_POS   0
 
#define RX_GTC_MASTER_REQ_AUX_TX_P0_FLDMASK_LEN   1
 
#define TX_GTC_VALUE_PHASE_SKEW_EN_AUX_TX_P0_FLDMASK   0x2
 
#define TX_GTC_VALUE_PHASE_SKEW_EN_AUX_TX_P0_FLDMASK_POS   1
 
#define TX_GTC_VALUE_PHASE_SKEW_EN_AUX_TX_P0_FLDMASK_LEN   1
 
#define RX_GTC_FREQ_LOCK_DONE_AUX_TX_P0_FLDMASK   0x4
 
#define RX_GTC_FREQ_LOCK_DONE_AUX_TX_P0_FLDMASK_POS   2
 
#define RX_GTC_FREQ_LOCK_DONE_AUX_TX_P0_FLDMASK_LEN   1
 
#define REG_36CC_AUX_TX_P0   0x36CC
 
#define RX_GTC_PHASE_SKEW_OFFSET_AUX_TX_P0_FLDMASK   0xffff
 
#define RX_GTC_PHASE_SKEW_OFFSET_AUX_TX_P0_FLDMASK_POS   0
 
#define RX_GTC_PHASE_SKEW_OFFSET_AUX_TX_P0_FLDMASK_LEN   16
 
#define REG_36D0_AUX_TX_P0   0x36D0
 
#define TX_GTC_VALUE_0_AUX_TX_P0_FLDMASK   0xffff
 
#define TX_GTC_VALUE_0_AUX_TX_P0_FLDMASK_POS   0
 
#define TX_GTC_VALUE_0_AUX_TX_P0_FLDMASK_LEN   16
 
#define REG_36D4_AUX_TX_P0   0x36D4
 
#define TX_GTC_VALUE_1_AUX_TX_P0_FLDMASK   0xffff
 
#define TX_GTC_VALUE_1_AUX_TX_P0_FLDMASK_POS   0
 
#define TX_GTC_VALUE_1_AUX_TX_P0_FLDMASK_LEN   16
 
#define REG_36D8_AUX_TX_P0   0x36D8
 
#define RX_GTC_VALUE_PHASE_SKEW_EN_AUX_TX_P0_FLDMASK   0x1
 
#define RX_GTC_VALUE_PHASE_SKEW_EN_AUX_TX_P0_FLDMASK_POS   0
 
#define RX_GTC_VALUE_PHASE_SKEW_EN_AUX_TX_P0_FLDMASK_LEN   1
 
#define TX_GTC_FREQ_LOCK_DONE_AUX_TX_P0_FLDMASK   0x2
 
#define TX_GTC_FREQ_LOCK_DONE_AUX_TX_P0_FLDMASK_POS   1
 
#define TX_GTC_FREQ_LOCK_DONE_AUX_TX_P0_FLDMASK_LEN   1
 
#define TX_GTC_VALUE_PHASE_ADJUST_EN_AUX_TX_P0_FLDMASK   0x4
 
#define TX_GTC_VALUE_PHASE_ADJUST_EN_AUX_TX_P0_FLDMASK_POS   2
 
#define TX_GTC_VALUE_PHASE_ADJUST_EN_AUX_TX_P0_FLDMASK_LEN   1
 
#define REG_36DC_AUX_TX_P0   0x36DC
 
#define TX_GTC_PHASE_SKEW_OFFSET_AUX_TX_P0_FLDMASK   0xffff
 
#define TX_GTC_PHASE_SKEW_OFFSET_AUX_TX_P0_FLDMASK_POS   0
 
#define TX_GTC_PHASE_SKEW_OFFSET_AUX_TX_P0_FLDMASK_LEN   16
 
#define REG_36E0_AUX_TX_P0   0x36E0
 
#define GTC_STATE_AUX_TX_P0_FLDMASK   0xf
 
#define GTC_STATE_AUX_TX_P0_FLDMASK_POS   0
 
#define GTC_STATE_AUX_TX_P0_FLDMASK_LEN   4
 
#define RX_MASTER_LOCK_ACCQUI_CHKTIME_AUX_TX_P0_FLDMASK   0xf0
 
#define RX_MASTER_LOCK_ACCQUI_CHKTIME_AUX_TX_P0_FLDMASK_POS   4
 
#define RX_MASTER_LOCK_ACCQUI_CHKTIME_AUX_TX_P0_FLDMASK_LEN   4
 
#define FREQ_AUX_TX_P0_FLDMASK   0xff00
 
#define FREQ_AUX_TX_P0_FLDMASK_POS   8
 
#define FREQ_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_36E4_AUX_TX_P0   0x36E4
 
#define GTC_TX_1M_ADD_VAL_AUX_TX_P0_FLDMASK   0x3ff
 
#define GTC_TX_1M_ADD_VAL_AUX_TX_P0_FLDMASK_POS   0
 
#define GTC_TX_1M_ADD_VAL_AUX_TX_P0_FLDMASK_LEN   10
 
#define GTC_TX_10M_ADD_VAL_AUX_TX_P0_FLDMASK   0xf000
 
#define GTC_TX_10M_ADD_VAL_AUX_TX_P0_FLDMASK_POS   12
 
#define GTC_TX_10M_ADD_VAL_AUX_TX_P0_FLDMASK_LEN   4
 
#define REG_36E8_AUX_TX_P0   0x36E8
 
#define CHK_TX_PH_ADJUST_CHK_EN_AUX_TX_P0_FLDMASK   0x1
 
#define CHK_TX_PH_ADJUST_CHK_EN_AUX_TX_P0_FLDMASK_POS   0
 
#define CHK_TX_PH_ADJUST_CHK_EN_AUX_TX_P0_FLDMASK_LEN   1
 
#define TX_SLAVE_WAIT_SKEW_EN_AUX_TX_P0_FLDMASK   0x2
 
#define TX_SLAVE_WAIT_SKEW_EN_AUX_TX_P0_FLDMASK_POS   1
 
#define TX_SLAVE_WAIT_SKEW_EN_AUX_TX_P0_FLDMASK_LEN   1
 
#define GTC_SEND_RCV_EN_AUX_TX_P0_FLDMASK   0x4
 
#define GTC_SEND_RCV_EN_AUX_TX_P0_FLDMASK_POS   2
 
#define GTC_SEND_RCV_EN_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUXTX_HW_ACCS_EN_AUX_TX_P0_FLDMASK   0x8
 
#define AUXTX_HW_ACCS_EN_AUX_TX_P0_FLDMASK_POS   3
 
#define AUXTX_HW_ACCS_EN_AUX_TX_P0_FLDMASK_LEN   1
 
#define GTC_TX_MASTER_EN_AUX_TX_P0_FLDMASK   0x10
 
#define GTC_TX_MASTER_EN_AUX_TX_P0_FLDMASK_POS   4
 
#define GTC_TX_MASTER_EN_AUX_TX_P0_FLDMASK_LEN   1
 
#define GTC_TX_SLAVE_EN_AUX_TX_P0_FLDMASK   0x20
 
#define GTC_TX_SLAVE_EN_AUX_TX_P0_FLDMASK_POS   5
 
#define GTC_TX_SLAVE_EN_AUX_TX_P0_FLDMASK_LEN   1
 
#define OFFSET_TRY_NUM_AUX_TX_P0_FLDMASK   0xf00
 
#define OFFSET_TRY_NUM_AUX_TX_P0_FLDMASK_POS   8
 
#define OFFSET_TRY_NUM_AUX_TX_P0_FLDMASK_LEN   4
 
#define HW_SW_ARBIT_AUX_TX_P0_FLDMASK   0xc000
 
#define HW_SW_ARBIT_AUX_TX_P0_FLDMASK_POS   14
 
#define HW_SW_ARBIT_AUX_TX_P0_FLDMASK_LEN   2
 
#define REG_36EC_AUX_TX_P0   0x36EC
 
#define GTC_DB_OPTION_AUX_TX_P0_FLDMASK   0x7
 
#define GTC_DB_OPTION_AUX_TX_P0_FLDMASK_POS   0
 
#define GTC_DB_OPTION_AUX_TX_P0_FLDMASK_LEN   3
 
#define TX_SLAVE_CHK_RX_LCK_EN_AUX_TX_P0_FLDMASK   0x8
 
#define TX_SLAVE_CHK_RX_LCK_EN_AUX_TX_P0_FLDMASK_POS   3
 
#define TX_SLAVE_CHK_RX_LCK_EN_AUX_TX_P0_FLDMASK_LEN   1
 
#define GTC_PUL_DELAY_AUX_TX_P0_FLDMASK   0xff00
 
#define GTC_PUL_DELAY_AUX_TX_P0_FLDMASK_POS   8
 
#define GTC_PUL_DELAY_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_36F0_AUX_TX_P0   0x36F0
 
#define GTC_TX_LCK_ACQ_SEND_NUM_AUX_TX_P0_FLDMASK   0x1f
 
#define GTC_TX_LCK_ACQ_SEND_NUM_AUX_TX_P0_FLDMASK_POS   0
 
#define GTC_TX_LCK_ACQ_SEND_NUM_AUX_TX_P0_FLDMASK_LEN   5
 
#define REG_3700_AUX_TX_P0   0x3700
 
#define AUX_PHYWAKE_MODE_AUX_TX_P0_FLDMASK   0x1
 
#define AUX_PHYWAKE_MODE_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_PHYWAKE_MODE_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_PHYWAKE_ONLY_AUX_TX_P0_FLDMASK   0x2
 
#define AUX_PHYWAKE_ONLY_AUX_TX_P0_FLDMASK_POS   1
 
#define AUX_PHYWAKE_ONLY_AUX_TX_P0_FLDMASK_LEN   1
 
#define PHYWAKE_PRE_NUM_AUX_TX_P0_FLDMASK   0x70
 
#define PHYWAKE_PRE_NUM_AUX_TX_P0_FLDMASK_POS   4
 
#define PHYWAKE_PRE_NUM_AUX_TX_P0_FLDMASK_LEN   3
 
#define REG_3704_AUX_TX_P0   0x3704
 
#define AUX_PHYWAKE_ACK_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK   0x1
 
#define AUX_PHYWAKE_ACK_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_PHYWAKE_ACK_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_TX_FIFO_WRITE_DATA_NEW_MODE_TOGGLE_AUX_TX_P0_FLDMASK   0x2
 
#define AUX_TX_FIFO_WRITE_DATA_NEW_MODE_TOGGLE_AUX_TX_P0_FLDMASK_POS   1
 
#define AUX_TX_FIFO_WRITE_DATA_NEW_MODE_TOGGLE_AUX_TX_P0_FLDMASK_LEN   1
 
#define AUX_TX_FIFO_NEW_MODE_EN_AUX_TX_P0_FLDMASK   0x4
 
#define AUX_TX_FIFO_NEW_MODE_EN_AUX_TX_P0_FLDMASK_POS   2
 
#define AUX_TX_FIFO_NEW_MODE_EN_AUX_TX_P0_FLDMASK_LEN   1
 
#define REG_3708_AUX_TX_P0   0x3708
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE0_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE0_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE0_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE1_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE1_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE1_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_370C_AUX_TX_P0   0x370C
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE2_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE2_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE2_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE3_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE3_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE3_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3710_AUX_TX_P0   0x3710
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE4_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE4_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE4_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE5_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE5_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE5_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3714_AUX_TX_P0   0x3714
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE6_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE6_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE6_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE7_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE7_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE7_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3718_AUX_TX_P0   0x3718
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE8_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE8_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE8_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE9_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE9_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE9_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_371C_AUX_TX_P0   0x371C
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE10_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE10_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE10_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE11_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE11_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE11_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3720_AUX_TX_P0   0x3720
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE12_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE12_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE12_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE13_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE13_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE13_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3724_AUX_TX_P0   0x3724
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE14_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE14_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE14_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE15_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE15_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_TX_FIFO_WRITE_DATA_BYTE15_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3740_AUX_TX_P0   0x3740
 
#define HPD_OEN_AUX_TX_P0_FLDMASK   0x1
 
#define HPD_OEN_AUX_TX_P0_FLDMASK_POS   0
 
#define HPD_OEN_AUX_TX_P0_FLDMASK_LEN   1
 
#define HPD_I_AUX_TX_P0_FLDMASK   0x2
 
#define HPD_I_AUX_TX_P0_FLDMASK_POS   1
 
#define HPD_I_AUX_TX_P0_FLDMASK_LEN   1
 
#define REG_3744_AUX_TX_P0   0x3744
 
#define TEST_AUXRX_AUX_TX_P0_FLDMASK   0xffff
 
#define TEST_AUXRX_AUX_TX_P0_FLDMASK_POS   0
 
#define TEST_AUXRX_AUX_TX_P0_FLDMASK_LEN   16
 
#define REG_3748_AUX_TX_P0   0x3748
 
#define CK_XTAL_AUX_TX_P0_FLDMASK   0x1
 
#define CK_XTAL_AUX_TX_P0_FLDMASK_POS   0
 
#define CK_XTAL_AUX_TX_P0_FLDMASK_LEN   1
 
#define EN_FT_MUX_AUX_TX_P0_FLDMASK   0x2
 
#define EN_FT_MUX_AUX_TX_P0_FLDMASK_POS   1
 
#define EN_FT_MUX_AUX_TX_P0_FLDMASK_LEN   1
 
#define EN_GPIO_AUX_TX_P0_FLDMASK   0x4
 
#define EN_GPIO_AUX_TX_P0_FLDMASK_POS   2
 
#define EN_GPIO_AUX_TX_P0_FLDMASK_LEN   1
 
#define EN_HBR3_AUX_TX_P0_FLDMASK   0x8
 
#define EN_HBR3_AUX_TX_P0_FLDMASK_POS   3
 
#define EN_HBR3_AUX_TX_P0_FLDMASK_LEN   1
 
#define PD_NGATE_OV_AUX_TX_P0_FLDMASK   0x10
 
#define PD_NGATE_OV_AUX_TX_P0_FLDMASK_POS   4
 
#define PD_NGATE_OV_AUX_TX_P0_FLDMASK_LEN   1
 
#define PD_NGATE_OVEN_AUX_TX_P0_FLDMASK   0x20
 
#define PD_NGATE_OVEN_AUX_TX_P0_FLDMASK_POS   5
 
#define PD_NGATE_OVEN_AUX_TX_P0_FLDMASK_LEN   1
 
#define PD_VCM_OP_AUX_TX_P0_FLDMASK   0x40
 
#define PD_VCM_OP_AUX_TX_P0_FLDMASK_POS   6
 
#define PD_VCM_OP_AUX_TX_P0_FLDMASK_LEN   1
 
#define CK_XTAL_SW_AUX_TX_P0_FLDMASK   0x80
 
#define CK_XTAL_SW_AUX_TX_P0_FLDMASK_POS   7
 
#define CK_XTAL_SW_AUX_TX_P0_FLDMASK_LEN   1
 
#define SEL_FTMUX_AUX_TX_P0_FLDMASK   0x300
 
#define SEL_FTMUX_AUX_TX_P0_FLDMASK_POS   8
 
#define SEL_FTMUX_AUX_TX_P0_FLDMASK_LEN   2
 
#define GTC_EN_AUX_TX_P0_FLDMASK   0x400
 
#define GTC_EN_AUX_TX_P0_FLDMASK_POS   10
 
#define GTC_EN_AUX_TX_P0_FLDMASK_LEN   1
 
#define GTC_DATA_IN_MODE_AUX_TX_P0_FLDMASK   0x800
 
#define GTC_DATA_IN_MODE_AUX_TX_P0_FLDMASK_POS   11
 
#define GTC_DATA_IN_MODE_AUX_TX_P0_FLDMASK_LEN   1
 
#define REG_374C_AUX_TX_P0   0x374C
 
#define AUX_VALID_DB_TH_AUX_TX_P0_FLDMASK   0xf
 
#define AUX_VALID_DB_TH_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_VALID_DB_TH_AUX_TX_P0_FLDMASK_LEN   4
 
#define CLK_AUX_MUX_VALID_EN_AUX_TX_P0_FLDMASK   0x100
 
#define CLK_AUX_MUX_VALID_EN_AUX_TX_P0_FLDMASK_POS   8
 
#define CLK_AUX_MUX_VALID_EN_AUX_TX_P0_FLDMASK_LEN   1
 
#define CLK_AUX_MUX_VALID_INV_AUX_TX_P0_FLDMASK   0x200
 
#define CLK_AUX_MUX_VALID_INV_AUX_TX_P0_FLDMASK_POS   9
 
#define CLK_AUX_MUX_VALID_INV_AUX_TX_P0_FLDMASK_LEN   1
 
#define CLK_AUX_MUX_VALID_SEL_AUX_TX_P0_FLDMASK   0xc00
 
#define CLK_AUX_MUX_VALID_SEL_AUX_TX_P0_FLDMASK_POS   10
 
#define CLK_AUX_MUX_VALID_SEL_AUX_TX_P0_FLDMASK_LEN   2
 
#define CLK_AUX_MUX_DATA_EN_AUX_TX_P0_FLDMASK   0x1000
 
#define CLK_AUX_MUX_DATA_EN_AUX_TX_P0_FLDMASK_POS   12
 
#define CLK_AUX_MUX_DATA_EN_AUX_TX_P0_FLDMASK_LEN   1
 
#define CLK_AUX_MUX_DATA_INV_AUX_TX_P0_FLDMASK   0x2000
 
#define CLK_AUX_MUX_DATA_INV_AUX_TX_P0_FLDMASK_POS   13
 
#define CLK_AUX_MUX_DATA_INV_AUX_TX_P0_FLDMASK_LEN   1
 
#define CLK_AUX_MUX_DATA_SEL_AUX_TX_P0_FLDMASK   0xc000
 
#define CLK_AUX_MUX_DATA_SEL_AUX_TX_P0_FLDMASK_POS   14
 
#define CLK_AUX_MUX_DATA_SEL_AUX_TX_P0_FLDMASK_LEN   2
 
#define REG_3780_AUX_TX_P0   0x3780
 
#define AUX_RX_FIFO_DATA0_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_RX_FIFO_DATA0_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_RX_FIFO_DATA0_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_RX_FIFO_DATA1_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_RX_FIFO_DATA1_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_RX_FIFO_DATA1_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3784_AUX_TX_P0   0x3784
 
#define AUX_RX_FIFO_DATA2_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_RX_FIFO_DATA2_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_RX_FIFO_DATA2_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_RX_FIFO_DATA3_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_RX_FIFO_DATA3_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_RX_FIFO_DATA3_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3788_AUX_TX_P0   0x3788
 
#define AUX_RX_FIFO_DATA4_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_RX_FIFO_DATA4_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_RX_FIFO_DATA4_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_RX_FIFO_DATA5_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_RX_FIFO_DATA5_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_RX_FIFO_DATA5_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_378C_AUX_TX_P0   0x378C
 
#define AUX_RX_FIFO_DATA6_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_RX_FIFO_DATA6_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_RX_FIFO_DATA6_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_RX_FIFO_DATA7_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_RX_FIFO_DATA7_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_RX_FIFO_DATA7_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3790_AUX_TX_P0   0x3790
 
#define AUX_RX_FIFO_DATA8_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_RX_FIFO_DATA8_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_RX_FIFO_DATA8_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_RX_FIFO_DATA9_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_RX_FIFO_DATA9_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_RX_FIFO_DATA9_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3794_AUX_TX_P0   0x3794
 
#define AUX_RX_FIFO_DATA10_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_RX_FIFO_DATA10_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_RX_FIFO_DATA10_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_RX_FIFO_DATA11_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_RX_FIFO_DATA11_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_RX_FIFO_DATA11_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_3798_AUX_TX_P0   0x3798
 
#define AUX_RX_FIFO_DATA12_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_RX_FIFO_DATA12_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_RX_FIFO_DATA12_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_RX_FIFO_DATA13_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_RX_FIFO_DATA13_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_RX_FIFO_DATA13_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_379C_AUX_TX_P0   0x379C
 
#define AUX_RX_FIFO_DATA14_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_RX_FIFO_DATA14_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_RX_FIFO_DATA14_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_RX_FIFO_DATA15_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_RX_FIFO_DATA15_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_RX_FIFO_DATA15_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_37C0_AUX_TX_P0   0x37C0
 
#define AUX_DRV_EN_TIME_THRD_AUX_TX_P0_FLDMASK   0x1f
 
#define AUX_DRV_EN_TIME_THRD_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_DRV_EN_TIME_THRD_AUX_TX_P0_FLDMASK_LEN   5
 
#define AUX_DRV_DIS_TIME_THRD_AUX_TX_P0_FLDMASK   0x1f00
 
#define AUX_DRV_DIS_TIME_THRD_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_DRV_DIS_TIME_THRD_AUX_TX_P0_FLDMASK_LEN   5
 
#define REG_37C4_AUX_TX_P0   0x37C4
 
#define AUX_WAIT_TRANSFER_TIME_THRD_AUX_TX_P0_FLDMASK   0xff
 
#define AUX_WAIT_TRANSFER_TIME_THRD_AUX_TX_P0_FLDMASK_POS   0
 
#define AUX_WAIT_TRANSFER_TIME_THRD_AUX_TX_P0_FLDMASK_LEN   8
 
#define AUX_WAIT_RECEIVE_TIME_THRD_AUX_TX_P0_FLDMASK   0xff00
 
#define AUX_WAIT_RECEIVE_TIME_THRD_AUX_TX_P0_FLDMASK_POS   8
 
#define AUX_WAIT_RECEIVE_TIME_THRD_AUX_TX_P0_FLDMASK_LEN   8
 
#define REG_37C8_AUX_TX_P0   0x37C8
 
#define MTK_ATOP_EN_AUX_TX_P0_FLDMASK   0x1
 
#define MTK_ATOP_EN_AUX_TX_P0_FLDMASK_POS   0
 
#define MTK_ATOP_EN_AUX_TX_P0_FLDMASK_LEN   1
 
#define DP_TX_TOP_PWR_STATE   (TOP_OFFSET + 0x00)
 
#define DP_PWR_STATE_FLDMASK   0x3
 
#define DP_PWR_STATE_FLDMASK_POS   0
 
#define DP_PWR_STATE_FLDMASK_LEN   2
 
#define DP_SCRAMB_EN_FLDMASK   0x4
 
#define DP_SCRAMB_EN_FLDMASK_POS   2
 
#define DP_SCRAMB_EN_FLDMASK_LEN   1
 
#define DP_DISP_RST_FLDMASK   0x8
 
#define DP_DISP_RST_FLDMASK_POS   3
 
#define DP_DISP_RST_FLDMASK_LEN   1
 
#define DP_TX_TOP_SWING_EMP   (TOP_OFFSET + 0x04)
 
#define DP_TX0_VOLT_SWING_FLDMASK   0x3
 
#define DP_TX0_VOLT_SWING_FLDMASK_POS   0
 
#define DP_TX0_VOLT_SWING_FLDMASK_LEN   2
 
#define DP_TX0_PRE_EMPH_FLDMASK   0xc
 
#define DP_TX0_PRE_EMPH_FLDMASK_POS   2
 
#define DP_TX0_PRE_EMPH_FLDMASK_LEN   2
 
#define DP_TX0_DATAK_FLDMASK   0xf0
 
#define DP_TX0_DATAK_FLDMASK_POS   4
 
#define DP_TX0_DATAK_FLDMASK_LEN   4
 
#define DP_TX1_VOLT_SWING_FLDMASK   0x300
 
#define DP_TX1_VOLT_SWING_FLDMASK_POS   8
 
#define DP_TX1_VOLT_SWING_FLDMASK_LEN   2
 
#define DP_TX1_PRE_EMPH_FLDMASK   0xc00
 
#define DP_TX1_PRE_EMPH_FLDMASK_POS   10
 
#define DP_TX1_PRE_EMPH_FLDMASK_LEN   2
 
#define DP_TX1_DATAK_FLDMASK   0xf000
 
#define DP_TX1_DATAK_FLDMASK_POS   12
 
#define DP_TX1_DATAK_FLDMASK_LEN   4
 
#define DP_TX2_VOLT_SWING_FLDMASK   0x30000
 
#define DP_TX2_VOLT_SWING_FLDMASK_POS   16
 
#define DP_TX2_VOLT_SWING_FLDMASK_LEN   2
 
#define DP_TX2_PRE_EMPH_FLDMASK   0xc0000
 
#define DP_TX2_PRE_EMPH_FLDMASK_POS   18
 
#define DP_TX2_PRE_EMPH_FLDMASK_LEN   2
 
#define DP_TX2_DATAK_FLDMASK   0xf00000
 
#define DP_TX2_DATAK_FLDMASK_POS   20
 
#define DP_TX2_DATAK_FLDMASK_LEN   4
 
#define DP_TX3_VOLT_SWING_FLDMASK   0x3000000
 
#define DP_TX3_VOLT_SWING_FLDMASK_POS   24
 
#define DP_TX3_VOLT_SWING_FLDMASK_LEN   2
 
#define DP_TX3_PRE_EMPH_FLDMASK   0xc000000
 
#define DP_TX3_PRE_EMPH_FLDMASK_POS   26
 
#define DP_TX3_PRE_EMPH_FLDMASK_LEN   2
 
#define DP_TX3_DATAK_FLDMASK   0xf0000000L
 
#define DP_TX3_DATAK_FLDMASK_POS   28
 
#define DP_TX3_DATAK_FLDMASK_LEN   4
 
#define DP_TX_TOP_APB_WSTRB   (TOP_OFFSET + 0x10)
 
#define APB_WSTRB_FLDMASK   0xf
 
#define APB_WSTRB_FLDMASK_POS   0
 
#define APB_WSTRB_FLDMASK_LEN   4
 
#define APB_WSTRB_EN_FLDMASK   0x10
 
#define APB_WSTRB_EN_FLDMASK_POS   4
 
#define APB_WSTRB_EN_FLDMASK_LEN   1
 
#define DP_TX_TOP_RESERVED   (TOP_OFFSET + 0x14)
 
#define RESERVED_FLDMASK   0xffffffffL
 
#define RESERVED_FLDMASK_POS   0
 
#define RESERVED_FLDMASK_LEN   32
 
#define DP_TX_TOP_RESET_AND_PROBE   (TOP_OFFSET + 0x20)
 
#define SW_RST_B_FLDMASK   0x1f
 
#define SW_RST_B_FLDMASK_POS   0
 
#define SW_RST_B_FLDMASK_LEN   5
 
#define PROBE_LOW_SEL_FLDMASK   0x38000
 
#define PROBE_LOW_SEL_FLDMASK_POS   15
 
#define PROBE_LOW_SEL_FLDMASK_LEN   3
 
#define PROBE_HIGH_SEL_FLDMASK   0x1c0000
 
#define PROBE_HIGH_SEL_FLDMASK_POS   18
 
#define PROBE_HIGH_SEL_FLDMASK_LEN   3
 
#define PROBE_LOW_HIGH_SWAP_FLDMASK   0x200000
 
#define PROBE_LOW_HIGH_SWAP_FLDMASK_POS   21
 
#define PROBE_LOW_HIGH_SWAP_FLDMASK_LEN   1
 
#define DP_TX_TOP_SOFT_PROBE   (TOP_OFFSET + 0x24)
 
#define SW_PROBE_VALUE_FLDMASK   0xffffffffL
 
#define SW_PROBE_VALUE_FLDMASK_POS   0
 
#define SW_PROBE_VALUE_FLDMASK_LEN   32
 
#define DP_TX_TOP_IRQ_STATUS   (TOP_OFFSET + 0x28)
 
#define RGS_IRQ_STATUS_FLDMASK   0x7
 
#define RGS_IRQ_STATUS_FLDMASK_POS   0
 
#define RGS_IRQ_STATUS_FLDMASK_LEN   3
 
#define DP_TX_TOP_IRQ_MASK   (TOP_OFFSET + 0x2C)
 
#define IRQ_MASK_FLDMASK   0x7
 
#define IRQ_MASK_FLDMASK_POS   0
 
#define IRQ_MASK_FLDMASK_LEN   3
 
#define IRQ_OUT_HIGH_ACTIVE_FLDMASK   0x100
 
#define IRQ_OUT_HIGH_ACTIVE_FLDMASK_POS   8
 
#define IRQ_OUT_HIGH_ACTIVE_FLDMASK_LEN   1
 
#define DP_TX_TOP_BLACK_SCREEN   (TOP_OFFSET + 0x30)
 
#define BLACK_SCREEN_ENABLE_FLDMASK   0x1
 
#define BLACK_SCREEN_ENABLE_FLDMASK_POS   0
 
#define BLACK_SCREEN_ENABLE_FLDMASK_LEN   1
 
#define DP_TX_TOP_MEM_PD   (TOP_OFFSET + 0x38)
 
#define MEM_ISO_EN_FLDMASK   0x1
 
#define MEM_ISO_EN_FLDMASK_POS   0
 
#define MEM_ISO_EN_FLDMASK_LEN   1
 
#define MEM_PD_FLDMASK   0x2
 
#define MEM_PD_FLDMASK_POS   1
 
#define MEM_PD_FLDMASK_LEN   1
 
#define FUSE_SEL_FLDMASK   0x4
 
#define FUSE_SEL_FLDMASK_POS   2
 
#define FUSE_SEL_FLDMASK_LEN   1
 
#define LOAD_PREFUSE_FLDMASK   0x8
 
#define LOAD_PREFUSE_FLDMASK_POS   3
 
#define LOAD_PREFUSE_FLDMASK_LEN   1
 
#define DP_TX_TOP_MBIST_PREFUSE   (TOP_OFFSET + 0x3C)
 
#define RGS_PREFUSE_FLDMASK   0xffff
 
#define RGS_PREFUSE_FLDMASK_POS   0
 
#define RGS_PREFUSE_FLDMASK_LEN   16
 
#define DP_TX_TOP_MEM_DELSEL_0   (TOP_OFFSET + 0x40)
 
#define DELSEL_0_FLDMASK   0xfffff
 
#define DELSEL_0_FLDMASK_POS   0
 
#define DELSEL_0_FLDMASK_LEN   20
 
#define USE_DEFAULT_DELSEL_0_FLDMASK   0x100000
 
#define USE_DEFAULT_DELSEL_0_FLDMASK_POS   20
 
#define USE_DEFAULT_DELSEL_0_FLDMASK_LEN   1
 
#define DP_TX_TOP_MEM_DELSEL_1   (TOP_OFFSET + 0x44)
 
#define DELSEL_1_FLDMASK   0xfffff
 
#define DELSEL_1_FLDMASK_POS   0
 
#define DELSEL_1_FLDMASK_LEN   20
 
#define USE_DEFAULT_DELSEL_1_FLDMASK   0x100000
 
#define USE_DEFAULT_DELSEL_1_FLDMASK_POS   20
 
#define USE_DEFAULT_DELSEL_1_FLDMASK_LEN   1
 
#define DP_TX_TOP_MEM_DELSEL_2   (TOP_OFFSET + 0x48)
 
#define DELSEL_2_FLDMASK   0xfffff
 
#define DELSEL_2_FLDMASK_POS   0
 
#define DELSEL_2_FLDMASK_LEN   20
 
#define USE_DEFAULT_DELSEL_2_FLDMASK   0x100000
 
#define USE_DEFAULT_DELSEL_2_FLDMASK_POS   20
 
#define USE_DEFAULT_DELSEL_2_FLDMASK_LEN   1
 
#define DP_TX_TOP_MEM_DELSEL_3   (TOP_OFFSET + 0x4C)
 
#define DELSEL_3_FLDMASK   0xfffff
 
#define DELSEL_3_FLDMASK_POS   0
 
#define DELSEL_3_FLDMASK_LEN   20
 
#define USE_DEFAULT_DELSEL_3_FLDMASK   0x100000
 
#define USE_DEFAULT_DELSEL_3_FLDMASK_POS   20
 
#define USE_DEFAULT_DELSEL_3_FLDMASK_LEN   1
 
#define DP_TX_TOP_MEM_DELSEL_4   (TOP_OFFSET + 0x50)
 
#define DELSEL_4_FLDMASK   0xfffff
 
#define DELSEL_4_FLDMASK_POS   0
 
#define DELSEL_4_FLDMASK_LEN   20
 
#define USE_DEFAULT_DELSEL_4_FLDMASK   0x100000
 
#define USE_DEFAULT_DELSEL_4_FLDMASK_POS   20
 
#define USE_DEFAULT_DELSEL_4_FLDMASK_LEN   1
 
#define DP_TX_TOP_MEM_DELSEL_5   (TOP_OFFSET + 0x54)
 
#define DELSEL_5_FLDMASK   0xfffff
 
#define DELSEL_5_FLDMASK_POS   0
 
#define DELSEL_5_FLDMASK_LEN   20
 
#define USE_DEFAULT_DELSEL_5_FLDMASK   0x100000
 
#define USE_DEFAULT_DELSEL_5_FLDMASK_POS   20
 
#define USE_DEFAULT_DELSEL_5_FLDMASK_LEN   1
 
#define DP_TX_TOP_MEM_DELSEL_6   (TOP_OFFSET + 0x58)
 
#define DELSEL_6_FLDMASK   0xfffff
 
#define DELSEL_6_FLDMASK_POS   0
 
#define DELSEL_6_FLDMASK_LEN   20
 
#define USE_DEFAULT_DELSEL_6_FLDMASK   0x100000
 
#define USE_DEFAULT_DELSEL_6_FLDMASK_POS   20
 
#define USE_DEFAULT_DELSEL_6_FLDMASK_LEN   1
 
#define DP_TX_TOP_MEM_DELSEL_7   (TOP_OFFSET + 0x5C)
 
#define DELSEL_7_FLDMASK   0xfffff
 
#define DELSEL_7_FLDMASK_POS   0
 
#define DELSEL_7_FLDMASK_LEN   20
 
#define USE_DEFAULT_DELSEL_7_FLDMASK   0x100000
 
#define USE_DEFAULT_DELSEL_7_FLDMASK_POS   20
 
#define USE_DEFAULT_DELSEL_7_FLDMASK_LEN   1
 
#define DP_TX_TOP_MEM_DELSEL_8   (TOP_OFFSET + 0x60)
 
#define DELSEL_8_FLDMASK   0xfffff
 
#define DELSEL_8_FLDMASK_POS   0
 
#define DELSEL_8_FLDMASK_LEN   20
 
#define USE_DEFAULT_DELSEL_8_FLDMASK   0x100000
 
#define USE_DEFAULT_DELSEL_8_FLDMASK_POS   20
 
#define USE_DEFAULT_DELSEL_8_FLDMASK_LEN   1
 
#define DP_TX_TOP_MEM_DELSEL_9   (TOP_OFFSET + 0x64)
 
#define DELSEL_9_FLDMASK   0xfffff
 
#define DELSEL_9_FLDMASK_POS   0
 
#define DELSEL_9_FLDMASK_LEN   20
 
#define USE_DEFAULT_DELSEL_9_FLDMASK   0x100000
 
#define USE_DEFAULT_DELSEL_9_FLDMASK_POS   20
 
#define USE_DEFAULT_DELSEL_9_FLDMASK_LEN   1
 
#define DP_TX_TOP_MEM_DELSEL_10   (TOP_OFFSET + 0x68)
 
#define DELSEL_10_FLDMASK   0xfffff
 
#define DELSEL_10_FLDMASK_POS   0
 
#define DELSEL_10_FLDMASK_LEN   20
 
#define USE_DEFAULT_DELSEL_10_FLDMASK   0x100000
 
#define USE_DEFAULT_DELSEL_10_FLDMASK_POS   20
 
#define USE_DEFAULT_DELSEL_10_FLDMASK_LEN   1
 
#define DP_TX_TOP_MEM_DELSEL_11   (TOP_OFFSET + 0x6C)
 
#define DELSEL_11_FLDMASK   0xfffff
 
#define DELSEL_11_FLDMASK_POS   0
 
#define DELSEL_11_FLDMASK_LEN   20
 
#define USE_DEFAULT_DELSEL_11_FLDMASK   0x100000
 
#define USE_DEFAULT_DELSEL_11_FLDMASK_POS   20
 
#define USE_DEFAULT_DELSEL_11_FLDMASK_LEN   1
 
#define DP_TX_TOP_MEM_DELSEL_12   (TOP_OFFSET + 0x70)
 
#define DELSEL_12_FLDMASK   0xfffff
 
#define DELSEL_12_FLDMASK_POS   0
 
#define DELSEL_12_FLDMASK_LEN   20
 
#define USE_DEFAULT_DELSEL_12_FLDMASK   0x100000
 
#define USE_DEFAULT_DELSEL_12_FLDMASK_POS   20
 
#define USE_DEFAULT_DELSEL_12_FLDMASK_LEN   1
 
#define DP_TX_TOP_PWR_ACK   (TOP_OFFSET + 0x80)
 
#define RGS_DP_TX_PWR_ACK_FLDMASK   0x1
 
#define RGS_DP_TX_PWR_ACK_FLDMASK_POS   0
 
#define RGS_DP_TX_PWR_ACK_FLDMASK_LEN   1
 
#define RGS_DP_TX_PWR_ACK_2ND_FLDMASK   0x2
 
#define RGS_DP_TX_PWR_ACK_2ND_FLDMASK_POS   1
 
#define RGS_DP_TX_PWR_ACK_2ND_FLDMASK_LEN   1
 
#define DP_TX_SECURE_REG0   (SEC_OFFSET + 0x00)
 
#define HDCP22_KS_XOR_LC128_KEY_0_FLDMASK   0xffffffffL
 
#define HDCP22_KS_XOR_LC128_KEY_0_FLDMASK_POS   0
 
#define HDCP22_KS_XOR_LC128_KEY_0_FLDMASK_LEN   32
 
#define DP_TX_SECURE_REG1   (SEC_OFFSET + 0x04)
 
#define HDCP22_KS_XOR_LC128_KEY_1_FLDMASK   0xffffffffL
 
#define HDCP22_KS_XOR_LC128_KEY_1_FLDMASK_POS   0
 
#define HDCP22_KS_XOR_LC128_KEY_1_FLDMASK_LEN   32
 
#define DP_TX_SECURE_REG2   (SEC_OFFSET + 0x08)
 
#define HDCP22_KS_XOR_LC128_KEY_2_FLDMASK   0xffffffffL
 
#define HDCP22_KS_XOR_LC128_KEY_2_FLDMASK_POS   0
 
#define HDCP22_KS_XOR_LC128_KEY_2_FLDMASK_LEN   32
 
#define DP_TX_SECURE_REG3   (SEC_OFFSET + 0x0c)
 
#define HDCP22_KS_XOR_LC128_KEY_3_FLDMASK   0xffffffffL
 
#define HDCP22_KS_XOR_LC128_KEY_3_FLDMASK_POS   0
 
#define HDCP22_KS_XOR_LC128_KEY_3_FLDMASK_LEN   32
 
#define DP_TX_SECURE_REG4   (SEC_OFFSET + 0x10)
 
#define HDCP22_RIV_0_FLDMASK   0xffffffffL
 
#define HDCP22_RIV_0_FLDMASK_POS   0
 
#define HDCP22_RIV_0_FLDMASK_LEN   32
 
#define DP_TX_SECURE_REG5   (SEC_OFFSET + 0x14)
 
#define HDCP22_RIV_1_FLDMASK   0xffffffffL
 
#define HDCP22_RIV_1_FLDMASK_POS   0
 
#define HDCP22_RIV_1_FLDMASK_LEN   32
 
#define DP_TX_SECURE_REG6   (SEC_OFFSET + 0x18)
 
#define HDCP13_LN_SEED_FLDMASK   0xff
 
#define HDCP13_LN_SEED_FLDMASK_POS   0
 
#define HDCP13_LN_SEED_FLDMASK_LEN   8
 
#define DP_TX_SECURE_REG7   (SEC_OFFSET + 0x1C)
 
#define HDCP13_LN_CODE_0_FLDMASK   0xffffffffL
 
#define HDCP13_LN_CODE_0_FLDMASK_POS   0
 
#define HDCP13_LN_CODE_0_FLDMASK_LEN   32
 
#define DP_TX_SECURE_REG8   (SEC_OFFSET + 0x20)
 
#define HDCP13_LN_CODE_1_FLDMASK   0xffffff
 
#define HDCP13_LN_CODE_1_FLDMASK_POS   0
 
#define HDCP13_LN_CODE_1_FLDMASK_LEN   24
 
#define DP_TX_SECURE_REG9   (SEC_OFFSET + 0x24)
 
#define HDCP13_AN_CODE_0_FLDMASK   0xffffffffL
 
#define HDCP13_AN_CODE_0_FLDMASK_POS   0
 
#define HDCP13_AN_CODE_0_FLDMASK_LEN   32
 
#define DP_TX_SECURE_REG10   (SEC_OFFSET + 0x28)
 
#define HDCP13_AN_CODE_1_FLDMASK   0xffffffffL
 
#define HDCP13_AN_CODE_1_FLDMASK_POS   0
 
#define HDCP13_AN_CODE_1_FLDMASK_LEN   32
 
#define DP_TX_SECURE_REG11   (SEC_OFFSET + 0x2C)
 
#define DP_TX_TRANSMITTER_4P_RESET_SW_SECURE_FLDMASK   0x1
 
#define DP_TX_TRANSMITTER_4P_RESET_SW_SECURE_FLDMASK_POS   0
 
#define DP_TX_TRANSMITTER_4P_RESET_SW_SECURE_FLDMASK_LEN   1
 
#define HDCP22_RST_SW_SECURE_FLDMASK   0x2
 
#define HDCP22_RST_SW_SECURE_FLDMASK_POS   1
 
#define HDCP22_RST_SW_SECURE_FLDMASK_LEN   1
 
#define HDCP13_RST_SW_SECURE_FLDMASK   0x4
 
#define HDCP13_RST_SW_SECURE_FLDMASK_POS   2
 
#define HDCP13_RST_SW_SECURE_FLDMASK_LEN   1
 
#define VIDEO_MUTE_SW_SECURE_FLDMASK   0x8
 
#define VIDEO_MUTE_SW_SECURE_FLDMASK_POS   3
 
#define VIDEO_MUTE_SW_SECURE_FLDMASK_LEN   1
 
#define VIDEO_MUTE_SEL_SECURE_FLDMASK   0x10
 
#define VIDEO_MUTE_SEL_SECURE_FLDMASK_POS   4
 
#define VIDEO_MUTE_SEL_SECURE_FLDMASK_LEN   1
 
#define HDCP_FRAME_EN_SECURE_FLDMASK   0x20
 
#define HDCP_FRAME_EN_SECURE_FLDMASK_POS   5
 
#define HDCP_FRAME_EN_SECURE_FLDMASK_LEN   1
 
#define HDCP_FRAME_EN_SEL_SECURE_FLDMASK   0x40
 
#define HDCP_FRAME_EN_SEL_SECURE_FLDMASK_POS   6
 
#define HDCP_FRAME_EN_SEL_SECURE_FLDMASK_LEN   1
 
#define VSC_SEL_SECURE_FLDMASK   0x80
 
#define VSC_SEL_SECURE_FLDMASK_POS   7
 
#define VSC_SEL_SECURE_FLDMASK_LEN   1
 
#define VSC_DATA_TOGGLE_VESA_SECURE_FLDMASK   0x100
 
#define VSC_DATA_TOGGLE_VESA_SECURE_FLDMASK_POS   8
 
#define VSC_DATA_TOGGLE_VESA_SECURE_FLDMASK_LEN   1
 
#define VSC_DATA_RDY_VESA_SECURE_FLDMASK   0x200
 
#define VSC_DATA_RDY_VESA_SECURE_FLDMASK_POS   9
 
#define VSC_DATA_RDY_VESA_SECURE_FLDMASK_LEN   1
 
#define VSC_DATA_TOGGLE_CEA_SECURE_FLDMASK   0x400
 
#define VSC_DATA_TOGGLE_CEA_SECURE_FLDMASK_POS   10
 
#define VSC_DATA_TOGGLE_CEA_SECURE_FLDMASK_LEN   1
 
#define VSC_DATA_RDY_CEA_SECURE_FLDMASK   0x800
 
#define VSC_DATA_RDY_CEA_SECURE_FLDMASK_POS   11
 
#define VSC_DATA_RDY_CEA_SECURE_FLDMASK_LEN   1
 
#define DP_TX_SECURE_REG12   (SEC_OFFSET + 0x30)
 
#define VSC_DATA_BYTE7_CEA_SECURE_FLDMASK   0xff000000L
 
#define VSC_DATA_BYTE7_CEA_SECURE_FLDMASK_POS   24
 
#define VSC_DATA_BYTE7_CEA_SECURE_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE6_CEA_SECURE_FLDMASK   0xff0000
 
#define VSC_DATA_BYTE6_CEA_SECURE_FLDMASK_POS   16
 
#define VSC_DATA_BYTE6_CEA_SECURE_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE5_CEA_SECURE_FLDMASK   0xff00
 
#define VSC_DATA_BYTE5_CEA_SECURE_FLDMASK_POS   8
 
#define VSC_DATA_BYTE5_CEA_SECURE_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE4_CEA_SECURE_FLDMASK   0xff
 
#define VSC_DATA_BYTE4_CEA_SECURE_FLDMASK_POS   0
 
#define VSC_DATA_BYTE4_CEA_SECURE_FLDMASK_LEN   8
 
#define DP_TX_SECURE_REG13   (SEC_OFFSET + 0x34)
 
#define VSC_DATA_BYTE3_CEA_SECURE_FLDMASK   0xff000000L
 
#define VSC_DATA_BYTE3_CEA_SECURE_FLDMASK_POS   24
 
#define VSC_DATA_BYTE3_CEA_SECURE_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE2_CEA_SECURE_FLDMASK   0xff0000
 
#define VSC_DATA_BYTE2_CEA_SECURE_FLDMASK_POS   16
 
#define VSC_DATA_BYTE2_CEA_SECURE_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE1_CEA_SECURE_FLDMASK   0xff00
 
#define VSC_DATA_BYTE1_CEA_SECURE_FLDMASK_POS   8
 
#define VSC_DATA_BYTE1_CEA_SECURE_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE0_CEA_SECURE_FLDMASK   0xff
 
#define VSC_DATA_BYTE0_CEA_SECURE_FLDMASK_POS   0
 
#define VSC_DATA_BYTE0_CEA_SECURE_FLDMASK_LEN   8
 
#define DP_TX_SECURE_REG14   (SEC_OFFSET + 0x38)
 
#define VSC_DATA_BYTE7_VESA_SECURE_FLDMASK   0xff000000L
 
#define VSC_DATA_BYTE7_VESA_SECURE_FLDMASK_POS   24
 
#define VSC_DATA_BYTE7_VESA_SECURE_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE6_VESA_SECURE_FLDMASK   0xff0000
 
#define VSC_DATA_BYTE6_VESA_SECURE_FLDMASK_POS   16
 
#define VSC_DATA_BYTE6_VESA_SECURE_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE5_VESA_SECURE_FLDMASK   0xff00
 
#define VSC_DATA_BYTE5_VESA_SECURE_FLDMASK_POS   8
 
#define VSC_DATA_BYTE5_VESA_SECURE_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE4_VESA_SECURE_FLDMASK   0xff
 
#define VSC_DATA_BYTE4_VESA_SECURE_FLDMASK_POS   0
 
#define VSC_DATA_BYTE4_VESA_SECURE_FLDMASK_LEN   8
 
#define DP_TX_SECURE_REG15   (SEC_OFFSET + 0x3C)
 
#define VSC_DATA_BYTE3_VESA_SECURE_FLDMASK   0xff000000L
 
#define VSC_DATA_BYTE3_VESA_SECURE_FLDMASK_POS   24
 
#define VSC_DATA_BYTE3_VESA_SECURE_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE2_VESA_SECURE_FLDMASK   0xff0000
 
#define VSC_DATA_BYTE2_VESA_SECURE_FLDMASK_POS   16
 
#define VSC_DATA_BYTE2_VESA_SECURE_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE1_VESA_SECURE_FLDMASK   0xff00
 
#define VSC_DATA_BYTE1_VESA_SECURE_FLDMASK_POS   8
 
#define VSC_DATA_BYTE1_VESA_SECURE_FLDMASK_LEN   8
 
#define VSC_DATA_BYTE0_VESA_SECURE_FLDMASK   0xff
 
#define VSC_DATA_BYTE0_VESA_SECURE_FLDMASK_POS   0
 
#define VSC_DATA_BYTE0_VESA_SECURE_FLDMASK_LEN   8
 
#define DP_TX_SECURE_STATUS_0   (SEC_OFFSET + 0x80)
 
#define RGS_DP_TX_HDCP13_HDCP_AN_0_FLDMASK   0xffffffffL
 
#define RGS_DP_TX_HDCP13_HDCP_AN_0_FLDMASK_POS   0
 
#define RGS_DP_TX_HDCP13_HDCP_AN_0_FLDMASK_LEN   32
 
#define DP_TX_SECURE_STATUS_1   (SEC_OFFSET + 0x84)
 
#define RGS_DP_TX_HDCP13_HDCP_AN_1_FLDMASK   0xffffffffL
 
#define RGS_DP_TX_HDCP13_HDCP_AN_1_FLDMASK_POS   0
 
#define RGS_DP_TX_HDCP13_HDCP_AN_1_FLDMASK_LEN   32
 
#define DP_TX_SECURE_STATUS_2   (SEC_OFFSET + 0x88)
 
#define RGS_DP_TX_HDCP13_HDCP_R0_FLDMASK   0xffff
 
#define RGS_DP_TX_HDCP13_HDCP_R0_FLDMASK_POS   0
 
#define RGS_DP_TX_HDCP13_HDCP_R0_FLDMASK_LEN   16
 
#define DP_TX_SECURE_STATUS_3   (SEC_OFFSET + 0x8C)
 
#define RGS_DP_TX_HDCP13_HDCP_M0_0_FLDMASK   0xffffffffL
 
#define RGS_DP_TX_HDCP13_HDCP_M0_0_FLDMASK_POS   0
 
#define RGS_DP_TX_HDCP13_HDCP_M0_0_FLDMASK_LEN   32
 
#define DP_TX_SECURE_STATUS_4   (SEC_OFFSET + 0x90)
 
#define RGS_DP_TX_HDCP13_HDCP_M0_1_FLDMASK   0xffffffffL
 
#define RGS_DP_TX_HDCP13_HDCP_M0_1_FLDMASK_POS   0
 
#define RGS_DP_TX_HDCP13_HDCP_M0_1_FLDMASK_LEN   32
 
#define DP_TX_SECURE_ACC_FAIL   (SEC_OFFSET + 0xf0)
 
#define NO_AUTH_READ_VALUE_FLDMASK   0xffffffffL
 
#define NO_AUTH_READ_VALUE_FLDMASK_POS   0
 
#define NO_AUTH_READ_VALUE_FLDMASK_LEN   32
 
#define DPCD_00000   0x00000
 
#define DPCD_00001   0x00001
 
#define DPCD_00002   0x00002
 
#define DPCD_00003   0x00003
 
#define DPCD_00004   0x00004
 
#define DPCD_00005   0x00005
 
#define DPCD_0000A   0x0000A
 
#define DPCD_0000E   0x0000E
 
#define DPCD_00021   0x00021
 
#define DPCD_00030   0x00030
 
#define DPCD_00060   0x00060
 
#define DPCD_00080   0x00080
 
#define DPCD_00090   0x00090
 
#define DPCD_00100   0x00100
 
#define DPCD_00101   0x00101
 
#define DPCD_00102   0x00102
 
#define DPCD_00103   0x00103
 
#define DPCD_00104   0x00104
 
#define DPCD_00105   0x00105
 
#define DPCD_00106   0x00106
 
#define DPCD_00107   0x00107
 
#define DPCD_00111   0x00111
 
#define DPCD_00120   0x00120
 
#define DPCD_00160   0x00160
 
#define DPCD_001A1   0x001A1
 
#define DPCD_001C0   0x001C0
 
#define DPCD_00200   0x00200
 
#define DPCD_00201   0x00201
 
#define DPCD_00202   0x00202
 
#define DPCD_00203   0x00203
 
#define DPCD_00204   0x00204
 
#define DPCD_00205   0x00205
 
#define DPCD_00206   0x00206
 
#define DPCD_00210   0x00210
 
#define DPCD_00218   0x00218
 
#define DPCD_00219   0x00219
 
#define DPCD_00220   0x00220
 
#define DPCD_00230   0x00230
 
#define DPCD_00250   0x00250
 
#define DPCD_00260   0x00260
 
#define DPCD_00261   0x00261
 
#define DPCD_00271   0x00271
 
#define DPCD_00280   0x00280
 
#define DPCD_00281   0x00281
 
#define DPCD_00282   0x00282
 
#define DPCD_002C0   0x002C0
 
#define DPCD_00600   0x00600
 
#define DPCD_01000   0x01000
 
#define DPCD_01200   0x01200
 
#define DPCD_01400   0x01400
 
#define DPCD_01600   0x01600
 
#define DPCD_02002   0x02002
 
#define DPCD_02003   0x02003
 
#define DPCD_0200C   0x0200C
 
#define DPCD_0200D   0x0200D
 
#define DPCD_0200E   0x0200E
 
#define DPCD_0200F   0x0200F
 
#define DPCD_02200   0x02200
 
#define DPCD_02201   0x02201
 
#define DPCD_02202   0x02202
 
#define DPCD_02203   0x02203
 
#define DPCD_02204   0x02204
 
#define DPCD_02205   0x02205
 
#define DPCD_02206   0x02206
 
#define DPCD_02207   0x02207
 
#define DPCD_02208   0x02208
 
#define DPCD_02209   0x02209
 
#define DPCD_0220A   0x0220A
 
#define DPCD_0220B   0x0220B
 
#define DPCD_0220C   0x0220C
 
#define DPCD_0220D   0x0220D
 
#define DPCD_0220E   0x0220E
 
#define DPCD_0220F   0x0220F
 
#define DPCD_02210   0x02210
 
#define DPCD_02211   0x02211
 
#define DPCD_68000   0x68000
 
#define DPCD_68005   0x68005
 
#define DPCD_68007   0x68007
 
#define DPCD_6800C   0x6800C
 
#define DPCD_68014   0x68014
 
#define DPCD_68018   0x68018
 
#define DPCD_6801C   0x6801C
 
#define DPCD_68020   0x68020
 
#define DPCD_68024   0x68024
 
#define DPCD_68028   0x68028
 
#define DPCD_68029   0x68029
 
#define DPCD_6802A   0x6802A
 
#define DPCD_6802C   0x6802C
 
#define DPCD_6803B   0x6803B
 
#define DPCD_6921D   0x6921D
 
#define DPCD_69000   0x69000
 
#define DPCD_69008   0x69008
 
#define DPCD_6900B   0x6900B
 
#define DPCD_69215   0x69215
 
#define DPCD_6921D   0x6921D
 
#define DPCD_69220   0x69220
 
#define DPCD_692A0   0x692A0
 
#define DPCD_692B0   0x692B0
 
#define DPCD_692C0   0x692C0
 
#define DPCD_692E0   0x692E0
 
#define DPCD_692F0   0x692F0
 
#define DPCD_692F8   0x692F8
 
#define DPCD_69318   0x69318
 
#define DPCD_69328   0x69328
 
#define DPCD_69330   0x69330
 
#define DPCD_69332   0x69332
 
#define DPCD_69335   0x69335
 
#define DPCD_69345   0x69345
 
#define DPCD_693E0   0x693E0
 
#define DPCD_693F0   0x693F0
 
#define DPCD_693F3   0x693F3
 
#define DPCD_693F5   0x693F5
 
#define DPCD_69473   0x69473
 
#define DPCD_69493   0x69493
 
#define DPCD_69494   0x69494
 
#define DPCD_69518   0x69518
 

Macro Definition Documentation

◆ ACM_CFG_DP_ENCODER0_P0_FLDMASK

#define ACM_CFG_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 495 of file dptx_reg.h.

◆ ACM_CFG_DP_ENCODER0_P0_FLDMASK_LEN

#define ACM_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 497 of file dptx_reg.h.

◆ ACM_CFG_DP_ENCODER0_P0_FLDMASK_POS

#define ACM_CFG_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 496 of file dptx_reg.h.

◆ ACM_HB0_DP_ENCODER0_P0_FLDMASK

#define ACM_HB0_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 588 of file dptx_reg.h.

◆ ACM_HB0_DP_ENCODER0_P0_FLDMASK_LEN

#define ACM_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 590 of file dptx_reg.h.

◆ ACM_HB0_DP_ENCODER0_P0_FLDMASK_POS

#define ACM_HB0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 589 of file dptx_reg.h.

◆ ACM_HB1_DP_ENCODER0_P0_FLDMASK

#define ACM_HB1_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 592 of file dptx_reg.h.

◆ ACM_HB1_DP_ENCODER0_P0_FLDMASK_LEN

#define ACM_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 594 of file dptx_reg.h.

◆ ACM_HB1_DP_ENCODER0_P0_FLDMASK_POS

#define ACM_HB1_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 593 of file dptx_reg.h.

◆ ACM_HB2_DP_ENCODER0_P0_FLDMASK

#define ACM_HB2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 597 of file dptx_reg.h.

◆ ACM_HB2_DP_ENCODER0_P0_FLDMASK_LEN

#define ACM_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 599 of file dptx_reg.h.

◆ ACM_HB2_DP_ENCODER0_P0_FLDMASK_POS

#define ACM_HB2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 598 of file dptx_reg.h.

◆ ACM_HB3_DP_ENCODER0_P0_FLDMASK

#define ACM_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 601 of file dptx_reg.h.

◆ ACM_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define ACM_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 603 of file dptx_reg.h.

◆ ACM_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define ACM_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 602 of file dptx_reg.h.

◆ ADS_CFG_DP_ENCODER0_P0_FLDMASK

#define ADS_CFG_DP_ENCODER0_P0_FLDMASK   0x4

Definition at line 1155 of file dptx_reg.h.

◆ ADS_CFG_DP_ENCODER0_P0_FLDMASK_LEN

#define ADS_CFG_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1157 of file dptx_reg.h.

◆ ADS_CFG_DP_ENCODER0_P0_FLDMASK_POS

#define ADS_CFG_DP_ENCODER0_P0_FLDMASK_POS   2

Definition at line 1156 of file dptx_reg.h.

◆ ADS_HB0_DP_ENCODER0_P0_FLDMASK

#define ADS_HB0_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 1172 of file dptx_reg.h.

◆ ADS_HB0_DP_ENCODER0_P0_FLDMASK_LEN

#define ADS_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1174 of file dptx_reg.h.

◆ ADS_HB0_DP_ENCODER0_P0_FLDMASK_POS

#define ADS_HB0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 1173 of file dptx_reg.h.

◆ ADS_HB1_DP_ENCODER0_P0_FLDMASK

#define ADS_HB1_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 1176 of file dptx_reg.h.

◆ ADS_HB1_DP_ENCODER0_P0_FLDMASK_LEN

#define ADS_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1178 of file dptx_reg.h.

◆ ADS_HB1_DP_ENCODER0_P0_FLDMASK_POS

#define ADS_HB1_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 1177 of file dptx_reg.h.

◆ ADS_HB2_DP_ENCODER0_P0_FLDMASK

#define ADS_HB2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 1181 of file dptx_reg.h.

◆ ADS_HB2_DP_ENCODER0_P0_FLDMASK_LEN

#define ADS_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1183 of file dptx_reg.h.

◆ ADS_HB2_DP_ENCODER0_P0_FLDMASK_POS

#define ADS_HB2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 1182 of file dptx_reg.h.

◆ ADS_HB3_DP_ENCODER0_P0_FLDMASK

#define ADS_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 1185 of file dptx_reg.h.

◆ ADS_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define ADS_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1187 of file dptx_reg.h.

◆ ADS_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define ADS_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 1186 of file dptx_reg.h.

◆ ADS_MODE_DP_ENCODER0_P0_FLDMASK

#define ADS_MODE_DP_ENCODER0_P0_FLDMASK   0x8

Definition at line 1159 of file dptx_reg.h.

◆ ADS_MODE_DP_ENCODER0_P0_FLDMASK_LEN

#define ADS_MODE_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1161 of file dptx_reg.h.

◆ ADS_MODE_DP_ENCODER0_P0_FLDMASK_POS

#define ADS_MODE_DP_ENCODER0_P0_FLDMASK_POS   3

Definition at line 1160 of file dptx_reg.h.

◆ ALTER_SCRAMBLER_RESET_EN_DP_TRANS_P0_FLDMASK

#define ALTER_SCRAMBLER_RESET_EN_DP_TRANS_P0_FLDMASK   0x2

Definition at line 2330 of file dptx_reg.h.

◆ ALTER_SCRAMBLER_RESET_EN_DP_TRANS_P0_FLDMASK_LEN

#define ALTER_SCRAMBLER_RESET_EN_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2332 of file dptx_reg.h.

◆ ALTER_SCRAMBLER_RESET_EN_DP_TRANS_P0_FLDMASK_POS

#define ALTER_SCRAMBLER_RESET_EN_DP_TRANS_P0_FLDMASK_POS   1

Definition at line 2331 of file dptx_reg.h.

◆ AN_FREERUN_DP_TRANS_P0_FLDMASK

#define AN_FREERUN_DP_TRANS_P0_FLDMASK   0x8

Definition at line 2753 of file dptx_reg.h.

◆ AN_FREERUN_DP_TRANS_P0_FLDMASK_LEN

#define AN_FREERUN_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2755 of file dptx_reg.h.

◆ AN_FREERUN_DP_TRANS_P0_FLDMASK_POS

#define AN_FREERUN_DP_TRANS_P0_FLDMASK_POS   3

Definition at line 2754 of file dptx_reg.h.

◆ APB_WSTRB_EN_FLDMASK

#define APB_WSTRB_EN_FLDMASK   0x10

Definition at line 4223 of file dptx_reg.h.

◆ APB_WSTRB_EN_FLDMASK_LEN

#define APB_WSTRB_EN_FLDMASK_LEN   1

Definition at line 4225 of file dptx_reg.h.

◆ APB_WSTRB_EN_FLDMASK_POS

#define APB_WSTRB_EN_FLDMASK_POS   4

Definition at line 4224 of file dptx_reg.h.

◆ APB_WSTRB_FLDMASK

#define APB_WSTRB_FLDMASK   0xf

Definition at line 4219 of file dptx_reg.h.

◆ APB_WSTRB_FLDMASK_LEN

#define APB_WSTRB_FLDMASK_LEN   4

Definition at line 4221 of file dptx_reg.h.

◆ APB_WSTRB_FLDMASK_POS

#define APB_WSTRB_FLDMASK_POS   0

Definition at line 4220 of file dptx_reg.h.

◆ ASP_HB0_DP_ENCODER0_P0_FLDMASK

#define ASP_HB0_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 768 of file dptx_reg.h.

◆ ASP_HB0_DP_ENCODER0_P0_FLDMASK_LEN

#define ASP_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 770 of file dptx_reg.h.

◆ ASP_HB0_DP_ENCODER0_P0_FLDMASK_POS

#define ASP_HB0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 769 of file dptx_reg.h.

◆ ASP_HB1_DP_ENCODER0_P0_FLDMASK

#define ASP_HB1_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 772 of file dptx_reg.h.

◆ ASP_HB1_DP_ENCODER0_P0_FLDMASK_LEN

#define ASP_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 774 of file dptx_reg.h.

◆ ASP_HB1_DP_ENCODER0_P0_FLDMASK_POS

#define ASP_HB1_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 773 of file dptx_reg.h.

◆ ASP_HB23_SEL_DP_ENCODER0_P0_FLDMASK

#define ASP_HB23_SEL_DP_ENCODER0_P0_FLDMASK   0x8000

Definition at line 545 of file dptx_reg.h.

◆ ASP_HB23_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define ASP_HB23_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 547 of file dptx_reg.h.

◆ ASP_HB23_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define ASP_HB23_SEL_DP_ENCODER0_P0_FLDMASK_POS   15

Definition at line 546 of file dptx_reg.h.

◆ ASP_HB2_DP_ENCODER0_P0_FLDMASK

#define ASP_HB2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 777 of file dptx_reg.h.

◆ ASP_HB2_DP_ENCODER0_P0_FLDMASK_LEN

#define ASP_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 779 of file dptx_reg.h.

◆ ASP_HB2_DP_ENCODER0_P0_FLDMASK_POS

#define ASP_HB2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 778 of file dptx_reg.h.

◆ ASP_HB3_DP_ENCODER0_P0_FLDMASK

#define ASP_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 781 of file dptx_reg.h.

◆ ASP_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define ASP_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 783 of file dptx_reg.h.

◆ ASP_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define ASP_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 782 of file dptx_reg.h.

◆ ASP_MIN_PL_SIZE_DP_ENCODER0_P0_FLDMASK

#define ASP_MIN_PL_SIZE_DP_ENCODER0_P0_FLDMASK   0x60

Definition at line 533 of file dptx_reg.h.

◆ ASP_MIN_PL_SIZE_DP_ENCODER0_P0_FLDMASK_LEN

#define ASP_MIN_PL_SIZE_DP_ENCODER0_P0_FLDMASK_LEN   2

Definition at line 535 of file dptx_reg.h.

◆ ASP_MIN_PL_SIZE_DP_ENCODER0_P0_FLDMASK_POS

#define ASP_MIN_PL_SIZE_DP_ENCODER0_P0_FLDMASK_POS   5

Definition at line 534 of file dptx_reg.h.

◆ AU_CH_STS_REGEN_DP_ENCODER1_P0_FLDMASK

#define AU_CH_STS_REGEN_DP_ENCODER1_P0_FLDMASK   0x200

Definition at line 1815 of file dptx_reg.h.

◆ AU_CH_STS_REGEN_DP_ENCODER1_P0_FLDMASK_LEN

#define AU_CH_STS_REGEN_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1817 of file dptx_reg.h.

◆ AU_CH_STS_REGEN_DP_ENCODER1_P0_FLDMASK_POS

#define AU_CH_STS_REGEN_DP_ENCODER1_P0_FLDMASK_POS   9

Definition at line 1816 of file dptx_reg.h.

◆ AU_EN_DP_ENCODER0_P0_FLDMASK

#define AU_EN_DP_ENCODER0_P0_FLDMASK   0x40

Definition at line 388 of file dptx_reg.h.

◆ AU_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define AU_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 390 of file dptx_reg.h.

◆ AU_EN_DP_ENCODER0_P0_FLDMASK_POS

#define AU_EN_DP_ENCODER0_P0_FLDMASK_POS   6

Definition at line 389 of file dptx_reg.h.

◆ AU_GEN_EN_DP_ENCODER0_P0_FLDMASK

#define AU_GEN_EN_DP_ENCODER0_P0_FLDMASK   0x200

Definition at line 400 of file dptx_reg.h.

◆ AU_GEN_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define AU_GEN_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 402 of file dptx_reg.h.

◆ AU_GEN_EN_DP_ENCODER0_P0_FLDMASK_POS

#define AU_GEN_EN_DP_ENCODER0_P0_FLDMASK_POS   9

Definition at line 401 of file dptx_reg.h.

◆ AU_PRTY_REGEN_DP_ENCODER1_P0_FLDMASK

#define AU_PRTY_REGEN_DP_ENCODER1_P0_FLDMASK   0x100

Definition at line 1811 of file dptx_reg.h.

◆ AU_PRTY_REGEN_DP_ENCODER1_P0_FLDMASK_LEN

#define AU_PRTY_REGEN_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1813 of file dptx_reg.h.

◆ AU_PRTY_REGEN_DP_ENCODER1_P0_FLDMASK_POS

#define AU_PRTY_REGEN_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1812 of file dptx_reg.h.

◆ AU_TS_CFG_DP_ENCODER0_P0_FLDMASK

#define AU_TS_CFG_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 459 of file dptx_reg.h.

◆ AU_TS_CFG_DP_ENCODER0_P0_FLDMASK_LEN

#define AU_TS_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 461 of file dptx_reg.h.

◆ AU_TS_CFG_DP_ENCODER0_P0_FLDMASK_POS

#define AU_TS_CFG_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 460 of file dptx_reg.h.

◆ AU_TS_HB0_DP_ENCODER0_P0_FLDMASK

#define AU_TS_HB0_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 550 of file dptx_reg.h.

◆ AU_TS_HB0_DP_ENCODER0_P0_FLDMASK_LEN

#define AU_TS_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 552 of file dptx_reg.h.

◆ AU_TS_HB0_DP_ENCODER0_P0_FLDMASK_POS

#define AU_TS_HB0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 551 of file dptx_reg.h.

◆ AU_TS_HB1_DP_ENCODER0_P0_FLDMASK

#define AU_TS_HB1_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 554 of file dptx_reg.h.

◆ AU_TS_HB1_DP_ENCODER0_P0_FLDMASK_LEN

#define AU_TS_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 556 of file dptx_reg.h.

◆ AU_TS_HB1_DP_ENCODER0_P0_FLDMASK_POS

#define AU_TS_HB1_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 555 of file dptx_reg.h.

◆ AU_TS_HB2_DP_ENCODER0_P0_FLDMASK

#define AU_TS_HB2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 559 of file dptx_reg.h.

◆ AU_TS_HB2_DP_ENCODER0_P0_FLDMASK_LEN

#define AU_TS_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 561 of file dptx_reg.h.

◆ AU_TS_HB2_DP_ENCODER0_P0_FLDMASK_POS

#define AU_TS_HB2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 560 of file dptx_reg.h.

◆ AU_TS_HB3_DP_ENCODER0_P0_FLDMASK

#define AU_TS_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 563 of file dptx_reg.h.

◆ AU_TS_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define AU_TS_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 565 of file dptx_reg.h.

◆ AU_TS_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define AU_TS_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 564 of file dptx_reg.h.

◆ AUDIO_16CH_EN_DP_ENCODER0_P0_FLDMASK

#define AUDIO_16CH_EN_DP_ENCODER0_P0_FLDMASK   0x4000

Definition at line 298 of file dptx_reg.h.

◆ AUDIO_16CH_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_16CH_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 300 of file dptx_reg.h.

◆ AUDIO_16CH_EN_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_16CH_EN_DP_ENCODER0_P0_FLDMASK_POS   14

Definition at line 299 of file dptx_reg.h.

◆ AUDIO_16CH_SEL_DP_ENCODER0_P0_FLDMASK

#define AUDIO_16CH_SEL_DP_ENCODER0_P0_FLDMASK   0x8000

Definition at line 302 of file dptx_reg.h.

◆ AUDIO_16CH_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_16CH_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 304 of file dptx_reg.h.

◆ AUDIO_16CH_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_16CH_SEL_DP_ENCODER0_P0_FLDMASK_POS   15

Definition at line 303 of file dptx_reg.h.

◆ AUDIO_2CH_EN_DP_ENCODER0_P0_FLDMASK

#define AUDIO_2CH_EN_DP_ENCODER0_P0_FLDMASK   0x4000

Definition at line 412 of file dptx_reg.h.

◆ AUDIO_2CH_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_2CH_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 414 of file dptx_reg.h.

◆ AUDIO_2CH_EN_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_2CH_EN_DP_ENCODER0_P0_FLDMASK_POS   14

Definition at line 413 of file dptx_reg.h.

◆ AUDIO_2CH_SEL_DP_ENCODER0_P0_FLDMASK

#define AUDIO_2CH_SEL_DP_ENCODER0_P0_FLDMASK   0x8000

Definition at line 416 of file dptx_reg.h.

◆ AUDIO_2CH_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_2CH_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 418 of file dptx_reg.h.

◆ AUDIO_2CH_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_2CH_SEL_DP_ENCODER0_P0_FLDMASK_POS   15

Definition at line 417 of file dptx_reg.h.

◆ AUDIO_32CH_EN_DP_ENCODER0_P0_FLDMASK

#define AUDIO_32CH_EN_DP_ENCODER0_P0_FLDMASK   0x1000

Definition at line 290 of file dptx_reg.h.

◆ AUDIO_32CH_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_32CH_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 292 of file dptx_reg.h.

◆ AUDIO_32CH_EN_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_32CH_EN_DP_ENCODER0_P0_FLDMASK_POS   12

Definition at line 291 of file dptx_reg.h.

◆ AUDIO_32CH_SEL_DP_ENCODER0_P0_FLDMASK

#define AUDIO_32CH_SEL_DP_ENCODER0_P0_FLDMASK   0x2000

Definition at line 294 of file dptx_reg.h.

◆ AUDIO_32CH_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_32CH_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 296 of file dptx_reg.h.

◆ AUDIO_32CH_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_32CH_SEL_DP_ENCODER0_P0_FLDMASK_POS   13

Definition at line 295 of file dptx_reg.h.

◆ AUDIO_8CH_EN_DP_ENCODER0_P0_FLDMASK

#define AUDIO_8CH_EN_DP_ENCODER0_P0_FLDMASK   0x80

Definition at line 392 of file dptx_reg.h.

◆ AUDIO_8CH_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_8CH_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 394 of file dptx_reg.h.

◆ AUDIO_8CH_EN_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_8CH_EN_DP_ENCODER0_P0_FLDMASK_POS   7

Definition at line 393 of file dptx_reg.h.

◆ AUDIO_8CH_SEL_DP_ENCODER0_P0_FLDMASK

#define AUDIO_8CH_SEL_DP_ENCODER0_P0_FLDMASK   0x100

Definition at line 396 of file dptx_reg.h.

◆ AUDIO_8CH_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_8CH_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 398 of file dptx_reg.h.

◆ AUDIO_8CH_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_8CH_SEL_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 397 of file dptx_reg.h.

◆ AUDIO_AFIFO_CNT_DP_ENCODER1_P0_FLDMASK

#define AUDIO_AFIFO_CNT_DP_ENCODER1_P0_FLDMASK   0xf0

Definition at line 1798 of file dptx_reg.h.

◆ AUDIO_AFIFO_CNT_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_AFIFO_CNT_DP_ENCODER1_P0_FLDMASK_LEN   4

Definition at line 1800 of file dptx_reg.h.

◆ AUDIO_AFIFO_CNT_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_AFIFO_CNT_DP_ENCODER1_P0_FLDMASK_POS   4

Definition at line 1799 of file dptx_reg.h.

◆ AUDIO_AFIFO_CNT_SEL_DP_ENCODER1_P0_FLDMASK

#define AUDIO_AFIFO_CNT_SEL_DP_ENCODER1_P0_FLDMASK   0x1

Definition at line 1790 of file dptx_reg.h.

◆ AUDIO_AFIFO_CNT_SEL_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_AFIFO_CNT_SEL_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1792 of file dptx_reg.h.

◆ AUDIO_AFIFO_CNT_SEL_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_AFIFO_CNT_SEL_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1791 of file dptx_reg.h.

◆ AUDIO_CH_SRC_SEL_DP_ENCODER0_P0_FLDMASK

#define AUDIO_CH_SRC_SEL_DP_ENCODER0_P0_FLDMASK   0x10

Definition at line 1163 of file dptx_reg.h.

◆ AUDIO_CH_SRC_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_CH_SRC_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1165 of file dptx_reg.h.

◆ AUDIO_CH_SRC_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_CH_SRC_SEL_DP_ENCODER0_P0_FLDMASK_POS   4

Definition at line 1164 of file dptx_reg.h.

◆ AUDIO_DETECT_EN_DP_ENCODER0_P0_FLDMASK

#define AUDIO_DETECT_EN_DP_ENCODER0_P0_FLDMASK   0x20

Definition at line 384 of file dptx_reg.h.

◆ AUDIO_DETECT_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_DETECT_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 386 of file dptx_reg.h.

◆ AUDIO_DETECT_EN_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_DETECT_EN_DP_ENCODER0_P0_FLDMASK_POS   5

Definition at line 385 of file dptx_reg.h.

◆ AUDIO_HAYDN_EN_FORCE_DP_ENCODER1_P0_FLDMASK

#define AUDIO_HAYDN_EN_FORCE_DP_ENCODER1_P0_FLDMASK   0x1000

Definition at line 1980 of file dptx_reg.h.

◆ AUDIO_HAYDN_EN_FORCE_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_HAYDN_EN_FORCE_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1982 of file dptx_reg.h.

◆ AUDIO_HAYDN_EN_FORCE_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_HAYDN_EN_FORCE_DP_ENCODER1_P0_FLDMASK_POS   12

Definition at line 1981 of file dptx_reg.h.

◆ AUDIO_HAYDN_FORMAT_DP_ENCODER1_P0_FLDMASK

#define AUDIO_HAYDN_FORMAT_DP_ENCODER1_P0_FLDMASK   0xf00

Definition at line 1984 of file dptx_reg.h.

◆ AUDIO_HAYDN_FORMAT_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_HAYDN_FORMAT_DP_ENCODER1_P0_FLDMASK_LEN   4

Definition at line 1986 of file dptx_reg.h.

◆ AUDIO_HAYDN_FORMAT_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_HAYDN_FORMAT_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1985 of file dptx_reg.h.

◆ AUDIO_M_CODE_MULT_DIV_SEL_DP_ENCODER0_P0_FLDMASK

#define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENCODER0_P0_FLDMASK   0x700

Definition at line 537 of file dptx_reg.h.

◆ AUDIO_M_CODE_MULT_DIV_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENCODER0_P0_FLDMASK_LEN   3

Definition at line 539 of file dptx_reg.h.

◆ AUDIO_M_CODE_MULT_DIV_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 538 of file dptx_reg.h.

◆ AUDIO_M_CODE_READ_0_DP_ENCODER1_P0_FLDMASK

#define AUDIO_M_CODE_READ_0_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 2129 of file dptx_reg.h.

◆ AUDIO_M_CODE_READ_0_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_M_CODE_READ_0_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 2131 of file dptx_reg.h.

◆ AUDIO_M_CODE_READ_0_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_M_CODE_READ_0_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2130 of file dptx_reg.h.

◆ AUDIO_M_CODE_READ_1_DP_ENCODER1_P0_FLDMASK

#define AUDIO_M_CODE_READ_1_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 2134 of file dptx_reg.h.

◆ AUDIO_M_CODE_READ_1_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_M_CODE_READ_1_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 2136 of file dptx_reg.h.

◆ AUDIO_M_CODE_READ_1_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_M_CODE_READ_1_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2135 of file dptx_reg.h.

◆ AUDIO_M_CODE_SEL_DP_ENCODER0_P0_FLDMASK

#define AUDIO_M_CODE_SEL_DP_ENCODER0_P0_FLDMASK   0x4000

Definition at line 541 of file dptx_reg.h.

◆ AUDIO_M_CODE_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_M_CODE_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 543 of file dptx_reg.h.

◆ AUDIO_M_CODE_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_M_CODE_SEL_DP_ENCODER0_P0_FLDMASK_POS   14

Definition at line 542 of file dptx_reg.h.

◆ AUDIO_M_CODE_SW_0_DP_ENCODER0_P0_FLDMASK

#define AUDIO_M_CODE_SW_0_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 568 of file dptx_reg.h.

◆ AUDIO_M_CODE_SW_0_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_M_CODE_SW_0_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 570 of file dptx_reg.h.

◆ AUDIO_M_CODE_SW_0_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_M_CODE_SW_0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 569 of file dptx_reg.h.

◆ AUDIO_M_CODE_SW_1_DP_ENCODER0_P0_FLDMASK

#define AUDIO_M_CODE_SW_1_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 573 of file dptx_reg.h.

◆ AUDIO_M_CODE_SW_1_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_M_CODE_SW_1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 575 of file dptx_reg.h.

◆ AUDIO_M_CODE_SW_1_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_M_CODE_SW_1_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 574 of file dptx_reg.h.

◆ AUDIO_MN_GEN_EN_DP_ENCODER0_P0_FLDMASK

#define AUDIO_MN_GEN_EN_DP_ENCODER0_P0_FLDMASK   0x1000

Definition at line 404 of file dptx_reg.h.

◆ AUDIO_MN_GEN_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_MN_GEN_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 406 of file dptx_reg.h.

◆ AUDIO_MN_GEN_EN_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_MN_GEN_EN_DP_ENCODER0_P0_FLDMASK_POS   12

Definition at line 405 of file dptx_reg.h.

◆ AUDIO_N_CODE_0_DP_ENCODER0_P0_FLDMASK

#define AUDIO_N_CODE_0_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 578 of file dptx_reg.h.

◆ AUDIO_N_CODE_0_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_N_CODE_0_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 580 of file dptx_reg.h.

◆ AUDIO_N_CODE_0_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_N_CODE_0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 579 of file dptx_reg.h.

◆ AUDIO_N_CODE_1_DP_ENCODER0_P0_FLDMASK

#define AUDIO_N_CODE_1_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 583 of file dptx_reg.h.

◆ AUDIO_N_CODE_1_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_N_CODE_1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 585 of file dptx_reg.h.

◆ AUDIO_N_CODE_1_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_N_CODE_1_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 584 of file dptx_reg.h.

◆ AUDIO_N_CODE_MN_GEN_0_DP_ENCODER0_P0_FLDMASK

#define AUDIO_N_CODE_MN_GEN_0_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 352 of file dptx_reg.h.

◆ AUDIO_N_CODE_MN_GEN_0_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_N_CODE_MN_GEN_0_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 354 of file dptx_reg.h.

◆ AUDIO_N_CODE_MN_GEN_0_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_N_CODE_MN_GEN_0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 353 of file dptx_reg.h.

◆ AUDIO_N_CODE_MN_GEN_1_DP_ENCODER0_P0_FLDMASK

#define AUDIO_N_CODE_MN_GEN_1_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 357 of file dptx_reg.h.

◆ AUDIO_N_CODE_MN_GEN_1_DP_ENCODER0_P0_FLDMASK_LEN

#define AUDIO_N_CODE_MN_GEN_1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 359 of file dptx_reg.h.

◆ AUDIO_N_CODE_MN_GEN_1_DP_ENCODER0_P0_FLDMASK_POS

#define AUDIO_N_CODE_MN_GEN_1_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 358 of file dptx_reg.h.

◆ AUDIO_PATGEN_CH_NUM_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_PATGEN_CH_NUM_DP_ENCODER1_P0_FLDMASK_POS   12

Definition at line 1842 of file dptx_reg.h.

◆ AUDIO_PATGEN_FS_SEL_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_PATGEN_FS_SEL_DP_ENCODER1_P0_FLDMASK_POS   14

Definition at line 1846 of file dptx_reg.h.

◆ AUDIO_PATTERN_GEN_CH_NUM_DP_ENCODER1_P0_FLDMASK

#define AUDIO_PATTERN_GEN_CH_NUM_DP_ENCODER1_P0_FLDMASK   0x3000

Definition at line 1841 of file dptx_reg.h.

◆ AUDIO_PATTERN_GEN_CH_NUM_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_PATTERN_GEN_CH_NUM_DP_ENCODER1_P0_FLDMASK_LEN   2

Definition at line 1843 of file dptx_reg.h.

◆ AUDIO_PATTERN_GEN_DSTB_CNT_THRD_DP_ENCODER1_P0_FLDMASK

#define AUDIO_PATTERN_GEN_DSTB_CNT_THRD_DP_ENCODER1_P0_FLDMASK   0x1ff

Definition at line 1832 of file dptx_reg.h.

◆ AUDIO_PATTERN_GEN_DSTB_CNT_THRD_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_PATTERN_GEN_DSTB_CNT_THRD_DP_ENCODER1_P0_FLDMASK_LEN   9

Definition at line 1834 of file dptx_reg.h.

◆ AUDIO_PATTERN_GEN_DSTB_CNT_THRD_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_PATTERN_GEN_DSTB_CNT_THRD_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1833 of file dptx_reg.h.

◆ AUDIO_PATTERN_GEN_FS_SEL_DP_ENCODER1_P0_FLDMASK

#define AUDIO_PATTERN_GEN_FS_SEL_DP_ENCODER1_P0_FLDMASK   0xc000

Definition at line 1845 of file dptx_reg.h.

◆ AUDIO_PATTERN_GEN_FS_SEL_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_PATTERN_GEN_FS_SEL_DP_ENCODER1_P0_FLDMASK_LEN   2

Definition at line 1847 of file dptx_reg.h.

◆ AUDIO_RESERVED_REGEN_DP_ENCODER1_P0_FLDMASK

#define AUDIO_RESERVED_REGEN_DP_ENCODER1_P0_FLDMASK   0x800

Definition at line 1823 of file dptx_reg.h.

◆ AUDIO_RESERVED_REGEN_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_RESERVED_REGEN_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1825 of file dptx_reg.h.

◆ AUDIO_RESERVED_REGEN_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_RESERVED_REGEN_DP_ENCODER1_P0_FLDMASK_POS   11

Definition at line 1824 of file dptx_reg.h.

◆ AUDIO_SAMPLE_PRSENT_REGEN_DP_ENCODER1_P0_FLDMASK

#define AUDIO_SAMPLE_PRSENT_REGEN_DP_ENCODER1_P0_FLDMASK   0x1000

Definition at line 1827 of file dptx_reg.h.

◆ AUDIO_SAMPLE_PRSENT_REGEN_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_SAMPLE_PRSENT_REGEN_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1829 of file dptx_reg.h.

◆ AUDIO_SAMPLE_PRSENT_REGEN_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_SAMPLE_PRSENT_REGEN_DP_ENCODER1_P0_FLDMASK_POS   12

Definition at line 1828 of file dptx_reg.h.

◆ AUDIO_SOURCE_MUX_DP_ENCODER1_P0_FLDMASK

#define AUDIO_SOURCE_MUX_DP_ENCODER1_P0_FLDMASK   0x300

Definition at line 1837 of file dptx_reg.h.

◆ AUDIO_SOURCE_MUX_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_SOURCE_MUX_DP_ENCODER1_P0_FLDMASK_LEN   2

Definition at line 1839 of file dptx_reg.h.

◆ AUDIO_SOURCE_MUX_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_SOURCE_MUX_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1838 of file dptx_reg.h.

◆ AUDIO_SRAM_CNT_DP_ENCODER1_P0_FLDMASK

#define AUDIO_SRAM_CNT_DP_ENCODER1_P0_FLDMASK   0x7f

Definition at line 1807 of file dptx_reg.h.

◆ AUDIO_SRAM_CNT_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_SRAM_CNT_DP_ENCODER1_P0_FLDMASK_LEN   7

Definition at line 1809 of file dptx_reg.h.

◆ AUDIO_SRAM_CNT_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_SRAM_CNT_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1808 of file dptx_reg.h.

◆ AUDIO_SRAM_CNT_SEL_DP_ENCODER1_P0_FLDMASK

#define AUDIO_SRAM_CNT_SEL_DP_ENCODER1_P0_FLDMASK   0x2

Definition at line 1794 of file dptx_reg.h.

◆ AUDIO_SRAM_CNT_SEL_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_SRAM_CNT_SEL_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1796 of file dptx_reg.h.

◆ AUDIO_SRAM_CNT_SEL_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_SRAM_CNT_SEL_DP_ENCODER1_P0_FLDMASK_POS   1

Definition at line 1795 of file dptx_reg.h.

◆ AUDIO_SRAM_EMPTY_DP_ENCODER1_P0_FLDMASK

#define AUDIO_SRAM_EMPTY_DP_ENCODER1_P0_FLDMASK   0x2000

Definition at line 2260 of file dptx_reg.h.

◆ AUDIO_SRAM_EMPTY_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_SRAM_EMPTY_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2262 of file dptx_reg.h.

◆ AUDIO_SRAM_EMPTY_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_SRAM_EMPTY_DP_ENCODER1_P0_FLDMASK_POS   13

Definition at line 2261 of file dptx_reg.h.

◆ AUDIO_SRAM_FULL_CLR_DP_ENCODER1_P0_FLDMASK

#define AUDIO_SRAM_FULL_CLR_DP_ENCODER1_P0_FLDMASK   0x1000

Definition at line 2256 of file dptx_reg.h.

◆ AUDIO_SRAM_FULL_CLR_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_SRAM_FULL_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2258 of file dptx_reg.h.

◆ AUDIO_SRAM_FULL_CLR_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_SRAM_FULL_CLR_DP_ENCODER1_P0_FLDMASK_POS   12

Definition at line 2257 of file dptx_reg.h.

◆ AUDIO_SRAM_FULL_DP_ENCODER1_P0_FLDMASK

#define AUDIO_SRAM_FULL_DP_ENCODER1_P0_FLDMASK   0x800

Definition at line 2252 of file dptx_reg.h.

◆ AUDIO_SRAM_FULL_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_SRAM_FULL_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2254 of file dptx_reg.h.

◆ AUDIO_SRAM_FULL_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_SRAM_FULL_DP_ENCODER1_P0_FLDMASK_POS   11

Definition at line 2253 of file dptx_reg.h.

◆ AUDIO_SRAM_WRITE_ADDR_0_DP_ENCODER1_P0_FLDMASK

#define AUDIO_SRAM_WRITE_ADDR_0_DP_ENCODER1_P0_FLDMASK   0x7f

Definition at line 1741 of file dptx_reg.h.

◆ AUDIO_SRAM_WRITE_ADDR_0_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_SRAM_WRITE_ADDR_0_DP_ENCODER1_P0_FLDMASK_LEN   7

Definition at line 1743 of file dptx_reg.h.

◆ AUDIO_SRAM_WRITE_ADDR_0_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_SRAM_WRITE_ADDR_0_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1742 of file dptx_reg.h.

◆ AUDIO_SRAM_WRITE_ADDR_1_DP_ENCODER1_P0_FLDMASK

#define AUDIO_SRAM_WRITE_ADDR_1_DP_ENCODER1_P0_FLDMASK   0x7f00

Definition at line 1745 of file dptx_reg.h.

◆ AUDIO_SRAM_WRITE_ADDR_1_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_SRAM_WRITE_ADDR_1_DP_ENCODER1_P0_FLDMASK_LEN   7

Definition at line 1747 of file dptx_reg.h.

◆ AUDIO_SRAM_WRITE_ADDR_1_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_SRAM_WRITE_ADDR_1_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1746 of file dptx_reg.h.

◆ AUDIO_SRAM_WRITE_ADDR_2_DP_ENCODER1_P0_FLDMASK

#define AUDIO_SRAM_WRITE_ADDR_2_DP_ENCODER1_P0_FLDMASK   0x7f

Definition at line 1750 of file dptx_reg.h.

◆ AUDIO_SRAM_WRITE_ADDR_2_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_SRAM_WRITE_ADDR_2_DP_ENCODER1_P0_FLDMASK_LEN   7

Definition at line 1752 of file dptx_reg.h.

◆ AUDIO_SRAM_WRITE_ADDR_2_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_SRAM_WRITE_ADDR_2_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1751 of file dptx_reg.h.

◆ AUDIO_SRAM_WRITE_ADDR_3_DP_ENCODER1_P0_FLDMASK

#define AUDIO_SRAM_WRITE_ADDR_3_DP_ENCODER1_P0_FLDMASK   0x7f00

Definition at line 1754 of file dptx_reg.h.

◆ AUDIO_SRAM_WRITE_ADDR_3_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_SRAM_WRITE_ADDR_3_DP_ENCODER1_P0_FLDMASK_LEN   7

Definition at line 1756 of file dptx_reg.h.

◆ AUDIO_SRAM_WRITE_ADDR_3_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_SRAM_WRITE_ADDR_3_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1755 of file dptx_reg.h.

◆ AUDIO_VALIDITY_REGEN_DP_ENCODER1_P0_FLDMASK

#define AUDIO_VALIDITY_REGEN_DP_ENCODER1_P0_FLDMASK   0x400

Definition at line 1819 of file dptx_reg.h.

◆ AUDIO_VALIDITY_REGEN_DP_ENCODER1_P0_FLDMASK_LEN

#define AUDIO_VALIDITY_REGEN_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1821 of file dptx_reg.h.

◆ AUDIO_VALIDITY_REGEN_DP_ENCODER1_P0_FLDMASK_POS

#define AUDIO_VALIDITY_REGEN_DP_ENCODER1_P0_FLDMASK_POS   10

Definition at line 1820 of file dptx_reg.h.

◆ AUI_CFG_DP_ENCODER0_P0_FLDMASK

#define AUI_CFG_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 468 of file dptx_reg.h.

◆ AUI_CFG_DP_ENCODER0_P0_FLDMASK_LEN

#define AUI_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 470 of file dptx_reg.h.

◆ AUI_CFG_DP_ENCODER0_P0_FLDMASK_POS

#define AUI_CFG_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 469 of file dptx_reg.h.

◆ AUI_HB0_DP_ENCODER0_P0_FLDMASK

#define AUI_HB0_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 642 of file dptx_reg.h.

◆ AUI_HB0_DP_ENCODER0_P0_FLDMASK_LEN

#define AUI_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 644 of file dptx_reg.h.

◆ AUI_HB0_DP_ENCODER0_P0_FLDMASK_POS

#define AUI_HB0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 643 of file dptx_reg.h.

◆ AUI_HB1_DP_ENCODER0_P0_FLDMASK

#define AUI_HB1_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 646 of file dptx_reg.h.

◆ AUI_HB1_DP_ENCODER0_P0_FLDMASK_LEN

#define AUI_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 648 of file dptx_reg.h.

◆ AUI_HB1_DP_ENCODER0_P0_FLDMASK_POS

#define AUI_HB1_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 647 of file dptx_reg.h.

◆ AUI_HB2_DP_ENCODER0_P0_FLDMASK

#define AUI_HB2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 651 of file dptx_reg.h.

◆ AUI_HB2_DP_ENCODER0_P0_FLDMASK_LEN

#define AUI_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 653 of file dptx_reg.h.

◆ AUI_HB2_DP_ENCODER0_P0_FLDMASK_POS

#define AUI_HB2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 652 of file dptx_reg.h.

◆ AUI_HB3_DP_ENCODER0_P0_FLDMASK

#define AUI_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 655 of file dptx_reg.h.

◆ AUI_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define AUI_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 657 of file dptx_reg.h.

◆ AUI_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define AUI_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 656 of file dptx_reg.h.

◆ AUX_400US_TIMEOUT_IRQ_AUX_TX_P0_FLDMASK

#define AUX_400US_TIMEOUT_IRQ_AUX_TX_P0_FLDMASK   0x1

Definition at line 3469 of file dptx_reg.h.

◆ AUX_400US_TIMEOUT_IRQ_AUX_TX_P0_FLDMASK_LEN

#define AUX_400US_TIMEOUT_IRQ_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3471 of file dptx_reg.h.

◆ AUX_400US_TIMEOUT_IRQ_AUX_TX_P0_FLDMASK_POS

#define AUX_400US_TIMEOUT_IRQ_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3470 of file dptx_reg.h.

◆ AUX_AUX_REPLY_MCU_AUX_TX_P0_FLDMASK

#define AUX_AUX_REPLY_MCU_AUX_TX_P0_FLDMASK   0x4000

Definition at line 3280 of file dptx_reg.h.

◆ AUX_AUX_REPLY_MCU_AUX_TX_P0_FLDMASK_LEN

#define AUX_AUX_REPLY_MCU_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3282 of file dptx_reg.h.

◆ AUX_AUX_REPLY_MCU_AUX_TX_P0_FLDMASK_POS

#define AUX_AUX_REPLY_MCU_AUX_TX_P0_FLDMASK_POS   14

Definition at line 3281 of file dptx_reg.h.

◆ AUX_CLK_EN_AUX_TX_P0_FLDMASK

#define AUX_CLK_EN_AUX_TX_P0_FLDMASK   0x100

Definition at line 3237 of file dptx_reg.h.

◆ AUX_CLK_EN_AUX_TX_P0_FLDMASK_LEN

#define AUX_CLK_EN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3239 of file dptx_reg.h.

◆ AUX_CLK_EN_AUX_TX_P0_FLDMASK_POS

#define AUX_CLK_EN_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3238 of file dptx_reg.h.

◆ AUX_CLK_INV_AUX_TX_P0_FLDMASK

#define AUX_CLK_INV_AUX_TX_P0_FLDMASK   0x200

Definition at line 3241 of file dptx_reg.h.

◆ AUX_CLK_INV_AUX_TX_P0_FLDMASK_LEN

#define AUX_CLK_INV_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3243 of file dptx_reg.h.

◆ AUX_CLK_INV_AUX_TX_P0_FLDMASK_POS

#define AUX_CLK_INV_AUX_TX_P0_FLDMASK_POS   9

Definition at line 3242 of file dptx_reg.h.

◆ AUX_CLK_SEL_AUX_TX_P0_FLDMASK

#define AUX_CLK_SEL_AUX_TX_P0_FLDMASK   0xc00

Definition at line 3245 of file dptx_reg.h.

◆ AUX_CLK_SEL_AUX_TX_P0_FLDMASK_LEN

#define AUX_CLK_SEL_AUX_TX_P0_FLDMASK_LEN   2

Definition at line 3247 of file dptx_reg.h.

◆ AUX_CLK_SEL_AUX_TX_P0_FLDMASK_POS

#define AUX_CLK_SEL_AUX_TX_P0_FLDMASK_POS   10

Definition at line 3246 of file dptx_reg.h.

◆ AUX_DEBOUNCE_CLKSEL_AUX_TX_P0_FLDMASK

#define AUX_DEBOUNCE_CLKSEL_AUX_TX_P0_FLDMASK   0xe00

Definition at line 3568 of file dptx_reg.h.

◆ AUX_DEBOUNCE_CLKSEL_AUX_TX_P0_FLDMASK_LEN

#define AUX_DEBOUNCE_CLKSEL_AUX_TX_P0_FLDMASK_LEN   3

Definition at line 3570 of file dptx_reg.h.

◆ AUX_DEBOUNCE_CLKSEL_AUX_TX_P0_FLDMASK_POS

#define AUX_DEBOUNCE_CLKSEL_AUX_TX_P0_FLDMASK_POS   9

Definition at line 3569 of file dptx_reg.h.

◆ AUX_DRV_DIS_TIME_THRD_AUX_TX_P0_FLDMASK

#define AUX_DRV_DIS_TIME_THRD_AUX_TX_P0_FLDMASK   0x1f00

Definition at line 4137 of file dptx_reg.h.

◆ AUX_DRV_DIS_TIME_THRD_AUX_TX_P0_FLDMASK_LEN

#define AUX_DRV_DIS_TIME_THRD_AUX_TX_P0_FLDMASK_LEN   5

Definition at line 4139 of file dptx_reg.h.

◆ AUX_DRV_DIS_TIME_THRD_AUX_TX_P0_FLDMASK_POS

#define AUX_DRV_DIS_TIME_THRD_AUX_TX_P0_FLDMASK_POS   8

Definition at line 4138 of file dptx_reg.h.

◆ AUX_DRV_EN_TIME_THRD_AUX_TX_P0_FLDMASK

#define AUX_DRV_EN_TIME_THRD_AUX_TX_P0_FLDMASK   0x1f

Definition at line 4133 of file dptx_reg.h.

◆ AUX_DRV_EN_TIME_THRD_AUX_TX_P0_FLDMASK_LEN

#define AUX_DRV_EN_TIME_THRD_AUX_TX_P0_FLDMASK_LEN   5

Definition at line 4135 of file dptx_reg.h.

◆ AUX_DRV_EN_TIME_THRD_AUX_TX_P0_FLDMASK_POS

#define AUX_DRV_EN_TIME_THRD_AUX_TX_P0_FLDMASK_POS   0

Definition at line 4134 of file dptx_reg.h.

◆ AUX_EDID_ADDR_AUX_TX_P0_FLDMASK

#define AUX_EDID_ADDR_AUX_TX_P0_FLDMASK   0x7f00

Definition at line 3297 of file dptx_reg.h.

◆ AUX_EDID_ADDR_AUX_TX_P0_FLDMASK_LEN

#define AUX_EDID_ADDR_AUX_TX_P0_FLDMASK_LEN   7

Definition at line 3299 of file dptx_reg.h.

◆ AUX_EDID_ADDR_AUX_TX_P0_FLDMASK_POS

#define AUX_EDID_ADDR_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3298 of file dptx_reg.h.

◆ AUX_EDID_REPLY_MCU_AUX_TX_P0_FLDMASK

#define AUX_EDID_REPLY_MCU_AUX_TX_P0_FLDMASK   0x8000

Definition at line 3293 of file dptx_reg.h.

◆ AUX_EDID_REPLY_MCU_AUX_TX_P0_FLDMASK_LEN

#define AUX_EDID_REPLY_MCU_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3295 of file dptx_reg.h.

◆ AUX_EDID_REPLY_MCU_AUX_TX_P0_FLDMASK_POS

#define AUX_EDID_REPLY_MCU_AUX_TX_P0_FLDMASK_POS   15

Definition at line 3294 of file dptx_reg.h.

◆ AUX_IN_AUX_TX_P0_FLDMASK

#define AUX_IN_AUX_TX_P0_FLDMASK   0x200

Definition at line 3609 of file dptx_reg.h.

◆ AUX_IN_AUX_TX_P0_FLDMASK_LEN

#define AUX_IN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3611 of file dptx_reg.h.

◆ AUX_IN_AUX_TX_P0_FLDMASK_POS

#define AUX_IN_AUX_TX_P0_FLDMASK_POS   9

Definition at line 3610 of file dptx_reg.h.

◆ AUX_MCCS_ADDR_AUX_TX_P0_FLDMASK

#define AUX_MCCS_ADDR_AUX_TX_P0_FLDMASK   0x7f

Definition at line 3305 of file dptx_reg.h.

◆ AUX_MCCS_ADDR_AUX_TX_P0_FLDMASK_LEN

#define AUX_MCCS_ADDR_AUX_TX_P0_FLDMASK_LEN   7

Definition at line 3307 of file dptx_reg.h.

◆ AUX_MCCS_ADDR_AUX_TX_P0_FLDMASK_POS

#define AUX_MCCS_ADDR_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3306 of file dptx_reg.h.

◆ AUX_MCCS_REPLY_MCU_AUX_TX_P0_FLDMASK

#define AUX_MCCS_REPLY_MCU_AUX_TX_P0_FLDMASK   0x80

Definition at line 3301 of file dptx_reg.h.

◆ AUX_MCCS_REPLY_MCU_AUX_TX_P0_FLDMASK_LEN

#define AUX_MCCS_REPLY_MCU_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3303 of file dptx_reg.h.

◆ AUX_MCCS_REPLY_MCU_AUX_TX_P0_FLDMASK_POS

#define AUX_MCCS_REPLY_MCU_AUX_TX_P0_FLDMASK_POS   7

Definition at line 3302 of file dptx_reg.h.

◆ AUX_NO_LENGTH_AUX_TX_P0_FLDMASK

#define AUX_NO_LENGTH_AUX_TX_P0_FLDMASK   0x1

Definition at line 3392 of file dptx_reg.h.

◆ AUX_NO_LENGTH_AUX_TX_P0_FLDMASK_LEN

#define AUX_NO_LENGTH_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3394 of file dptx_reg.h.

◆ AUX_NO_LENGTH_AUX_TX_P0_FLDMASK_POS

#define AUX_NO_LENGTH_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3393 of file dptx_reg.h.

◆ AUX_OFFSET

#define AUX_OFFSET   0x3600

Definition at line 10 of file dptx_reg.h.

◆ AUX_PHYWAKE_ACK_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK

#define AUX_PHYWAKE_ACK_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK   0x1

Definition at line 3888 of file dptx_reg.h.

◆ AUX_PHYWAKE_ACK_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_LEN

#define AUX_PHYWAKE_ACK_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3890 of file dptx_reg.h.

◆ AUX_PHYWAKE_ACK_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_POS

#define AUX_PHYWAKE_ACK_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3889 of file dptx_reg.h.

◆ AUX_PHYWAKE_MODE_AUX_TX_P0_FLDMASK

#define AUX_PHYWAKE_MODE_AUX_TX_P0_FLDMASK   0x1

Definition at line 3875 of file dptx_reg.h.

◆ AUX_PHYWAKE_MODE_AUX_TX_P0_FLDMASK_LEN

#define AUX_PHYWAKE_MODE_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3877 of file dptx_reg.h.

◆ AUX_PHYWAKE_MODE_AUX_TX_P0_FLDMASK_POS

#define AUX_PHYWAKE_MODE_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3876 of file dptx_reg.h.

◆ AUX_PHYWAKE_ONLY_AUX_TX_P0_FLDMASK

#define AUX_PHYWAKE_ONLY_AUX_TX_P0_FLDMASK   0x2

Definition at line 3879 of file dptx_reg.h.

◆ AUX_PHYWAKE_ONLY_AUX_TX_P0_FLDMASK_LEN

#define AUX_PHYWAKE_ONLY_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3881 of file dptx_reg.h.

◆ AUX_PHYWAKE_ONLY_AUX_TX_P0_FLDMASK_POS

#define AUX_PHYWAKE_ONLY_AUX_TX_P0_FLDMASK_POS   1

Definition at line 3880 of file dptx_reg.h.

◆ AUX_RCTRL_AUX_TX_P0_FLDMASK

#define AUX_RCTRL_AUX_TX_P0_FLDMASK   0x1f

Definition at line 3548 of file dptx_reg.h.

◆ AUX_RCTRL_AUX_TX_P0_FLDMASK_LEN

#define AUX_RCTRL_AUX_TX_P0_FLDMASK_LEN   5

Definition at line 3550 of file dptx_reg.h.

◆ AUX_RCTRL_AUX_TX_P0_FLDMASK_POS

#define AUX_RCTRL_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3549 of file dptx_reg.h.

◆ AUX_RD_MODE_AUX_TX_P0_FLDMASK

#define AUX_RD_MODE_AUX_TX_P0_FLDMASK   0x200

Definition at line 3361 of file dptx_reg.h.

◆ AUX_RD_MODE_AUX_TX_P0_FLDMASK_LEN

#define AUX_RD_MODE_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3363 of file dptx_reg.h.

◆ AUX_RD_MODE_AUX_TX_P0_FLDMASK_POS

#define AUX_RD_MODE_AUX_TX_P0_FLDMASK_POS   9

Definition at line 3362 of file dptx_reg.h.

◆ AUX_RESERVED_RO_0_AUX_TX_P0_FLDMASK

#define AUX_RESERVED_RO_0_AUX_TX_P0_FLDMASK   0xff

Definition at line 3356 of file dptx_reg.h.

◆ AUX_RESERVED_RO_0_AUX_TX_P0_FLDMASK_LEN

#define AUX_RESERVED_RO_0_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3358 of file dptx_reg.h.

◆ AUX_RESERVED_RO_0_AUX_TX_P0_FLDMASK_POS

#define AUX_RESERVED_RO_0_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3357 of file dptx_reg.h.

◆ AUX_RESERVED_RO_1_AUX_TX_P0_FLDMASK

#define AUX_RESERVED_RO_1_AUX_TX_P0_FLDMASK   0xfc00

Definition at line 3383 of file dptx_reg.h.

◆ AUX_RESERVED_RO_1_AUX_TX_P0_FLDMASK_LEN

#define AUX_RESERVED_RO_1_AUX_TX_P0_FLDMASK_LEN   6

Definition at line 3385 of file dptx_reg.h.

◆ AUX_RESERVED_RO_1_AUX_TX_P0_FLDMASK_POS

#define AUX_RESERVED_RO_1_AUX_TX_P0_FLDMASK_POS   10

Definition at line 3384 of file dptx_reg.h.

◆ AUX_RESERVED_RW_0_AUX_TX_P0_FLDMASK

#define AUX_RESERVED_RW_0_AUX_TX_P0_FLDMASK   0xfffc

Definition at line 3400 of file dptx_reg.h.

◆ AUX_RESERVED_RW_0_AUX_TX_P0_FLDMASK_LEN

#define AUX_RESERVED_RW_0_AUX_TX_P0_FLDMASK_LEN   14

Definition at line 3402 of file dptx_reg.h.

◆ AUX_RESERVED_RW_0_AUX_TX_P0_FLDMASK_POS

#define AUX_RESERVED_RW_0_AUX_TX_P0_FLDMASK_POS   2

Definition at line 3401 of file dptx_reg.h.

◆ AUX_RPD_AUX_TX_P0_FLDMASK

#define AUX_RPD_AUX_TX_P0_FLDMASK   0x20

Definition at line 3552 of file dptx_reg.h.

◆ AUX_RPD_AUX_TX_P0_FLDMASK_LEN

#define AUX_RPD_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3554 of file dptx_reg.h.

◆ AUX_RPD_AUX_TX_P0_FLDMASK_POS

#define AUX_RPD_AUX_TX_P0_FLDMASK_POS   5

Definition at line 3553 of file dptx_reg.h.

◆ AUX_RX_ADDR_RECV_IRQ_AUX_TX_P0_FLDMASK

#define AUX_RX_ADDR_RECV_IRQ_AUX_TX_P0_FLDMASK   0x4

Definition at line 3461 of file dptx_reg.h.

◆ AUX_RX_ADDR_RECV_IRQ_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_ADDR_RECV_IRQ_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3463 of file dptx_reg.h.

◆ AUX_RX_ADDR_RECV_IRQ_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_ADDR_RECV_IRQ_AUX_TX_P0_FLDMASK_POS   2

Definition at line 3462 of file dptx_reg.h.

◆ AUX_RX_AUX_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_AUX_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3447 of file dptx_reg.h.

◆ AUX_RX_AUX_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_AUX_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_POS   6

Definition at line 3446 of file dptx_reg.h.

◆ AUX_RX_AVERAGE_SEL_AUX_TX_P0_FLDMASK

#define AUX_RX_AVERAGE_SEL_AUX_TX_P0_FLDMASK   0x3000

Definition at line 3314 of file dptx_reg.h.

◆ AUX_RX_AVERAGE_SEL_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_AVERAGE_SEL_AUX_TX_P0_FLDMASK_LEN   2

Definition at line 3316 of file dptx_reg.h.

◆ AUX_RX_AVERAGE_SEL_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_AVERAGE_SEL_AUX_TX_P0_FLDMASK_POS   12

Definition at line 3315 of file dptx_reg.h.

◆ AUX_RX_CMD_RECV_IRQ_AUX_TX_P0_FLDMASK

#define AUX_RX_CMD_RECV_IRQ_AUX_TX_P0_FLDMASK   0x8

Definition at line 3457 of file dptx_reg.h.

◆ AUX_RX_CMD_RECV_IRQ_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_CMD_RECV_IRQ_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3459 of file dptx_reg.h.

◆ AUX_RX_CMD_RECV_IRQ_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_CMD_RECV_IRQ_AUX_TX_P0_FLDMASK_POS   3

Definition at line 3458 of file dptx_reg.h.

◆ AUX_RX_DATA_BYTE_CNT_AUX_TX_P0_FLDMASK

#define AUX_RX_DATA_BYTE_CNT_AUX_TX_P0_FLDMASK   0xff00

Definition at line 3352 of file dptx_reg.h.

◆ AUX_RX_DATA_BYTE_CNT_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_DATA_BYTE_CNT_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3354 of file dptx_reg.h.

◆ AUX_RX_DATA_BYTE_CNT_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_DATA_BYTE_CNT_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3353 of file dptx_reg.h.

◆ AUX_RX_DATA_RECV_IRQ_AUX_TX_P0_FLDMASK

#define AUX_RX_DATA_RECV_IRQ_AUX_TX_P0_FLDMASK   0x2

Definition at line 3465 of file dptx_reg.h.

◆ AUX_RX_DATA_RECV_IRQ_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_DATA_RECV_IRQ_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3467 of file dptx_reg.h.

◆ AUX_RX_DATA_RECV_IRQ_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_DATA_RECV_IRQ_AUX_TX_P0_FLDMASK_POS   1

Definition at line 3466 of file dptx_reg.h.

◆ AUX_RX_DECODE_SEL_AUX_TX_P0_FLDMASK

#define AUX_RX_DECODE_SEL_AUX_TX_P0_FLDMASK   0x80

Definition at line 3322 of file dptx_reg.h.

◆ AUX_RX_DECODE_SEL_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_DECODE_SEL_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3324 of file dptx_reg.h.

◆ AUX_RX_DECODE_SEL_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_DECODE_SEL_AUX_TX_P0_FLDMASK_POS   7

Definition at line 3323 of file dptx_reg.h.

◆ AUX_RX_DP_REV_AUX_TX_P0_FLDMASK

#define AUX_RX_DP_REV_AUX_TX_P0_FLDMASK   0x400

Definition at line 3331 of file dptx_reg.h.

◆ AUX_RX_DP_REV_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_DP_REV_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3333 of file dptx_reg.h.

◆ AUX_RX_DP_REV_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_DP_REV_AUX_TX_P0_FLDMASK_POS   10

Definition at line 3332 of file dptx_reg.h.

◆ AUX_RX_EDID_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK

#define AUX_RX_EDID_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK   0x20

Definition at line 3449 of file dptx_reg.h.

◆ AUX_RX_EDID_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_EDID_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3451 of file dptx_reg.h.

◆ AUX_RX_EDID_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_EDID_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_POS   5

Definition at line 3450 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA0_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_DATA0_AUX_TX_P0_FLDMASK   0xff

Definition at line 4061 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA0_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_DATA0_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 4063 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA0_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_DATA0_AUX_TX_P0_FLDMASK_POS   0

Definition at line 4062 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA10_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_DATA10_AUX_TX_P0_FLDMASK   0xff

Definition at line 4106 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA10_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_DATA10_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 4108 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA10_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_DATA10_AUX_TX_P0_FLDMASK_POS   0

Definition at line 4107 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA11_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_DATA11_AUX_TX_P0_FLDMASK   0xff00

Definition at line 4110 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA11_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_DATA11_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 4112 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA11_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_DATA11_AUX_TX_P0_FLDMASK_POS   8

Definition at line 4111 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA12_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_DATA12_AUX_TX_P0_FLDMASK   0xff

Definition at line 4115 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA12_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_DATA12_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 4117 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA12_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_DATA12_AUX_TX_P0_FLDMASK_POS   0

Definition at line 4116 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA13_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_DATA13_AUX_TX_P0_FLDMASK   0xff00

Definition at line 4119 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA13_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_DATA13_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 4121 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA13_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_DATA13_AUX_TX_P0_FLDMASK_POS   8

Definition at line 4120 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA14_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_DATA14_AUX_TX_P0_FLDMASK   0xff

Definition at line 4124 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA14_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_DATA14_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 4126 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA14_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_DATA14_AUX_TX_P0_FLDMASK_POS   0

Definition at line 4125 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA15_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_DATA15_AUX_TX_P0_FLDMASK   0xff00

Definition at line 4128 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA15_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_DATA15_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 4130 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA15_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_DATA15_AUX_TX_P0_FLDMASK_POS   8

Definition at line 4129 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA1_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_DATA1_AUX_TX_P0_FLDMASK   0xff00

Definition at line 4065 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA1_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_DATA1_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 4067 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA1_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_DATA1_AUX_TX_P0_FLDMASK_POS   8

Definition at line 4066 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA2_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_DATA2_AUX_TX_P0_FLDMASK   0xff

Definition at line 4070 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA2_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_DATA2_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 4072 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA2_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_DATA2_AUX_TX_P0_FLDMASK_POS   0

Definition at line 4071 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA3_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_DATA3_AUX_TX_P0_FLDMASK   0xff00

Definition at line 4074 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA3_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_DATA3_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 4076 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA3_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_DATA3_AUX_TX_P0_FLDMASK_POS   8

Definition at line 4075 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA4_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_DATA4_AUX_TX_P0_FLDMASK   0xff

Definition at line 4079 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA4_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_DATA4_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 4081 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA4_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_DATA4_AUX_TX_P0_FLDMASK_POS   0

Definition at line 4080 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA5_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_DATA5_AUX_TX_P0_FLDMASK   0xff00

Definition at line 4083 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA5_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_DATA5_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 4085 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA5_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_DATA5_AUX_TX_P0_FLDMASK_POS   8

Definition at line 4084 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA6_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_DATA6_AUX_TX_P0_FLDMASK   0xff

Definition at line 4088 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA6_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_DATA6_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 4090 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA6_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_DATA6_AUX_TX_P0_FLDMASK_POS   0

Definition at line 4089 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA7_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_DATA7_AUX_TX_P0_FLDMASK   0xff00

Definition at line 4092 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA7_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_DATA7_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 4094 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA7_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_DATA7_AUX_TX_P0_FLDMASK_POS   8

Definition at line 4093 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA8_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_DATA8_AUX_TX_P0_FLDMASK   0xff

Definition at line 4097 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA8_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_DATA8_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 4099 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA8_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_DATA8_AUX_TX_P0_FLDMASK_POS   0

Definition at line 4098 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA9_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_DATA9_AUX_TX_P0_FLDMASK   0xff00

Definition at line 4101 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA9_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_DATA9_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 4103 of file dptx_reg.h.

◆ AUX_RX_FIFO_DATA9_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_DATA9_AUX_TX_P0_FLDMASK_POS   8

Definition at line 4102 of file dptx_reg.h.

◆ AUX_RX_FIFO_EMPTY_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_EMPTY_AUX_TX_P0_FLDMASK   0x100

Definition at line 3339 of file dptx_reg.h.

◆ AUX_RX_FIFO_EMPTY_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_EMPTY_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3341 of file dptx_reg.h.

◆ AUX_RX_FIFO_EMPTY_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_EMPTY_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3340 of file dptx_reg.h.

◆ AUX_RX_FIFO_FULL_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_FULL_AUX_TX_P0_FLDMASK   0x200

Definition at line 3335 of file dptx_reg.h.

◆ AUX_RX_FIFO_FULL_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_FULL_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3337 of file dptx_reg.h.

◆ AUX_RX_FIFO_FULL_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_FULL_AUX_TX_P0_FLDMASK_POS   9

Definition at line 3336 of file dptx_reg.h.

◆ AUX_RX_FIFO_R_PULSE_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_R_PULSE_TX_P0_FLDMASK_POS   8

Definition at line 3366 of file dptx_reg.h.

◆ AUX_RX_FIFO_READ_DATA_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_READ_DATA_AUX_TX_P0_FLDMASK   0xff

Definition at line 3369 of file dptx_reg.h.

◆ AUX_RX_FIFO_READ_DATA_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_READ_DATA_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3371 of file dptx_reg.h.

◆ AUX_RX_FIFO_READ_DATA_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_READ_DATA_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3370 of file dptx_reg.h.

◆ AUX_RX_FIFO_READ_POINTER_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_READ_POINTER_AUX_TX_P0_FLDMASK   0xf0

Definition at line 3343 of file dptx_reg.h.

◆ AUX_RX_FIFO_READ_POINTER_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_READ_POINTER_AUX_TX_P0_FLDMASK_LEN   4

Definition at line 3345 of file dptx_reg.h.

◆ AUX_RX_FIFO_READ_POINTER_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_READ_POINTER_AUX_TX_P0_FLDMASK_POS   4

Definition at line 3344 of file dptx_reg.h.

◆ AUX_RX_FIFO_READ_PULSE_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_READ_PULSE_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3367 of file dptx_reg.h.

◆ AUX_RX_FIFO_READ_PULSE_TX_P0_FLDMASK

#define AUX_RX_FIFO_READ_PULSE_TX_P0_FLDMASK   0x100

Definition at line 3365 of file dptx_reg.h.

◆ AUX_RX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK

#define AUX_RX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK   0xf

Definition at line 3347 of file dptx_reg.h.

◆ AUX_RX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK_LEN   4

Definition at line 3349 of file dptx_reg.h.

◆ AUX_RX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3348 of file dptx_reg.h.

◆ AUX_RX_FSM_SOFTWARE_RESET_AUX_TX_P0_FLDMASK

#define AUX_RX_FSM_SOFTWARE_RESET_AUX_TX_P0_FLDMASK   0x2000

Definition at line 3258 of file dptx_reg.h.

◆ AUX_RX_FSM_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_FSM_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3260 of file dptx_reg.h.

◆ AUX_RX_FSM_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_FSM_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_POS   13

Definition at line 3259 of file dptx_reg.h.

◆ AUX_RX_MCCS_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK

#define AUX_RX_MCCS_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK   0x10

Definition at line 3453 of file dptx_reg.h.

◆ AUX_RX_MCCS_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_MCCS_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3455 of file dptx_reg.h.

◆ AUX_RX_MCCS_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_MCCS_RECV_COMPLETE_IRQ_AUX_TX_P0_FLDMASK_POS   4

Definition at line 3454 of file dptx_reg.h.

◆ AUX_RX_OEN_SET_AUX_TX_P0_FLDMASK

#define AUX_RX_OEN_SET_AUX_TX_P0_FLDMASK   0x80

Definition at line 3543 of file dptx_reg.h.

◆ AUX_RX_OEN_SET_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_OEN_SET_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3545 of file dptx_reg.h.

◆ AUX_RX_OEN_SET_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_OEN_SET_AUX_TX_P0_FLDMASK_POS   7

Definition at line 3544 of file dptx_reg.h.

◆ AUX_RX_PHY_SOFTWARE_RESET_AUX_TX_P0_FLDMASK

#define AUX_RX_PHY_SOFTWARE_RESET_AUX_TX_P0_FLDMASK   0x1000

Definition at line 3262 of file dptx_reg.h.

◆ AUX_RX_PHY_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_PHY_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3264 of file dptx_reg.h.

◆ AUX_RX_PHY_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_PHY_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_POS   12

Definition at line 3263 of file dptx_reg.h.

◆ AUX_RX_PHY_STATE_AUX_TX_P0_FLDMASK

#define AUX_RX_PHY_STATE_AUX_TX_P0_FLDMASK   0x3ff

Definition at line 3387 of file dptx_reg.h.

◆ AUX_RX_PHY_STATE_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_PHY_STATE_AUX_TX_P0_FLDMASK_LEN   10

Definition at line 3389 of file dptx_reg.h.

◆ AUX_RX_PHY_STATE_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_PHY_STATE_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3388 of file dptx_reg.h.

◆ AUX_RX_RECV_COMPLETE_IRQ_TX_P0_FLDMASK

#define AUX_RX_RECV_COMPLETE_IRQ_TX_P0_FLDMASK   0x40

Definition at line 3445 of file dptx_reg.h.

◆ AUX_RX_REPLY_ADDRESS_NONE_AUX_TX_P0_FLDMASK

#define AUX_RX_REPLY_ADDRESS_NONE_AUX_TX_P0_FLDMASK   0xf00

Definition at line 3378 of file dptx_reg.h.

◆ AUX_RX_REPLY_ADDRESS_NONE_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_REPLY_ADDRESS_NONE_AUX_TX_P0_FLDMASK_LEN   4

Definition at line 3380 of file dptx_reg.h.

◆ AUX_RX_REPLY_ADDRESS_NONE_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_REPLY_ADDRESS_NONE_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3379 of file dptx_reg.h.

◆ AUX_RX_REPLY_COMMAND_AUX_TX_P0_FLDMASK

#define AUX_RX_REPLY_COMMAND_AUX_TX_P0_FLDMASK   0xf

Definition at line 3374 of file dptx_reg.h.

◆ AUX_RX_REPLY_COMMAND_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_REPLY_COMMAND_AUX_TX_P0_FLDMASK_LEN   4

Definition at line 3376 of file dptx_reg.h.

◆ AUX_RX_REPLY_COMMAND_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_REPLY_COMMAND_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3375 of file dptx_reg.h.

◆ AUX_RX_SEL_AUX_TX_P0_FLDMASK

#define AUX_RX_SEL_AUX_TX_P0_FLDMASK   0x40

Definition at line 3556 of file dptx_reg.h.

◆ AUX_RX_SEL_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_SEL_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3558 of file dptx_reg.h.

◆ AUX_RX_SEL_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_SEL_AUX_TX_P0_FLDMASK_POS   6

Definition at line 3557 of file dptx_reg.h.

◆ AUX_RX_SYNC_PATTERN_THR_AUX_TX_P0_FLDMASK

#define AUX_RX_SYNC_PATTERN_THR_AUX_TX_P0_FLDMASK   0xf00

Definition at line 3318 of file dptx_reg.h.

◆ AUX_RX_SYNC_PATTERN_THR_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_SYNC_PATTERN_THR_AUX_TX_P0_FLDMASK_LEN   4

Definition at line 3320 of file dptx_reg.h.

◆ AUX_RX_SYNC_PATTERN_THR_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_SYNC_PATTERN_THR_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3319 of file dptx_reg.h.

◆ AUX_RX_UI_CNT_THR_AUX_TX_P0_FLDMASK

#define AUX_RX_UI_CNT_THR_AUX_TX_P0_FLDMASK   0x7f

Definition at line 3326 of file dptx_reg.h.

◆ AUX_RX_UI_CNT_THR_AUX_TX_P0_FLDMASK_LEN

#define AUX_RX_UI_CNT_THR_AUX_TX_P0_FLDMASK_LEN   7

Definition at line 3328 of file dptx_reg.h.

◆ AUX_RX_UI_CNT_THR_AUX_TX_P0_FLDMASK_POS

#define AUX_RX_UI_CNT_THR_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3327 of file dptx_reg.h.

◆ AUX_STATE_AUX_TX_P0_FLDMASK

#define AUX_STATE_AUX_TX_P0_FLDMASK   0xf00

Definition at line 3478 of file dptx_reg.h.

◆ AUX_STATE_AUX_TX_P0_FLDMASK_LEN

#define AUX_STATE_AUX_TX_P0_FLDMASK_LEN   4

Definition at line 3480 of file dptx_reg.h.

◆ AUX_STATE_AUX_TX_P0_FLDMASK_POS

#define AUX_STATE_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3479 of file dptx_reg.h.

◆ AUX_SWAP_AUX_TX_P0_FLDMASK

#define AUX_SWAP_AUX_TX_P0_FLDMASK   0x8000

Definition at line 3276 of file dptx_reg.h.

◆ AUX_SWAP_AUX_TX_P0_FLDMASK_LEN

#define AUX_SWAP_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3278 of file dptx_reg.h.

◆ AUX_SWAP_AUX_TX_P0_FLDMASK_POS

#define AUX_SWAP_AUX_TX_P0_FLDMASK_POS   15

Definition at line 3277 of file dptx_reg.h.

◆ AUX_SWAP_TX_AUX_TX_P0_FLDMASK

#define AUX_SWAP_TX_AUX_TX_P0_FLDMASK   0x1

Definition at line 3693 of file dptx_reg.h.

◆ AUX_SWAP_TX_AUX_TX_P0_FLDMASK_LEN

#define AUX_SWAP_TX_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3695 of file dptx_reg.h.

◆ AUX_SWAP_TX_AUX_TX_P0_FLDMASK_POS

#define AUX_SWAP_TX_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3694 of file dptx_reg.h.

◆ AUX_TEST_CONFIG_AUX_TX_P0_FLDMASK

#define AUX_TEST_CONFIG_AUX_TX_P0_FLDMASK   0xff

Definition at line 3505 of file dptx_reg.h.

◆ AUX_TEST_CONFIG_AUX_TX_P0_FLDMASK_LEN

#define AUX_TEST_CONFIG_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3507 of file dptx_reg.h.

◆ AUX_TEST_CONFIG_AUX_TX_P0_FLDMASK_POS

#define AUX_TEST_CONFIG_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3506 of file dptx_reg.h.

◆ AUX_TIMEOUT_CMP_MASK_AUX_TX_P0_FLDMASK

#define AUX_TIMEOUT_CMP_MASK_AUX_TX_P0_FLDMASK   0x2000

Definition at line 3284 of file dptx_reg.h.

◆ AUX_TIMEOUT_CMP_MASK_AUX_TX_P0_FLDMASK_LEN

#define AUX_TIMEOUT_CMP_MASK_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3286 of file dptx_reg.h.

◆ AUX_TIMEOUT_CMP_MASK_AUX_TX_P0_FLDMASK_POS

#define AUX_TIMEOUT_CMP_MASK_AUX_TX_P0_FLDMASK_POS   13

Definition at line 3285 of file dptx_reg.h.

◆ AUX_TIMEOUT_THR_AUX_TX_P0_FLDMASK

#define AUX_TIMEOUT_THR_AUX_TX_P0_FLDMASK   0x1fff

Definition at line 3288 of file dptx_reg.h.

◆ AUX_TIMEOUT_THR_AUX_TX_P0_FLDMASK_LEN

#define AUX_TIMEOUT_THR_AUX_TX_P0_FLDMASK_LEN   13

Definition at line 3290 of file dptx_reg.h.

◆ AUX_TIMEOUT_THR_AUX_TX_P0_FLDMASK_POS

#define AUX_TIMEOUT_THR_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3289 of file dptx_reg.h.

◆ AUX_TIMEOUT_THR_EXTEN_AUX_TX_P0_FLDMASK

#define AUX_TIMEOUT_THR_EXTEN_AUX_TX_P0_FLDMASK   0x4000

Definition at line 3310 of file dptx_reg.h.

◆ AUX_TIMEOUT_THR_EXTEN_AUX_TX_P0_FLDMASK_LEN

#define AUX_TIMEOUT_THR_EXTEN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3312 of file dptx_reg.h.

◆ AUX_TIMEOUT_THR_EXTEN_AUX_TX_P0_FLDMASK_POS

#define AUX_TIMEOUT_THR_EXTEN_AUX_TX_P0_FLDMASK_POS   14

Definition at line 3311 of file dptx_reg.h.

◆ AUX_TOP_RESET_AUX_TX_P0_FLDMASK

#define AUX_TOP_RESET_AUX_TX_P0_FLDMASK   0x2

Definition at line 3229 of file dptx_reg.h.

◆ AUX_TOP_RESET_AUX_TX_P0_FLDMASK_LEN

#define AUX_TOP_RESET_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3231 of file dptx_reg.h.

◆ AUX_TOP_RESET_AUX_TX_P0_FLDMASK_POS

#define AUX_TOP_RESET_AUX_TX_P0_FLDMASK_POS   1

Definition at line 3230 of file dptx_reg.h.

◆ AUX_TX_AUXTX_OV_EN_AUX_TX_P0_FLDMASK

#define AUX_TX_AUXTX_OV_EN_AUX_TX_P0_FLDMASK   0x2

Definition at line 3396 of file dptx_reg.h.

◆ AUX_TX_AUXTX_OV_EN_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_AUXTX_OV_EN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3398 of file dptx_reg.h.

◆ AUX_TX_AUXTX_OV_EN_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_AUXTX_OV_EN_AUX_TX_P0_FLDMASK_POS   1

Definition at line 3397 of file dptx_reg.h.

◆ AUX_TX_FIFO_EMPTY_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_EMPTY_AUX_TX_P0_FLDMASK   0x800

Definition at line 3436 of file dptx_reg.h.

◆ AUX_TX_FIFO_EMPTY_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_EMPTY_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3438 of file dptx_reg.h.

◆ AUX_TX_FIFO_EMPTY_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_EMPTY_AUX_TX_P0_FLDMASK_POS   11

Definition at line 3437 of file dptx_reg.h.

◆ AUX_TX_FIFO_FULL_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_FULL_AUX_TX_P0_FLDMASK   0x1000

Definition at line 3432 of file dptx_reg.h.

◆ AUX_TX_FIFO_FULL_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_FULL_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3434 of file dptx_reg.h.

◆ AUX_TX_FIFO_FULL_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_FULL_AUX_TX_P0_FLDMASK_POS   12

Definition at line 3433 of file dptx_reg.h.

◆ AUX_TX_FIFO_NEW_MODE_EN_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_NEW_MODE_EN_AUX_TX_P0_FLDMASK   0x4

Definition at line 3896 of file dptx_reg.h.

◆ AUX_TX_FIFO_NEW_MODE_EN_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_NEW_MODE_EN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3898 of file dptx_reg.h.

◆ AUX_TX_FIFO_NEW_MODE_EN_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_NEW_MODE_EN_AUX_TX_P0_FLDMASK_POS   2

Definition at line 3897 of file dptx_reg.h.

◆ AUX_TX_FIFO_READ_POINTER_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_READ_POINTER_AUX_TX_P0_FLDMASK   0xf0

Definition at line 3423 of file dptx_reg.h.

◆ AUX_TX_FIFO_READ_POINTER_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_READ_POINTER_AUX_TX_P0_FLDMASK_LEN   4

Definition at line 3425 of file dptx_reg.h.

◆ AUX_TX_FIFO_READ_POINTER_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_READ_POINTER_AUX_TX_P0_FLDMASK_POS   4

Definition at line 3424 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_DATA_AUX_TX_P0_FLDMASK   0xff

Definition at line 3418 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_DATA_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3420 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_DATA_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3419 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE0_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_DATA_BYTE0_AUX_TX_P0_FLDMASK   0xff

Definition at line 3901 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE0_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_DATA_BYTE0_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3903 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE0_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_DATA_BYTE0_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3902 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE10_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_DATA_BYTE10_AUX_TX_P0_FLDMASK   0xff

Definition at line 3946 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE10_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_DATA_BYTE10_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3948 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE10_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_DATA_BYTE10_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3947 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE11_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_DATA_BYTE11_AUX_TX_P0_FLDMASK   0xff00

Definition at line 3950 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE11_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_DATA_BYTE11_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3952 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE11_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_DATA_BYTE11_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3951 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE12_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_DATA_BYTE12_AUX_TX_P0_FLDMASK   0xff

Definition at line 3955 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE12_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_DATA_BYTE12_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3957 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE12_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_DATA_BYTE12_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3956 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE13_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_DATA_BYTE13_AUX_TX_P0_FLDMASK   0xff00

Definition at line 3959 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE13_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_DATA_BYTE13_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3961 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE13_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_DATA_BYTE13_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3960 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE14_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_DATA_BYTE14_AUX_TX_P0_FLDMASK   0xff

Definition at line 3964 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE14_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_DATA_BYTE14_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3966 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE14_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_DATA_BYTE14_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3965 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE15_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_DATA_BYTE15_AUX_TX_P0_FLDMASK   0xff00

Definition at line 3968 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE15_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_DATA_BYTE15_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3970 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE15_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_DATA_BYTE15_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3969 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE1_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_DATA_BYTE1_AUX_TX_P0_FLDMASK   0xff00

Definition at line 3905 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE1_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_DATA_BYTE1_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3907 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE1_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_DATA_BYTE1_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3906 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE2_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_DATA_BYTE2_AUX_TX_P0_FLDMASK   0xff

Definition at line 3910 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE2_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_DATA_BYTE2_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3912 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE2_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_DATA_BYTE2_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3911 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE3_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_DATA_BYTE3_AUX_TX_P0_FLDMASK   0xff00

Definition at line 3914 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE3_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_DATA_BYTE3_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3916 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE3_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_DATA_BYTE3_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3915 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE4_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_DATA_BYTE4_AUX_TX_P0_FLDMASK   0xff

Definition at line 3919 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE4_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_DATA_BYTE4_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3921 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE4_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_DATA_BYTE4_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3920 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE5_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_DATA_BYTE5_AUX_TX_P0_FLDMASK   0xff00

Definition at line 3923 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE5_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_DATA_BYTE5_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3925 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE5_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_DATA_BYTE5_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3924 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE6_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_DATA_BYTE6_AUX_TX_P0_FLDMASK   0xff

Definition at line 3928 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE6_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_DATA_BYTE6_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3930 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE6_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_DATA_BYTE6_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3929 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE7_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_DATA_BYTE7_AUX_TX_P0_FLDMASK   0xff00

Definition at line 3932 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE7_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_DATA_BYTE7_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3934 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE7_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_DATA_BYTE7_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3933 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE8_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_DATA_BYTE8_AUX_TX_P0_FLDMASK   0xff

Definition at line 3937 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE8_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_DATA_BYTE8_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3939 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE8_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_DATA_BYTE8_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3938 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE9_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_DATA_BYTE9_AUX_TX_P0_FLDMASK   0xff00

Definition at line 3941 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE9_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_DATA_BYTE9_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3943 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_BYTE9_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_DATA_BYTE9_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3942 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_NEW_MODE_TOGGLE_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_DATA_NEW_MODE_TOGGLE_AUX_TX_P0_FLDMASK   0x2

Definition at line 3892 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_NEW_MODE_TOGGLE_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_DATA_NEW_MODE_TOGGLE_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3894 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_DATA_NEW_MODE_TOGGLE_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_DATA_NEW_MODE_TOGGLE_AUX_TX_P0_FLDMASK_POS   1

Definition at line 3893 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK

#define AUX_TX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK   0xf

Definition at line 3427 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK_LEN   4

Definition at line 3429 of file dptx_reg.h.

◆ AUX_TX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FIFO_WRITE_POINTER_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3428 of file dptx_reg.h.

◆ AUX_TX_FSM_SOFTWARE_RESET_AUX_TX_P0_FLDMASK

#define AUX_TX_FSM_SOFTWARE_RESET_AUX_TX_P0_FLDMASK   0x8000

Definition at line 3250 of file dptx_reg.h.

◆ AUX_TX_FSM_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_FSM_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3252 of file dptx_reg.h.

◆ AUX_TX_FSM_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_FSM_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_POS   15

Definition at line 3251 of file dptx_reg.h.

◆ AUX_TX_OEN_SET_AUX_TX_P0_FLDMASK

#define AUX_TX_OEN_SET_AUX_TX_P0_FLDMASK   0x4

Definition at line 3523 of file dptx_reg.h.

◆ AUX_TX_OEN_SET_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_OEN_SET_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3525 of file dptx_reg.h.

◆ AUX_TX_OEN_SET_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_OEN_SET_AUX_TX_P0_FLDMASK_POS   2

Definition at line 3524 of file dptx_reg.h.

◆ AUX_TX_OFF_AUX_TX_P0_FLDMASK

#define AUX_TX_OFF_AUX_TX_P0_FLDMASK   0x10

Definition at line 3531 of file dptx_reg.h.

◆ AUX_TX_OFF_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_OFF_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3533 of file dptx_reg.h.

◆ AUX_TX_OFF_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_OFF_AUX_TX_P0_FLDMASK_POS   4

Definition at line 3532 of file dptx_reg.h.

◆ AUX_TX_OV_EN_AUX_TX_P0_FLDMASK

#define AUX_TX_OV_EN_AUX_TX_P0_FLDMASK   0x1

Definition at line 3515 of file dptx_reg.h.

◆ AUX_TX_OV_EN_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_OV_EN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3517 of file dptx_reg.h.

◆ AUX_TX_OV_EN_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_OV_EN_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3516 of file dptx_reg.h.

◆ AUX_TX_OV_MODE_AUX_TX_P0_FLDMASK

#define AUX_TX_OV_MODE_AUX_TX_P0_FLDMASK   0x8

Definition at line 3527 of file dptx_reg.h.

◆ AUX_TX_OV_MODE_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_OV_MODE_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3529 of file dptx_reg.h.

◆ AUX_TX_OV_MODE_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_OV_MODE_AUX_TX_P0_FLDMASK_POS   3

Definition at line 3528 of file dptx_reg.h.

◆ AUX_TX_OVER_SAMPLE_RATE_AUX_TX_P0_FLDMASK

#define AUX_TX_OVER_SAMPLE_RATE_AUX_TX_P0_FLDMASK   0xff00

Definition at line 3414 of file dptx_reg.h.

◆ AUX_TX_OVER_SAMPLE_RATE_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_OVER_SAMPLE_RATE_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3416 of file dptx_reg.h.

◆ AUX_TX_OVER_SAMPLE_RATE_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_OVER_SAMPLE_RATE_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3415 of file dptx_reg.h.

◆ AUX_TX_PHY_SOFTWARE_RESET_AUX_TX_P0_FLDMASK

#define AUX_TX_PHY_SOFTWARE_RESET_AUX_TX_P0_FLDMASK   0x4000

Definition at line 3254 of file dptx_reg.h.

◆ AUX_TX_PHY_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_PHY_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3256 of file dptx_reg.h.

◆ AUX_TX_PHY_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_PHY_SOFTWARE_RESET_AUX_TX_P0_FLDMASK_POS   14

Definition at line 3255 of file dptx_reg.h.

◆ AUX_TX_PHY_STATE_AUX_TX_P0_FLDMASK

#define AUX_TX_PHY_STATE_AUX_TX_P0_FLDMASK   0x7ff

Definition at line 3440 of file dptx_reg.h.

◆ AUX_TX_PHY_STATE_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_PHY_STATE_AUX_TX_P0_FLDMASK_LEN   11

Definition at line 3442 of file dptx_reg.h.

◆ AUX_TX_PHY_STATE_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_PHY_STATE_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3441 of file dptx_reg.h.

◆ AUX_TX_PRE_NUM_AUX_TX_P0_FLDMASK

#define AUX_TX_PRE_NUM_AUX_TX_P0_FLDMASK   0xff00

Definition at line 3409 of file dptx_reg.h.

◆ AUX_TX_PRE_NUM_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_PRE_NUM_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3411 of file dptx_reg.h.

◆ AUX_TX_PRE_NUM_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_PRE_NUM_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3410 of file dptx_reg.h.

◆ AUX_TX_REQUEST_READY_AUX_TX_P0_FLDMASK

#define AUX_TX_REQUEST_READY_AUX_TX_P0_FLDMASK   0x8

Definition at line 3405 of file dptx_reg.h.

◆ AUX_TX_REQUEST_READY_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_REQUEST_READY_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3407 of file dptx_reg.h.

◆ AUX_TX_REQUEST_READY_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_REQUEST_READY_AUX_TX_P0_FLDMASK_POS   3

Definition at line 3406 of file dptx_reg.h.

◆ AUX_TX_VALUE_SET_AUX_TX_P0_FLDMASK

#define AUX_TX_VALUE_SET_AUX_TX_P0_FLDMASK   0x2

Definition at line 3519 of file dptx_reg.h.

◆ AUX_TX_VALUE_SET_AUX_TX_P0_FLDMASK_LEN

#define AUX_TX_VALUE_SET_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3521 of file dptx_reg.h.

◆ AUX_TX_VALUE_SET_AUX_TX_P0_FLDMASK_POS

#define AUX_TX_VALUE_SET_AUX_TX_P0_FLDMASK_POS   1

Definition at line 3520 of file dptx_reg.h.

◆ AUX_VALID_DB_TH_AUX_TX_P0_FLDMASK

#define AUX_VALID_DB_TH_AUX_TX_P0_FLDMASK   0xf

Definition at line 4032 of file dptx_reg.h.

◆ AUX_VALID_DB_TH_AUX_TX_P0_FLDMASK_LEN

#define AUX_VALID_DB_TH_AUX_TX_P0_FLDMASK_LEN   4

Definition at line 4034 of file dptx_reg.h.

◆ AUX_VALID_DB_TH_AUX_TX_P0_FLDMASK_POS

#define AUX_VALID_DB_TH_AUX_TX_P0_FLDMASK_POS   0

Definition at line 4033 of file dptx_reg.h.

◆ AUX_WAIT_RECEIVE_TIME_THRD_AUX_TX_P0_FLDMASK

#define AUX_WAIT_RECEIVE_TIME_THRD_AUX_TX_P0_FLDMASK   0xff00

Definition at line 4146 of file dptx_reg.h.

◆ AUX_WAIT_RECEIVE_TIME_THRD_AUX_TX_P0_FLDMASK_LEN

#define AUX_WAIT_RECEIVE_TIME_THRD_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 4148 of file dptx_reg.h.

◆ AUX_WAIT_RECEIVE_TIME_THRD_AUX_TX_P0_FLDMASK_POS

#define AUX_WAIT_RECEIVE_TIME_THRD_AUX_TX_P0_FLDMASK_POS   8

Definition at line 4147 of file dptx_reg.h.

◆ AUX_WAIT_TRANSFER_TIME_THRD_AUX_TX_P0_FLDMASK

#define AUX_WAIT_TRANSFER_TIME_THRD_AUX_TX_P0_FLDMASK   0xff

Definition at line 4142 of file dptx_reg.h.

◆ AUX_WAIT_TRANSFER_TIME_THRD_AUX_TX_P0_FLDMASK_LEN

#define AUX_WAIT_TRANSFER_TIME_THRD_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 4144 of file dptx_reg.h.

◆ AUX_WAIT_TRANSFER_TIME_THRD_AUX_TX_P0_FLDMASK_POS

#define AUX_WAIT_TRANSFER_TIME_THRD_AUX_TX_P0_FLDMASK_POS   0

Definition at line 4143 of file dptx_reg.h.

◆ AUXN_I_AUX_TX_P0_FLDMASK

#define AUXN_I_AUX_TX_P0_FLDMASK   0x8000

Definition at line 3688 of file dptx_reg.h.

◆ AUXN_I_AUX_TX_P0_FLDMASK_LEN

#define AUXN_I_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3690 of file dptx_reg.h.

◆ AUXN_I_AUX_TX_P0_FLDMASK_POS

#define AUXN_I_AUX_TX_P0_FLDMASK_POS   15

Definition at line 3689 of file dptx_reg.h.

◆ AUXP_I_AUX_TX_P0_FLDMASK

#define AUXP_I_AUX_TX_P0_FLDMASK   0x4000

Definition at line 3684 of file dptx_reg.h.

◆ AUXP_I_AUX_TX_P0_FLDMASK_LEN

#define AUXP_I_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3686 of file dptx_reg.h.

◆ AUXP_I_AUX_TX_P0_FLDMASK_POS

#define AUXP_I_AUX_TX_P0_FLDMASK_POS   14

Definition at line 3685 of file dptx_reg.h.

◆ AUXRX_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK

#define AUXRX_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK   0x80

Definition at line 3560 of file dptx_reg.h.

◆ AUXRX_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK_LEN

#define AUXRX_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3562 of file dptx_reg.h.

◆ AUXRX_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK_POS

#define AUXRX_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK_POS   7

Definition at line 3561 of file dptx_reg.h.

◆ AUXRX_VTH_AUX_TX_P0_FLDMASK

#define AUXRX_VTH_AUX_TX_P0_FLDMASK   0x60

Definition at line 3626 of file dptx_reg.h.

◆ AUXRX_VTH_AUX_TX_P0_FLDMASK_LEN

#define AUXRX_VTH_AUX_TX_P0_FLDMASK_LEN   2

Definition at line 3628 of file dptx_reg.h.

◆ AUXRX_VTH_AUX_TX_P0_FLDMASK_POS

#define AUXRX_VTH_AUX_TX_P0_FLDMASK_POS   5

Definition at line 3627 of file dptx_reg.h.

◆ AUXRXVALID_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK

#define AUXRXVALID_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK   0x100

Definition at line 3564 of file dptx_reg.h.

◆ AUXRXVALID_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK_LEN

#define AUXRXVALID_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3566 of file dptx_reg.h.

◆ AUXRXVALID_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK_POS

#define AUXRXVALID_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3565 of file dptx_reg.h.

◆ AUXTX_HW_ACCS_EN_AUX_TX_P0_FLDMASK

#define AUXTX_HW_ACCS_EN_AUX_TX_P0_FLDMASK   0x8

Definition at line 3836 of file dptx_reg.h.

◆ AUXTX_HW_ACCS_EN_AUX_TX_P0_FLDMASK_LEN

#define AUXTX_HW_ACCS_EN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3838 of file dptx_reg.h.

◆ AUXTX_HW_ACCS_EN_AUX_TX_P0_FLDMASK_POS

#define AUXTX_HW_ACCS_EN_AUX_TX_P0_FLDMASK_POS   3

Definition at line 3837 of file dptx_reg.h.

◆ AUXTX_ISEL_AUX_TX_P0_FLDMASK

#define AUXTX_ISEL_AUX_TX_P0_FLDMASK   0x1f

Definition at line 3622 of file dptx_reg.h.

◆ AUXTX_ISEL_AUX_TX_P0_FLDMASK_LEN

#define AUXTX_ISEL_AUX_TX_P0_FLDMASK_LEN   5

Definition at line 3624 of file dptx_reg.h.

◆ AUXTX_ISEL_AUX_TX_P0_FLDMASK_POS

#define AUXTX_ISEL_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3623 of file dptx_reg.h.

◆ AVI_CFG_DP_ENCODER0_P0_FLDMASK

#define AVI_CFG_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 463 of file dptx_reg.h.

◆ AVI_CFG_DP_ENCODER0_P0_FLDMASK_LEN

#define AVI_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 465 of file dptx_reg.h.

◆ AVI_CFG_DP_ENCODER0_P0_FLDMASK_POS

#define AVI_CFG_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 464 of file dptx_reg.h.

◆ AVI_HB0_DP_ENCODER0_P0_FLDMASK

#define AVI_HB0_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 624 of file dptx_reg.h.

◆ AVI_HB0_DP_ENCODER0_P0_FLDMASK_LEN

#define AVI_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 626 of file dptx_reg.h.

◆ AVI_HB0_DP_ENCODER0_P0_FLDMASK_POS

#define AVI_HB0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 625 of file dptx_reg.h.

◆ AVI_HB1_DP_ENCODER0_P0_FLDMASK

#define AVI_HB1_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 628 of file dptx_reg.h.

◆ AVI_HB1_DP_ENCODER0_P0_FLDMASK_LEN

#define AVI_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 630 of file dptx_reg.h.

◆ AVI_HB1_DP_ENCODER0_P0_FLDMASK_POS

#define AVI_HB1_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 629 of file dptx_reg.h.

◆ AVI_HB2_DP_ENCODER0_P0_FLDMASK

#define AVI_HB2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 633 of file dptx_reg.h.

◆ AVI_HB2_DP_ENCODER0_P0_FLDMASK_LEN

#define AVI_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 635 of file dptx_reg.h.

◆ AVI_HB2_DP_ENCODER0_P0_FLDMASK_POS

#define AVI_HB2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 634 of file dptx_reg.h.

◆ AVI_HB3_DP_ENCODER0_P0_FLDMASK

#define AVI_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 637 of file dptx_reg.h.

◆ AVI_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define AVI_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 639 of file dptx_reg.h.

◆ AVI_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define AVI_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 638 of file dptx_reg.h.

◆ BIST_FAIL_AUDIO_L0_DP_ENCODER1_P0_FLDMASK

#define BIST_FAIL_AUDIO_L0_DP_ENCODER1_P0_FLDMASK   0x10

Definition at line 1903 of file dptx_reg.h.

◆ BIST_FAIL_AUDIO_L0_DP_ENCODER1_P0_FLDMASK_LEN

#define BIST_FAIL_AUDIO_L0_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1905 of file dptx_reg.h.

◆ BIST_FAIL_AUDIO_L0_DP_ENCODER1_P0_FLDMASK_POS

#define BIST_FAIL_AUDIO_L0_DP_ENCODER1_P0_FLDMASK_POS   4

Definition at line 1904 of file dptx_reg.h.

◆ BIST_FAIL_AUDIO_L1_DP_ENCODER1_P0_FLDMASK

#define BIST_FAIL_AUDIO_L1_DP_ENCODER1_P0_FLDMASK   0x20

Definition at line 1907 of file dptx_reg.h.

◆ BIST_FAIL_AUDIO_L1_DP_ENCODER1_P0_FLDMASK_LEN

#define BIST_FAIL_AUDIO_L1_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1909 of file dptx_reg.h.

◆ BIST_FAIL_AUDIO_L1_DP_ENCODER1_P0_FLDMASK_POS

#define BIST_FAIL_AUDIO_L1_DP_ENCODER1_P0_FLDMASK_POS   5

Definition at line 1908 of file dptx_reg.h.

◆ BIST_FAIL_AUDIO_L2_DP_ENCODER1_P0_FLDMASK

#define BIST_FAIL_AUDIO_L2_DP_ENCODER1_P0_FLDMASK   0x40

Definition at line 1911 of file dptx_reg.h.

◆ BIST_FAIL_AUDIO_L2_DP_ENCODER1_P0_FLDMASK_LEN

#define BIST_FAIL_AUDIO_L2_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1913 of file dptx_reg.h.

◆ BIST_FAIL_AUDIO_L2_DP_ENCODER1_P0_FLDMASK_POS

#define BIST_FAIL_AUDIO_L2_DP_ENCODER1_P0_FLDMASK_POS   6

Definition at line 1912 of file dptx_reg.h.

◆ BIST_FAIL_AUDIO_L3_DP_ENCODER1_P0_FLDMASK

#define BIST_FAIL_AUDIO_L3_DP_ENCODER1_P0_FLDMASK   0x80

Definition at line 1915 of file dptx_reg.h.

◆ BIST_FAIL_AUDIO_L3_DP_ENCODER1_P0_FLDMASK_LEN

#define BIST_FAIL_AUDIO_L3_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1917 of file dptx_reg.h.

◆ BIST_FAIL_AUDIO_L3_DP_ENCODER1_P0_FLDMASK_POS

#define BIST_FAIL_AUDIO_L3_DP_ENCODER1_P0_FLDMASK_POS   7

Definition at line 1916 of file dptx_reg.h.

◆ BIST_FAIL_VIDEO_L0_DP_ENCODER1_P0_FLDMASK

#define BIST_FAIL_VIDEO_L0_DP_ENCODER1_P0_FLDMASK   0x1

Definition at line 1887 of file dptx_reg.h.

◆ BIST_FAIL_VIDEO_L0_DP_ENCODER1_P0_FLDMASK_LEN

#define BIST_FAIL_VIDEO_L0_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1889 of file dptx_reg.h.

◆ BIST_FAIL_VIDEO_L0_DP_ENCODER1_P0_FLDMASK_POS

#define BIST_FAIL_VIDEO_L0_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1888 of file dptx_reg.h.

◆ BIST_FAIL_VIDEO_L1_DP_ENCODER1_P0_FLDMASK

#define BIST_FAIL_VIDEO_L1_DP_ENCODER1_P0_FLDMASK   0x2

Definition at line 1891 of file dptx_reg.h.

◆ BIST_FAIL_VIDEO_L1_DP_ENCODER1_P0_FLDMASK_LEN

#define BIST_FAIL_VIDEO_L1_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1893 of file dptx_reg.h.

◆ BIST_FAIL_VIDEO_L1_DP_ENCODER1_P0_FLDMASK_POS

#define BIST_FAIL_VIDEO_L1_DP_ENCODER1_P0_FLDMASK_POS   1

Definition at line 1892 of file dptx_reg.h.

◆ BIST_FAIL_VIDEO_L2_DP_ENCODER1_P0_FLDMASK

#define BIST_FAIL_VIDEO_L2_DP_ENCODER1_P0_FLDMASK   0x4

Definition at line 1895 of file dptx_reg.h.

◆ BIST_FAIL_VIDEO_L2_DP_ENCODER1_P0_FLDMASK_LEN

#define BIST_FAIL_VIDEO_L2_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1897 of file dptx_reg.h.

◆ BIST_FAIL_VIDEO_L2_DP_ENCODER1_P0_FLDMASK_POS

#define BIST_FAIL_VIDEO_L2_DP_ENCODER1_P0_FLDMASK_POS   2

Definition at line 1896 of file dptx_reg.h.

◆ BIST_FAIL_VIDEO_L3_DP_ENCODER1_P0_FLDMASK

#define BIST_FAIL_VIDEO_L3_DP_ENCODER1_P0_FLDMASK   0x8

Definition at line 1899 of file dptx_reg.h.

◆ BIST_FAIL_VIDEO_L3_DP_ENCODER1_P0_FLDMASK_LEN

#define BIST_FAIL_VIDEO_L3_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1901 of file dptx_reg.h.

◆ BIST_FAIL_VIDEO_L3_DP_ENCODER1_P0_FLDMASK_POS

#define BIST_FAIL_VIDEO_L3_DP_ENCODER1_P0_FLDMASK_POS   3

Definition at line 1900 of file dptx_reg.h.

◆ BIST_FAIL_VSC_CEA_HW_DP_ENCODER1_P0_FLDMASK

#define BIST_FAIL_VSC_CEA_HW_DP_ENCODER1_P0_FLDMASK   0x200

Definition at line 1923 of file dptx_reg.h.

◆ BIST_FAIL_VSC_CEA_HW_DP_ENCODER1_P0_FLDMASK_LEN

#define BIST_FAIL_VSC_CEA_HW_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1925 of file dptx_reg.h.

◆ BIST_FAIL_VSC_CEA_HW_DP_ENCODER1_P0_FLDMASK_POS

#define BIST_FAIL_VSC_CEA_HW_DP_ENCODER1_P0_FLDMASK_POS   9

Definition at line 1924 of file dptx_reg.h.

◆ BIST_FAIL_VSC_CEA_SW_DP_ENCODER1_P0_FLDMASK

#define BIST_FAIL_VSC_CEA_SW_DP_ENCODER1_P0_FLDMASK   0x800

Definition at line 1931 of file dptx_reg.h.

◆ BIST_FAIL_VSC_CEA_SW_DP_ENCODER1_P0_FLDMASK_LEN

#define BIST_FAIL_VSC_CEA_SW_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1933 of file dptx_reg.h.

◆ BIST_FAIL_VSC_CEA_SW_DP_ENCODER1_P0_FLDMASK_POS

#define BIST_FAIL_VSC_CEA_SW_DP_ENCODER1_P0_FLDMASK_POS   11

Definition at line 1932 of file dptx_reg.h.

◆ BIST_FAIL_VSC_VESA_HW_DP_ENCODER1_P0_FLDMASK

#define BIST_FAIL_VSC_VESA_HW_DP_ENCODER1_P0_FLDMASK   0x100

Definition at line 1919 of file dptx_reg.h.

◆ BIST_FAIL_VSC_VESA_HW_DP_ENCODER1_P0_FLDMASK_LEN

#define BIST_FAIL_VSC_VESA_HW_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1921 of file dptx_reg.h.

◆ BIST_FAIL_VSC_VESA_HW_DP_ENCODER1_P0_FLDMASK_POS

#define BIST_FAIL_VSC_VESA_HW_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1920 of file dptx_reg.h.

◆ BIST_FAIL_VSC_VESA_SW_DP_ENCODER1_P0_FLDMASK

#define BIST_FAIL_VSC_VESA_SW_DP_ENCODER1_P0_FLDMASK   0x400

Definition at line 1927 of file dptx_reg.h.

◆ BIST_FAIL_VSC_VESA_SW_DP_ENCODER1_P0_FLDMASK_LEN

#define BIST_FAIL_VSC_VESA_SW_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1929 of file dptx_reg.h.

◆ BIST_FAIL_VSC_VESA_SW_DP_ENCODER1_P0_FLDMASK_POS

#define BIST_FAIL_VSC_VESA_SW_DP_ENCODER1_P0_FLDMASK_POS   10

Definition at line 1928 of file dptx_reg.h.

◆ BLACK_SCREEN_ENABLE_FLDMASK

#define BLACK_SCREEN_ENABLE_FLDMASK   0x1

Definition at line 4269 of file dptx_reg.h.

◆ BLACK_SCREEN_ENABLE_FLDMASK_LEN

#define BLACK_SCREEN_ENABLE_FLDMASK_LEN   1

Definition at line 4271 of file dptx_reg.h.

◆ BLACK_SCREEN_ENABLE_FLDMASK_POS

#define BLACK_SCREEN_ENABLE_FLDMASK_POS   0

Definition at line 4270 of file dptx_reg.h.

◆ BS2BS_CNT_SW_DP_ENCODER1_P0_FLDMASK

#define BS2BS_CNT_SW_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 2225 of file dptx_reg.h.

◆ BS2BS_CNT_SW_DP_ENCODER1_P0_FLDMASK_LEN

#define BS2BS_CNT_SW_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 2227 of file dptx_reg.h.

◆ BS2BS_CNT_SW_DP_ENCODER1_P0_FLDMASK_POS

#define BS2BS_CNT_SW_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2226 of file dptx_reg.h.

◆ BS2BS_CNT_SW_SEL_DP_ENCODER1_P0_FLDMASK

#define BS2BS_CNT_SW_SEL_DP_ENCODER1_P0_FLDMASK   0x400

Definition at line 2248 of file dptx_reg.h.

◆ BS2BS_CNT_SW_SEL_DP_ENCODER1_P0_FLDMASK_LEN

#define BS2BS_CNT_SW_SEL_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2250 of file dptx_reg.h.

◆ BS2BS_CNT_SW_SEL_DP_ENCODER1_P0_FLDMASK_POS

#define BS2BS_CNT_SW_SEL_DP_ENCODER1_P0_FLDMASK_POS   10

Definition at line 2249 of file dptx_reg.h.

◆ BS2BS_MODE_DP_ENCODER1_P0_FLDMASK

#define BS2BS_MODE_DP_ENCODER1_P0_FLDMASK   0x3000

Definition at line 2037 of file dptx_reg.h.

◆ BS2BS_MODE_DP_ENCODER1_P0_FLDMASK_LEN

#define BS2BS_MODE_DP_ENCODER1_P0_FLDMASK_LEN   2

Definition at line 2039 of file dptx_reg.h.

◆ BS2BS_MODE_DP_ENCODER1_P0_FLDMASK_POS

#define BS2BS_MODE_DP_ENCODER1_P0_FLDMASK_POS   12

Definition at line 2038 of file dptx_reg.h.

◆ BS_SYMBOL_CNT_RESET_DP_ENCODER0_P0_FLDMASK

#define BS_SYMBOL_CNT_RESET_DP_ENCODER0_P0_FLDMASK   0x80

Definition at line 38 of file dptx_reg.h.

◆ BS_SYMBOL_CNT_RESET_DP_ENCODER0_P0_FLDMASK_LEN

#define BS_SYMBOL_CNT_RESET_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 40 of file dptx_reg.h.

◆ BS_SYMBOL_CNT_RESET_DP_ENCODER0_P0_FLDMASK_POS

#define BS_SYMBOL_CNT_RESET_DP_ENCODER0_P0_FLDMASK_POS   7

Definition at line 39 of file dptx_reg.h.

◆ CH_STATUS_0_DP_ENCODER0_P0_FLDMASK

#define CH_STATUS_0_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 421 of file dptx_reg.h.

◆ CH_STATUS_0_DP_ENCODER0_P0_FLDMASK_LEN

#define CH_STATUS_0_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 423 of file dptx_reg.h.

◆ CH_STATUS_0_DP_ENCODER0_P0_FLDMASK_POS

#define CH_STATUS_0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 422 of file dptx_reg.h.

◆ CH_STATUS_1_DP_ENCODER0_P0_FLDMASK

#define CH_STATUS_1_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 426 of file dptx_reg.h.

◆ CH_STATUS_1_DP_ENCODER0_P0_FLDMASK_LEN

#define CH_STATUS_1_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 428 of file dptx_reg.h.

◆ CH_STATUS_1_DP_ENCODER0_P0_FLDMASK_POS

#define CH_STATUS_1_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 427 of file dptx_reg.h.

◆ CH_STATUS_2_DP_ENCODER0_P0_FLDMASK

#define CH_STATUS_2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 431 of file dptx_reg.h.

◆ CH_STATUS_2_DP_ENCODER0_P0_FLDMASK_LEN

#define CH_STATUS_2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 433 of file dptx_reg.h.

◆ CH_STATUS_2_DP_ENCODER0_P0_FLDMASK_POS

#define CH_STATUS_2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 432 of file dptx_reg.h.

◆ CHK_TX_PH_ADJUST_CHK_EN_AUX_TX_P0_FLDMASK

#define CHK_TX_PH_ADJUST_CHK_EN_AUX_TX_P0_FLDMASK   0x1

Definition at line 3824 of file dptx_reg.h.

◆ CHK_TX_PH_ADJUST_CHK_EN_AUX_TX_P0_FLDMASK_LEN

#define CHK_TX_PH_ADJUST_CHK_EN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3826 of file dptx_reg.h.

◆ CHK_TX_PH_ADJUST_CHK_EN_AUX_TX_P0_FLDMASK_POS

#define CHK_TX_PH_ADJUST_CHK_EN_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3825 of file dptx_reg.h.

◆ CK_XTAL_AUX_TX_P0_FLDMASK

#define CK_XTAL_AUX_TX_P0_FLDMASK   0x1

Definition at line 3987 of file dptx_reg.h.

◆ CK_XTAL_AUX_TX_P0_FLDMASK_LEN

#define CK_XTAL_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3989 of file dptx_reg.h.

◆ CK_XTAL_AUX_TX_P0_FLDMASK_POS

#define CK_XTAL_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3988 of file dptx_reg.h.

◆ CK_XTAL_SW_AUX_TX_P0_FLDMASK

#define CK_XTAL_SW_AUX_TX_P0_FLDMASK   0x80

Definition at line 4015 of file dptx_reg.h.

◆ CK_XTAL_SW_AUX_TX_P0_FLDMASK_LEN

#define CK_XTAL_SW_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 4017 of file dptx_reg.h.

◆ CK_XTAL_SW_AUX_TX_P0_FLDMASK_POS

#define CK_XTAL_SW_AUX_TX_P0_FLDMASK_POS   7

Definition at line 4016 of file dptx_reg.h.

◆ CLK_AUX_MUX_DATA_EN_AUX_TX_P0_FLDMASK

#define CLK_AUX_MUX_DATA_EN_AUX_TX_P0_FLDMASK   0x1000

Definition at line 4048 of file dptx_reg.h.

◆ CLK_AUX_MUX_DATA_EN_AUX_TX_P0_FLDMASK_LEN

#define CLK_AUX_MUX_DATA_EN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 4050 of file dptx_reg.h.

◆ CLK_AUX_MUX_DATA_EN_AUX_TX_P0_FLDMASK_POS

#define CLK_AUX_MUX_DATA_EN_AUX_TX_P0_FLDMASK_POS   12

Definition at line 4049 of file dptx_reg.h.

◆ CLK_AUX_MUX_DATA_INV_AUX_TX_P0_FLDMASK

#define CLK_AUX_MUX_DATA_INV_AUX_TX_P0_FLDMASK   0x2000

Definition at line 4052 of file dptx_reg.h.

◆ CLK_AUX_MUX_DATA_INV_AUX_TX_P0_FLDMASK_LEN

#define CLK_AUX_MUX_DATA_INV_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 4054 of file dptx_reg.h.

◆ CLK_AUX_MUX_DATA_INV_AUX_TX_P0_FLDMASK_POS

#define CLK_AUX_MUX_DATA_INV_AUX_TX_P0_FLDMASK_POS   13

Definition at line 4053 of file dptx_reg.h.

◆ CLK_AUX_MUX_DATA_SEL_AUX_TX_P0_FLDMASK

#define CLK_AUX_MUX_DATA_SEL_AUX_TX_P0_FLDMASK   0xc000

Definition at line 4056 of file dptx_reg.h.

◆ CLK_AUX_MUX_DATA_SEL_AUX_TX_P0_FLDMASK_LEN

#define CLK_AUX_MUX_DATA_SEL_AUX_TX_P0_FLDMASK_LEN   2

Definition at line 4058 of file dptx_reg.h.

◆ CLK_AUX_MUX_DATA_SEL_AUX_TX_P0_FLDMASK_POS

#define CLK_AUX_MUX_DATA_SEL_AUX_TX_P0_FLDMASK_POS   14

Definition at line 4057 of file dptx_reg.h.

◆ CLK_AUX_MUX_VALID_EN_AUX_TX_P0_FLDMASK

#define CLK_AUX_MUX_VALID_EN_AUX_TX_P0_FLDMASK   0x100

Definition at line 4036 of file dptx_reg.h.

◆ CLK_AUX_MUX_VALID_EN_AUX_TX_P0_FLDMASK_LEN

#define CLK_AUX_MUX_VALID_EN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 4038 of file dptx_reg.h.

◆ CLK_AUX_MUX_VALID_EN_AUX_TX_P0_FLDMASK_POS

#define CLK_AUX_MUX_VALID_EN_AUX_TX_P0_FLDMASK_POS   8

Definition at line 4037 of file dptx_reg.h.

◆ CLK_AUX_MUX_VALID_INV_AUX_TX_P0_FLDMASK

#define CLK_AUX_MUX_VALID_INV_AUX_TX_P0_FLDMASK   0x200

Definition at line 4040 of file dptx_reg.h.

◆ CLK_AUX_MUX_VALID_INV_AUX_TX_P0_FLDMASK_LEN

#define CLK_AUX_MUX_VALID_INV_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 4042 of file dptx_reg.h.

◆ CLK_AUX_MUX_VALID_INV_AUX_TX_P0_FLDMASK_POS

#define CLK_AUX_MUX_VALID_INV_AUX_TX_P0_FLDMASK_POS   9

Definition at line 4041 of file dptx_reg.h.

◆ CLK_AUX_MUX_VALID_SEL_AUX_TX_P0_FLDMASK

#define CLK_AUX_MUX_VALID_SEL_AUX_TX_P0_FLDMASK   0xc00

Definition at line 4044 of file dptx_reg.h.

◆ CLK_AUX_MUX_VALID_SEL_AUX_TX_P0_FLDMASK_LEN

#define CLK_AUX_MUX_VALID_SEL_AUX_TX_P0_FLDMASK_LEN   2

Definition at line 4046 of file dptx_reg.h.

◆ CLK_AUX_MUX_VALID_SEL_AUX_TX_P0_FLDMASK_POS

#define CLK_AUX_MUX_VALID_SEL_AUX_TX_P0_FLDMASK_POS   10

Definition at line 4045 of file dptx_reg.h.

◆ COMPRESSEDSTREAM_FLAG_DP_ENCODER0_P0_FLDMASK

#define COMPRESSEDSTREAM_FLAG_DP_ENCODER0_P0_FLDMASK   0x200

Definition at line 97 of file dptx_reg.h.

◆ COMPRESSEDSTREAM_FLAG_DP_ENCODER0_P0_FLDMASK_LEN

#define COMPRESSEDSTREAM_FLAG_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 99 of file dptx_reg.h.

◆ COMPRESSEDSTREAM_FLAG_DP_ENCODER0_P0_FLDMASK_POS

#define COMPRESSEDSTREAM_FLAG_DP_ENCODER0_P0_FLDMASK_POS   9

Definition at line 98 of file dptx_reg.h.

◆ CP2520_PATTERN1_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN1_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK   0x100

Definition at line 2659 of file dptx_reg.h.

◆ CP2520_PATTERN1_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN1_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2661 of file dptx_reg.h.

◆ CP2520_PATTERN1_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN1_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 2660 of file dptx_reg.h.

◆ CP2520_PATTERN1_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN1_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK   0x200

Definition at line 2663 of file dptx_reg.h.

◆ CP2520_PATTERN1_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN1_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2665 of file dptx_reg.h.

◆ CP2520_PATTERN1_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN1_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS   9

Definition at line 2664 of file dptx_reg.h.

◆ CP2520_PATTERN1_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN1_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK   0x400

Definition at line 2667 of file dptx_reg.h.

◆ CP2520_PATTERN1_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN1_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2669 of file dptx_reg.h.

◆ CP2520_PATTERN1_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN1_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS   10

Definition at line 2668 of file dptx_reg.h.

◆ CP2520_PATTERN1_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN1_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK   0x800

Definition at line 2671 of file dptx_reg.h.

◆ CP2520_PATTERN1_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN1_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2673 of file dptx_reg.h.

◆ CP2520_PATTERN1_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN1_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS   11

Definition at line 2672 of file dptx_reg.h.

◆ CP2520_PATTERN1_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN1_DP_TRANS_P0_FLDMASK   0x1

Definition at line 2635 of file dptx_reg.h.

◆ CP2520_PATTERN1_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN1_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2637 of file dptx_reg.h.

◆ CP2520_PATTERN1_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN1_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2636 of file dptx_reg.h.

◆ CP2520_PATTERN1_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN1_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK   0x10

Definition at line 2643 of file dptx_reg.h.

◆ CP2520_PATTERN1_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN1_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2645 of file dptx_reg.h.

◆ CP2520_PATTERN1_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN1_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS   4

Definition at line 2644 of file dptx_reg.h.

◆ CP2520_PATTERN1_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN1_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK   0x20

Definition at line 2647 of file dptx_reg.h.

◆ CP2520_PATTERN1_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN1_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2649 of file dptx_reg.h.

◆ CP2520_PATTERN1_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN1_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS   5

Definition at line 2648 of file dptx_reg.h.

◆ CP2520_PATTERN1_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN1_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK   0x40

Definition at line 2651 of file dptx_reg.h.

◆ CP2520_PATTERN1_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN1_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2653 of file dptx_reg.h.

◆ CP2520_PATTERN1_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN1_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS   6

Definition at line 2652 of file dptx_reg.h.

◆ CP2520_PATTERN1_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN1_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK   0x80

Definition at line 2655 of file dptx_reg.h.

◆ CP2520_PATTERN1_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN1_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2657 of file dptx_reg.h.

◆ CP2520_PATTERN1_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN1_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS   7

Definition at line 2656 of file dptx_reg.h.

◆ CP2520_PATTERN2_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN2_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK   0x10

Definition at line 2692 of file dptx_reg.h.

◆ CP2520_PATTERN2_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN2_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2694 of file dptx_reg.h.

◆ CP2520_PATTERN2_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN2_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS   4

Definition at line 2693 of file dptx_reg.h.

◆ CP2520_PATTERN2_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN2_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK   0x20

Definition at line 2696 of file dptx_reg.h.

◆ CP2520_PATTERN2_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN2_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2698 of file dptx_reg.h.

◆ CP2520_PATTERN2_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN2_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS   5

Definition at line 2697 of file dptx_reg.h.

◆ CP2520_PATTERN2_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN2_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK   0x40

Definition at line 2700 of file dptx_reg.h.

◆ CP2520_PATTERN2_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN2_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2702 of file dptx_reg.h.

◆ CP2520_PATTERN2_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN2_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS   6

Definition at line 2701 of file dptx_reg.h.

◆ CP2520_PATTERN2_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN2_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK   0x80

Definition at line 2704 of file dptx_reg.h.

◆ CP2520_PATTERN2_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN2_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2706 of file dptx_reg.h.

◆ CP2520_PATTERN2_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN2_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS   7

Definition at line 2705 of file dptx_reg.h.

◆ CP2520_PATTERN2_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN2_DP_TRANS_P0_FLDMASK   0x2

Definition at line 2639 of file dptx_reg.h.

◆ CP2520_PATTERN2_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN2_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2641 of file dptx_reg.h.

◆ CP2520_PATTERN2_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN2_DP_TRANS_P0_FLDMASK_POS   1

Definition at line 2640 of file dptx_reg.h.

◆ CP2520_PATTERN2_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN2_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK   0x1

Definition at line 2676 of file dptx_reg.h.

◆ CP2520_PATTERN2_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN2_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2678 of file dptx_reg.h.

◆ CP2520_PATTERN2_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN2_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2677 of file dptx_reg.h.

◆ CP2520_PATTERN2_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN2_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK   0x2

Definition at line 2680 of file dptx_reg.h.

◆ CP2520_PATTERN2_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN2_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2682 of file dptx_reg.h.

◆ CP2520_PATTERN2_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN2_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS   1

Definition at line 2681 of file dptx_reg.h.

◆ CP2520_PATTERN2_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN2_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK   0x4

Definition at line 2684 of file dptx_reg.h.

◆ CP2520_PATTERN2_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN2_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2686 of file dptx_reg.h.

◆ CP2520_PATTERN2_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN2_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS   2

Definition at line 2685 of file dptx_reg.h.

◆ CP2520_PATTERN2_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN2_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK   0x8

Definition at line 2688 of file dptx_reg.h.

◆ CP2520_PATTERN2_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN2_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2690 of file dptx_reg.h.

◆ CP2520_PATTERN2_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN2_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS   3

Definition at line 2689 of file dptx_reg.h.

◆ CP2520_PATTERN3_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN3_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK   0x1000

Definition at line 2724 of file dptx_reg.h.

◆ CP2520_PATTERN3_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN3_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2726 of file dptx_reg.h.

◆ CP2520_PATTERN3_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN3_DCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS   12

Definition at line 2725 of file dptx_reg.h.

◆ CP2520_PATTERN3_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN3_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK   0x2000

Definition at line 2728 of file dptx_reg.h.

◆ CP2520_PATTERN3_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN3_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2730 of file dptx_reg.h.

◆ CP2520_PATTERN3_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN3_DCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS   13

Definition at line 2729 of file dptx_reg.h.

◆ CP2520_PATTERN3_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN3_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK   0x4000

Definition at line 2732 of file dptx_reg.h.

◆ CP2520_PATTERN3_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN3_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2734 of file dptx_reg.h.

◆ CP2520_PATTERN3_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN3_DCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS   14

Definition at line 2733 of file dptx_reg.h.

◆ CP2520_PATTERN3_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN3_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK   0x8000

Definition at line 2736 of file dptx_reg.h.

◆ CP2520_PATTERN3_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN3_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2738 of file dptx_reg.h.

◆ CP2520_PATTERN3_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN3_DCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS   15

Definition at line 2737 of file dptx_reg.h.

◆ CP2520_PATTERN3_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN3_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK   0x100

Definition at line 2708 of file dptx_reg.h.

◆ CP2520_PATTERN3_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN3_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2710 of file dptx_reg.h.

◆ CP2520_PATTERN3_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN3_KCODE_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 2709 of file dptx_reg.h.

◆ CP2520_PATTERN3_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN3_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK   0x200

Definition at line 2712 of file dptx_reg.h.

◆ CP2520_PATTERN3_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN3_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2714 of file dptx_reg.h.

◆ CP2520_PATTERN3_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN3_KCODE_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS   9

Definition at line 2713 of file dptx_reg.h.

◆ CP2520_PATTERN3_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN3_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK   0x400

Definition at line 2716 of file dptx_reg.h.

◆ CP2520_PATTERN3_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN3_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2718 of file dptx_reg.h.

◆ CP2520_PATTERN3_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN3_KCODE_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS   10

Definition at line 2717 of file dptx_reg.h.

◆ CP2520_PATTERN3_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK

#define CP2520_PATTERN3_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK   0x800

Definition at line 2720 of file dptx_reg.h.

◆ CP2520_PATTERN3_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN

#define CP2520_PATTERN3_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2722 of file dptx_reg.h.

◆ CP2520_PATTERN3_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS

#define CP2520_PATTERN3_KCODE_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS   11

Definition at line 2721 of file dptx_reg.h.

◆ CRC_COLOR_FORMAT_DP_ENCODER1_P0_FLDMASK

#define CRC_COLOR_FORMAT_DP_ENCODER1_P0_FLDMASK   0x1f0

Definition at line 2083 of file dptx_reg.h.

◆ CRC_COLOR_FORMAT_DP_ENCODER1_P0_FLDMASK_LEN

#define CRC_COLOR_FORMAT_DP_ENCODER1_P0_FLDMASK_LEN   5

Definition at line 2085 of file dptx_reg.h.

◆ CRC_COLOR_FORMAT_DP_ENCODER1_P0_FLDMASK_POS

#define CRC_COLOR_FORMAT_DP_ENCODER1_P0_FLDMASK_POS   4

Definition at line 2084 of file dptx_reg.h.

◆ CRC_TEST_CONFIG_DP_ENCODER1_P0_FLDMASK

#define CRC_TEST_CONFIG_DP_ENCODER1_P0_FLDMASK   0x1fff

Definition at line 2092 of file dptx_reg.h.

◆ CRC_TEST_CONFIG_DP_ENCODER1_P0_FLDMASK_LEN

#define CRC_TEST_CONFIG_DP_ENCODER1_P0_FLDMASK_LEN   13

Definition at line 2094 of file dptx_reg.h.

◆ CRC_TEST_CONFIG_DP_ENCODER1_P0_FLDMASK_POS

#define CRC_TEST_CONFIG_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2093 of file dptx_reg.h.

◆ CRC_TEST_SINK_START_DP_ENCODER1_P0_FLDMASK

#define CRC_TEST_SINK_START_DP_ENCODER1_P0_FLDMASK   0x200

Definition at line 2087 of file dptx_reg.h.

◆ CRC_TEST_SINK_START_DP_ENCODER1_P0_FLDMASK_LEN

#define CRC_TEST_SINK_START_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2089 of file dptx_reg.h.

◆ CRC_TEST_SINK_START_DP_ENCODER1_P0_FLDMASK_POS

#define CRC_TEST_SINK_START_DP_ENCODER1_P0_FLDMASK_POS   9

Definition at line 2088 of file dptx_reg.h.

◆ DATA_LOW_CNT_THRD_AUX_TX_P0_FLDMASK

#define DATA_LOW_CNT_THRD_AUX_TX_P0_FLDMASK   0x7f

Definition at line 3737 of file dptx_reg.h.

◆ DATA_LOW_CNT_THRD_AUX_TX_P0_FLDMASK_LEN

#define DATA_LOW_CNT_THRD_AUX_TX_P0_FLDMASK_LEN   7

Definition at line 3739 of file dptx_reg.h.

◆ DATA_LOW_CNT_THRD_AUX_TX_P0_FLDMASK_POS

#define DATA_LOW_CNT_THRD_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3738 of file dptx_reg.h.

◆ DATA_VALID_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK

#define DATA_VALID_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK   0x1000

Definition at line 3572 of file dptx_reg.h.

◆ DATA_VALID_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK_LEN

#define DATA_VALID_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3574 of file dptx_reg.h.

◆ DATA_VALID_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK_POS

#define DATA_VALID_DEBOUNCE_SEL_AUX_TX_P0_FLDMASK_POS   12

Definition at line 3573 of file dptx_reg.h.

◆ DE_LAST_NUM_SW_DP_ENCODER0_P0_FLDMASK

#define DE_LAST_NUM_SW_DP_ENCODER0_P0_FLDMASK   0x1000

Definition at line 1222 of file dptx_reg.h.

◆ DE_LAST_NUM_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define DE_LAST_NUM_SW_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1224 of file dptx_reg.h.

◆ DE_LAST_NUM_SW_DP_ENCODER0_P0_FLDMASK_POS

#define DE_LAST_NUM_SW_DP_ENCODER0_P0_FLDMASK_POS   12

Definition at line 1223 of file dptx_reg.h.

◆ DELSEL_0_FLDMASK

#define DELSEL_0_FLDMASK   0xfffff

Definition at line 4296 of file dptx_reg.h.

◆ DELSEL_0_FLDMASK_LEN

#define DELSEL_0_FLDMASK_LEN   20

Definition at line 4298 of file dptx_reg.h.

◆ DELSEL_0_FLDMASK_POS

#define DELSEL_0_FLDMASK_POS   0

Definition at line 4297 of file dptx_reg.h.

◆ DELSEL_10_FLDMASK

#define DELSEL_10_FLDMASK   0xfffff

Definition at line 4386 of file dptx_reg.h.

◆ DELSEL_10_FLDMASK_LEN

#define DELSEL_10_FLDMASK_LEN   20

Definition at line 4388 of file dptx_reg.h.

◆ DELSEL_10_FLDMASK_POS

#define DELSEL_10_FLDMASK_POS   0

Definition at line 4387 of file dptx_reg.h.

◆ DELSEL_11_FLDMASK

#define DELSEL_11_FLDMASK   0xfffff

Definition at line 4395 of file dptx_reg.h.

◆ DELSEL_11_FLDMASK_LEN

#define DELSEL_11_FLDMASK_LEN   20

Definition at line 4397 of file dptx_reg.h.

◆ DELSEL_11_FLDMASK_POS

#define DELSEL_11_FLDMASK_POS   0

Definition at line 4396 of file dptx_reg.h.

◆ DELSEL_12_FLDMASK

#define DELSEL_12_FLDMASK   0xfffff

Definition at line 4404 of file dptx_reg.h.

◆ DELSEL_12_FLDMASK_LEN

#define DELSEL_12_FLDMASK_LEN   20

Definition at line 4406 of file dptx_reg.h.

◆ DELSEL_12_FLDMASK_POS

#define DELSEL_12_FLDMASK_POS   0

Definition at line 4405 of file dptx_reg.h.

◆ DELSEL_1_FLDMASK

#define DELSEL_1_FLDMASK   0xfffff

Definition at line 4305 of file dptx_reg.h.

◆ DELSEL_1_FLDMASK_LEN

#define DELSEL_1_FLDMASK_LEN   20

Definition at line 4307 of file dptx_reg.h.

◆ DELSEL_1_FLDMASK_POS

#define DELSEL_1_FLDMASK_POS   0

Definition at line 4306 of file dptx_reg.h.

◆ DELSEL_2_FLDMASK

#define DELSEL_2_FLDMASK   0xfffff

Definition at line 4314 of file dptx_reg.h.

◆ DELSEL_2_FLDMASK_LEN

#define DELSEL_2_FLDMASK_LEN   20

Definition at line 4316 of file dptx_reg.h.

◆ DELSEL_2_FLDMASK_POS

#define DELSEL_2_FLDMASK_POS   0

Definition at line 4315 of file dptx_reg.h.

◆ DELSEL_3_FLDMASK

#define DELSEL_3_FLDMASK   0xfffff

Definition at line 4323 of file dptx_reg.h.

◆ DELSEL_3_FLDMASK_LEN

#define DELSEL_3_FLDMASK_LEN   20

Definition at line 4325 of file dptx_reg.h.

◆ DELSEL_3_FLDMASK_POS

#define DELSEL_3_FLDMASK_POS   0

Definition at line 4324 of file dptx_reg.h.

◆ DELSEL_4_FLDMASK

#define DELSEL_4_FLDMASK   0xfffff

Definition at line 4332 of file dptx_reg.h.

◆ DELSEL_4_FLDMASK_LEN

#define DELSEL_4_FLDMASK_LEN   20

Definition at line 4334 of file dptx_reg.h.

◆ DELSEL_4_FLDMASK_POS

#define DELSEL_4_FLDMASK_POS   0

Definition at line 4333 of file dptx_reg.h.

◆ DELSEL_5_FLDMASK

#define DELSEL_5_FLDMASK   0xfffff

Definition at line 4341 of file dptx_reg.h.

◆ DELSEL_5_FLDMASK_LEN

#define DELSEL_5_FLDMASK_LEN   20

Definition at line 4343 of file dptx_reg.h.

◆ DELSEL_5_FLDMASK_POS

#define DELSEL_5_FLDMASK_POS   0

Definition at line 4342 of file dptx_reg.h.

◆ DELSEL_6_FLDMASK

#define DELSEL_6_FLDMASK   0xfffff

Definition at line 4350 of file dptx_reg.h.

◆ DELSEL_6_FLDMASK_LEN

#define DELSEL_6_FLDMASK_LEN   20

Definition at line 4352 of file dptx_reg.h.

◆ DELSEL_6_FLDMASK_POS

#define DELSEL_6_FLDMASK_POS   0

Definition at line 4351 of file dptx_reg.h.

◆ DELSEL_7_FLDMASK

#define DELSEL_7_FLDMASK   0xfffff

Definition at line 4359 of file dptx_reg.h.

◆ DELSEL_7_FLDMASK_LEN

#define DELSEL_7_FLDMASK_LEN   20

Definition at line 4361 of file dptx_reg.h.

◆ DELSEL_7_FLDMASK_POS

#define DELSEL_7_FLDMASK_POS   0

Definition at line 4360 of file dptx_reg.h.

◆ DELSEL_8_FLDMASK

#define DELSEL_8_FLDMASK   0xfffff

Definition at line 4368 of file dptx_reg.h.

◆ DELSEL_8_FLDMASK_LEN

#define DELSEL_8_FLDMASK_LEN   20

Definition at line 4370 of file dptx_reg.h.

◆ DELSEL_8_FLDMASK_POS

#define DELSEL_8_FLDMASK_POS   0

Definition at line 4369 of file dptx_reg.h.

◆ DELSEL_9_FLDMASK

#define DELSEL_9_FLDMASK   0xfffff

Definition at line 4377 of file dptx_reg.h.

◆ DELSEL_9_FLDMASK_LEN

#define DELSEL_9_FLDMASK_LEN   20

Definition at line 4379 of file dptx_reg.h.

◆ DELSEL_9_FLDMASK_POS

#define DELSEL_9_FLDMASK_POS   0

Definition at line 4378 of file dptx_reg.h.

◆ DIS_ASP_DP_ENCODER0_P0_FLDMASK

#define DIS_ASP_DP_ENCODER0_P0_FLDMASK   0x2000

Definition at line 408 of file dptx_reg.h.

◆ DIS_ASP_DP_ENCODER0_P0_FLDMASK_LEN

#define DIS_ASP_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 410 of file dptx_reg.h.

◆ DIS_ASP_DP_ENCODER0_P0_FLDMASK_POS

#define DIS_ASP_DP_ENCODER0_P0_FLDMASK_POS   13

Definition at line 409 of file dptx_reg.h.

◆ DISCARD_UNUSED_CIPHER_DP_TRANS_P0_FLDMASK

#define DISCARD_UNUSED_CIPHER_DP_TRANS_P0_FLDMASK   0x20

Definition at line 2794 of file dptx_reg.h.

◆ DISCARD_UNUSED_CIPHER_DP_TRANS_P0_FLDMASK_LEN

#define DISCARD_UNUSED_CIPHER_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2796 of file dptx_reg.h.

◆ DISCARD_UNUSED_CIPHER_DP_TRANS_P0_FLDMASK_POS

#define DISCARD_UNUSED_CIPHER_DP_TRANS_P0_FLDMASK_POS   5

Definition at line 2795 of file dptx_reg.h.

◆ DP_AES_INCTR_H_0_DP_TRANS_P0_FLDMASK

#define DP_AES_INCTR_H_0_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2912 of file dptx_reg.h.

◆ DP_AES_INCTR_H_0_DP_TRANS_P0_FLDMASK_LEN

#define DP_AES_INCTR_H_0_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2914 of file dptx_reg.h.

◆ DP_AES_INCTR_H_0_DP_TRANS_P0_FLDMASK_POS

#define DP_AES_INCTR_H_0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2913 of file dptx_reg.h.

◆ DP_AES_INCTR_H_1_DP_TRANS_P0_FLDMASK

#define DP_AES_INCTR_H_1_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2917 of file dptx_reg.h.

◆ DP_AES_INCTR_H_1_DP_TRANS_P0_FLDMASK_LEN

#define DP_AES_INCTR_H_1_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2919 of file dptx_reg.h.

◆ DP_AES_INCTR_H_1_DP_TRANS_P0_FLDMASK_POS

#define DP_AES_INCTR_H_1_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2918 of file dptx_reg.h.

◆ DP_AES_INCTR_H_2_DP_TRANS_P0_FLDMASK

#define DP_AES_INCTR_H_2_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2922 of file dptx_reg.h.

◆ DP_AES_INCTR_H_2_DP_TRANS_P0_FLDMASK_LEN

#define DP_AES_INCTR_H_2_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2924 of file dptx_reg.h.

◆ DP_AES_INCTR_H_2_DP_TRANS_P0_FLDMASK_POS

#define DP_AES_INCTR_H_2_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2923 of file dptx_reg.h.

◆ DP_AES_INCTR_H_3_DP_TRANS_P0_FLDMASK

#define DP_AES_INCTR_H_3_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2927 of file dptx_reg.h.

◆ DP_AES_INCTR_H_3_DP_TRANS_P0_FLDMASK_LEN

#define DP_AES_INCTR_H_3_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2929 of file dptx_reg.h.

◆ DP_AES_INCTR_H_3_DP_TRANS_P0_FLDMASK_POS

#define DP_AES_INCTR_H_3_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2928 of file dptx_reg.h.

◆ DP_AES_INCTR_L_0_DP_TRANS_P0_FLDMASK

#define DP_AES_INCTR_L_0_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2845 of file dptx_reg.h.

◆ DP_AES_INCTR_L_0_DP_TRANS_P0_FLDMASK_LEN

#define DP_AES_INCTR_L_0_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2847 of file dptx_reg.h.

◆ DP_AES_INCTR_L_0_DP_TRANS_P0_FLDMASK_POS

#define DP_AES_INCTR_L_0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2846 of file dptx_reg.h.

◆ DP_AES_INCTR_L_1_DP_TRANS_P0_FLDMASK

#define DP_AES_INCTR_L_1_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2850 of file dptx_reg.h.

◆ DP_AES_INCTR_L_1_DP_TRANS_P0_FLDMASK_LEN

#define DP_AES_INCTR_L_1_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2852 of file dptx_reg.h.

◆ DP_AES_INCTR_L_1_DP_TRANS_P0_FLDMASK_POS

#define DP_AES_INCTR_L_1_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2851 of file dptx_reg.h.

◆ DP_AES_INCTR_L_2_DP_TRANS_P0_FLDMASK

#define DP_AES_INCTR_L_2_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2855 of file dptx_reg.h.

◆ DP_AES_INCTR_L_2_DP_TRANS_P0_FLDMASK_LEN

#define DP_AES_INCTR_L_2_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2857 of file dptx_reg.h.

◆ DP_AES_INCTR_L_2_DP_TRANS_P0_FLDMASK_POS

#define DP_AES_INCTR_L_2_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2856 of file dptx_reg.h.

◆ DP_AES_INCTR_L_3_DP_TRANS_P0_FLDMASK

#define DP_AES_INCTR_L_3_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2860 of file dptx_reg.h.

◆ DP_AES_INCTR_L_3_DP_TRANS_P0_FLDMASK_LEN

#define DP_AES_INCTR_L_3_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2862 of file dptx_reg.h.

◆ DP_AES_INCTR_L_3_DP_TRANS_P0_FLDMASK_POS

#define DP_AES_INCTR_L_3_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2861 of file dptx_reg.h.

◆ DP_AES_OUT_RDY_H_DP_TRANS_P0_FLDMASK

#define DP_AES_OUT_RDY_H_DP_TRANS_P0_FLDMASK   0x4000

Definition at line 2898 of file dptx_reg.h.

◆ DP_AES_OUT_RDY_H_DP_TRANS_P0_FLDMASK_LEN

#define DP_AES_OUT_RDY_H_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2900 of file dptx_reg.h.

◆ DP_AES_OUT_RDY_H_DP_TRANS_P0_FLDMASK_POS

#define DP_AES_OUT_RDY_H_DP_TRANS_P0_FLDMASK_POS   14

Definition at line 2899 of file dptx_reg.h.

◆ DP_AES_OUT_RDY_L_DP_TRANS_P0_FLDMASK

#define DP_AES_OUT_RDY_L_DP_TRANS_P0_FLDMASK   0x4000

Definition at line 2818 of file dptx_reg.h.

◆ DP_AES_OUT_RDY_L_DP_TRANS_P0_FLDMASK_LEN

#define DP_AES_OUT_RDY_L_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2820 of file dptx_reg.h.

◆ DP_AES_OUT_RDY_L_DP_TRANS_P0_FLDMASK_POS

#define DP_AES_OUT_RDY_L_DP_TRANS_P0_FLDMASK_POS   14

Definition at line 2819 of file dptx_reg.h.

◆ DP_CH1_MATRIX_DP_ENCODER1_P0_FLDMASK

#define DP_CH1_MATRIX_DP_ENCODER1_P0_FLDMASK   0x1f

Definition at line 1940 of file dptx_reg.h.

◆ DP_CH1_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN

#define DP_CH1_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN   5

Definition at line 1942 of file dptx_reg.h.

◆ DP_CH1_MATRIX_DP_ENCODER1_P0_FLDMASK_POS

#define DP_CH1_MATRIX_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1941 of file dptx_reg.h.

◆ DP_CH2_MATRIX_DP_ENCODER1_P0_FLDMASK

#define DP_CH2_MATRIX_DP_ENCODER1_P0_FLDMASK   0x1f00

Definition at line 1944 of file dptx_reg.h.

◆ DP_CH2_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN

#define DP_CH2_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN   5

Definition at line 1946 of file dptx_reg.h.

◆ DP_CH2_MATRIX_DP_ENCODER1_P0_FLDMASK_POS

#define DP_CH2_MATRIX_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1945 of file dptx_reg.h.

◆ DP_CH3_MATRIX_DP_ENCODER1_P0_FLDMASK

#define DP_CH3_MATRIX_DP_ENCODER1_P0_FLDMASK   0x1f

Definition at line 1949 of file dptx_reg.h.

◆ DP_CH3_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN

#define DP_CH3_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN   5

Definition at line 1951 of file dptx_reg.h.

◆ DP_CH3_MATRIX_DP_ENCODER1_P0_FLDMASK_POS

#define DP_CH3_MATRIX_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1950 of file dptx_reg.h.

◆ DP_CH4_MATRIX_DP_ENCODER1_P0_FLDMASK

#define DP_CH4_MATRIX_DP_ENCODER1_P0_FLDMASK   0x1f00

Definition at line 1953 of file dptx_reg.h.

◆ DP_CH4_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN

#define DP_CH4_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN   5

Definition at line 1955 of file dptx_reg.h.

◆ DP_CH4_MATRIX_DP_ENCODER1_P0_FLDMASK_POS

#define DP_CH4_MATRIX_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1954 of file dptx_reg.h.

◆ DP_CH5_MATRIX_DP_ENCODER1_P0_FLDMASK

#define DP_CH5_MATRIX_DP_ENCODER1_P0_FLDMASK   0x1f

Definition at line 1958 of file dptx_reg.h.

◆ DP_CH5_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN

#define DP_CH5_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN   5

Definition at line 1960 of file dptx_reg.h.

◆ DP_CH5_MATRIX_DP_ENCODER1_P0_FLDMASK_POS

#define DP_CH5_MATRIX_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1959 of file dptx_reg.h.

◆ DP_CH6_MATRIX_DP_ENCODER1_P0_FLDMASK

#define DP_CH6_MATRIX_DP_ENCODER1_P0_FLDMASK   0x1f00

Definition at line 1962 of file dptx_reg.h.

◆ DP_CH6_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN

#define DP_CH6_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN   5

Definition at line 1964 of file dptx_reg.h.

◆ DP_CH6_MATRIX_DP_ENCODER1_P0_FLDMASK_POS

#define DP_CH6_MATRIX_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1963 of file dptx_reg.h.

◆ DP_CH7_MATRIX_DP_ENCODER1_P0_FLDMASK

#define DP_CH7_MATRIX_DP_ENCODER1_P0_FLDMASK   0x1f

Definition at line 1967 of file dptx_reg.h.

◆ DP_CH7_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN

#define DP_CH7_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN   5

Definition at line 1969 of file dptx_reg.h.

◆ DP_CH7_MATRIX_DP_ENCODER1_P0_FLDMASK_POS

#define DP_CH7_MATRIX_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1968 of file dptx_reg.h.

◆ DP_CH8_MATRIX_DP_ENCODER1_P0_FLDMASK

#define DP_CH8_MATRIX_DP_ENCODER1_P0_FLDMASK   0x1f00

Definition at line 1971 of file dptx_reg.h.

◆ DP_CH8_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN

#define DP_CH8_MATRIX_DP_ENCODER1_P0_FLDMASK_LEN   5

Definition at line 1973 of file dptx_reg.h.

◆ DP_CH8_MATRIX_DP_ENCODER1_P0_FLDMASK_POS

#define DP_CH8_MATRIX_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1972 of file dptx_reg.h.

◆ DP_DISP_RST_FLDMASK

#define DP_DISP_RST_FLDMASK   0x8

Definition at line 4165 of file dptx_reg.h.

◆ DP_DISP_RST_FLDMASK_LEN

#define DP_DISP_RST_FLDMASK_LEN   1

Definition at line 4167 of file dptx_reg.h.

◆ DP_DISP_RST_FLDMASK_POS

#define DP_DISP_RST_FLDMASK_POS   3

Definition at line 4166 of file dptx_reg.h.

◆ DP_EN_DP_TRANS_P0_FLDMASK

#define DP_EN_DP_TRANS_P0_FLDMASK   0x1

Definition at line 2741 of file dptx_reg.h.

◆ DP_EN_DP_TRANS_P0_FLDMASK_LEN

#define DP_EN_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2743 of file dptx_reg.h.

◆ DP_EN_DP_TRANS_P0_FLDMASK_POS

#define DP_EN_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2742 of file dptx_reg.h.

◆ DP_ENCODER_DUMMY_R_0_DP_ENCODER1_P0_FLDMASK

#define DP_ENCODER_DUMMY_R_0_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 2275 of file dptx_reg.h.

◆ DP_ENCODER_DUMMY_R_0_DP_ENCODER1_P0_FLDMASK_LEN

#define DP_ENCODER_DUMMY_R_0_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 2277 of file dptx_reg.h.

◆ DP_ENCODER_DUMMY_R_0_DP_ENCODER1_P0_FLDMASK_POS

#define DP_ENCODER_DUMMY_R_0_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2276 of file dptx_reg.h.

◆ DP_ENCODER_DUMMY_R_1_DP_ENCODER1_P0_FLDMASK

#define DP_ENCODER_DUMMY_R_1_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 2280 of file dptx_reg.h.

◆ DP_ENCODER_DUMMY_R_1_DP_ENCODER1_P0_FLDMASK_LEN

#define DP_ENCODER_DUMMY_R_1_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 2282 of file dptx_reg.h.

◆ DP_ENCODER_DUMMY_R_1_DP_ENCODER1_P0_FLDMASK_POS

#define DP_ENCODER_DUMMY_R_1_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2281 of file dptx_reg.h.

◆ DP_ENCODER_DUMMY_RW_0_DP_ENCODER1_P0_FLDMASK

#define DP_ENCODER_DUMMY_RW_0_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 2265 of file dptx_reg.h.

◆ DP_ENCODER_DUMMY_RW_0_DP_ENCODER1_P0_FLDMASK_LEN

#define DP_ENCODER_DUMMY_RW_0_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 2267 of file dptx_reg.h.

◆ DP_ENCODER_DUMMY_RW_0_DP_ENCODER1_P0_FLDMASK_POS

#define DP_ENCODER_DUMMY_RW_0_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2266 of file dptx_reg.h.

◆ DP_ENCODER_DUMMY_RW_1_DP_ENCODER1_P0_FLDMASK

#define DP_ENCODER_DUMMY_RW_1_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 2270 of file dptx_reg.h.

◆ DP_ENCODER_DUMMY_RW_1_DP_ENCODER1_P0_FLDMASK_LEN

#define DP_ENCODER_DUMMY_RW_1_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 2272 of file dptx_reg.h.

◆ DP_ENCODER_DUMMY_RW_1_DP_ENCODER1_P0_FLDMASK_POS

#define DP_ENCODER_DUMMY_RW_1_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2271 of file dptx_reg.h.

◆ DP_PWR_STATE_FLDMASK

#define DP_PWR_STATE_FLDMASK   0x3

Definition at line 4157 of file dptx_reg.h.

◆ DP_PWR_STATE_FLDMASK_LEN

#define DP_PWR_STATE_FLDMASK_LEN   2

Definition at line 4159 of file dptx_reg.h.

◆ DP_PWR_STATE_FLDMASK_POS

#define DP_PWR_STATE_FLDMASK_POS   0

Definition at line 4158 of file dptx_reg.h.

◆ DP_S2P_LAUNCH_CFG_DP_ENCODER1_P0_FLDMASK

#define DP_S2P_LAUNCH_CFG_DP_ENCODER1_P0_FLDMASK   0x7f

Definition at line 1976 of file dptx_reg.h.

◆ DP_S2P_LAUNCH_CFG_DP_ENCODER1_P0_FLDMASK_LEN

#define DP_S2P_LAUNCH_CFG_DP_ENCODER1_P0_FLDMASK_LEN   7

Definition at line 1978 of file dptx_reg.h.

◆ DP_S2P_LAUNCH_CFG_DP_ENCODER1_P0_FLDMASK_POS

#define DP_S2P_LAUNCH_CFG_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1977 of file dptx_reg.h.

◆ DP_SCR_EN_DP_TRANS_P0_FLDMASK

#define DP_SCR_EN_DP_TRANS_P0_FLDMASK   0x1

Definition at line 2326 of file dptx_reg.h.

◆ DP_SCR_EN_DP_TRANS_P0_FLDMASK_LEN

#define DP_SCR_EN_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2328 of file dptx_reg.h.

◆ DP_SCR_EN_DP_TRANS_P0_FLDMASK_POS

#define DP_SCR_EN_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2327 of file dptx_reg.h.

◆ DP_SCRAMB_EN_FLDMASK

#define DP_SCRAMB_EN_FLDMASK   0x4

Definition at line 4161 of file dptx_reg.h.

◆ DP_SCRAMB_EN_FLDMASK_LEN

#define DP_SCRAMB_EN_FLDMASK_LEN   1

Definition at line 4163 of file dptx_reg.h.

◆ DP_SCRAMB_EN_FLDMASK_POS

#define DP_SCRAMB_EN_FLDMASK_POS   2

Definition at line 4162 of file dptx_reg.h.

◆ DP_TRANSMITTER_DUMMY_R_0_DP_TRANS_P0_FLDMASK

#define DP_TRANSMITTER_DUMMY_R_0_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3215 of file dptx_reg.h.

◆ DP_TRANSMITTER_DUMMY_R_0_DP_TRANS_P0_FLDMASK_LEN

#define DP_TRANSMITTER_DUMMY_R_0_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3217 of file dptx_reg.h.

◆ DP_TRANSMITTER_DUMMY_R_0_DP_TRANS_P0_FLDMASK_POS

#define DP_TRANSMITTER_DUMMY_R_0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3216 of file dptx_reg.h.

◆ DP_TRANSMITTER_DUMMY_R_1_DP_TRANS_P0_FLDMASK

#define DP_TRANSMITTER_DUMMY_R_1_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3220 of file dptx_reg.h.

◆ DP_TRANSMITTER_DUMMY_R_1_DP_TRANS_P0_FLDMASK_LEN

#define DP_TRANSMITTER_DUMMY_R_1_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3222 of file dptx_reg.h.

◆ DP_TRANSMITTER_DUMMY_R_1_DP_TRANS_P0_FLDMASK_POS

#define DP_TRANSMITTER_DUMMY_R_1_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3221 of file dptx_reg.h.

◆ DP_TRANSMITTER_DUMMY_RW_0_DP_TRANS_P0_FLDMASK

#define DP_TRANSMITTER_DUMMY_RW_0_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3205 of file dptx_reg.h.

◆ DP_TRANSMITTER_DUMMY_RW_0_DP_TRANS_P0_FLDMASK_LEN

#define DP_TRANSMITTER_DUMMY_RW_0_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3207 of file dptx_reg.h.

◆ DP_TRANSMITTER_DUMMY_RW_0_DP_TRANS_P0_FLDMASK_POS

#define DP_TRANSMITTER_DUMMY_RW_0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3206 of file dptx_reg.h.

◆ DP_TRANSMITTER_DUMMY_RW_1_DP_TRANS_P0_FLDMASK

#define DP_TRANSMITTER_DUMMY_RW_1_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3210 of file dptx_reg.h.

◆ DP_TRANSMITTER_DUMMY_RW_1_DP_TRANS_P0_FLDMASK_LEN

#define DP_TRANSMITTER_DUMMY_RW_1_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3212 of file dptx_reg.h.

◆ DP_TRANSMITTER_DUMMY_RW_1_DP_TRANS_P0_FLDMASK_POS

#define DP_TRANSMITTER_DUMMY_RW_1_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3211 of file dptx_reg.h.

◆ DP_TX0_DATAK_FLDMASK

#define DP_TX0_DATAK_FLDMASK   0xf0

Definition at line 4178 of file dptx_reg.h.

◆ DP_TX0_DATAK_FLDMASK_LEN

#define DP_TX0_DATAK_FLDMASK_LEN   4

Definition at line 4180 of file dptx_reg.h.

◆ DP_TX0_DATAK_FLDMASK_POS

#define DP_TX0_DATAK_FLDMASK_POS   4

Definition at line 4179 of file dptx_reg.h.

◆ DP_TX0_PRE_EMPH_FLDMASK

#define DP_TX0_PRE_EMPH_FLDMASK   0xc

Definition at line 4174 of file dptx_reg.h.

◆ DP_TX0_PRE_EMPH_FLDMASK_LEN

#define DP_TX0_PRE_EMPH_FLDMASK_LEN   2

Definition at line 4176 of file dptx_reg.h.

◆ DP_TX0_PRE_EMPH_FLDMASK_POS

#define DP_TX0_PRE_EMPH_FLDMASK_POS   2

Definition at line 4175 of file dptx_reg.h.

◆ DP_TX0_VOLT_SWING_FLDMASK

#define DP_TX0_VOLT_SWING_FLDMASK   0x3

Definition at line 4170 of file dptx_reg.h.

◆ DP_TX0_VOLT_SWING_FLDMASK_LEN

#define DP_TX0_VOLT_SWING_FLDMASK_LEN   2

Definition at line 4172 of file dptx_reg.h.

◆ DP_TX0_VOLT_SWING_FLDMASK_POS

#define DP_TX0_VOLT_SWING_FLDMASK_POS   0

Definition at line 4171 of file dptx_reg.h.

◆ DP_TX1_DATAK_FLDMASK

#define DP_TX1_DATAK_FLDMASK   0xf000

Definition at line 4190 of file dptx_reg.h.

◆ DP_TX1_DATAK_FLDMASK_LEN

#define DP_TX1_DATAK_FLDMASK_LEN   4

Definition at line 4192 of file dptx_reg.h.

◆ DP_TX1_DATAK_FLDMASK_POS

#define DP_TX1_DATAK_FLDMASK_POS   12

Definition at line 4191 of file dptx_reg.h.

◆ DP_TX1_PRE_EMPH_FLDMASK

#define DP_TX1_PRE_EMPH_FLDMASK   0xc00

Definition at line 4186 of file dptx_reg.h.

◆ DP_TX1_PRE_EMPH_FLDMASK_LEN

#define DP_TX1_PRE_EMPH_FLDMASK_LEN   2

Definition at line 4188 of file dptx_reg.h.

◆ DP_TX1_PRE_EMPH_FLDMASK_POS

#define DP_TX1_PRE_EMPH_FLDMASK_POS   10

Definition at line 4187 of file dptx_reg.h.

◆ DP_TX1_VOLT_SWING_FLDMASK

#define DP_TX1_VOLT_SWING_FLDMASK   0x300

Definition at line 4182 of file dptx_reg.h.

◆ DP_TX1_VOLT_SWING_FLDMASK_LEN

#define DP_TX1_VOLT_SWING_FLDMASK_LEN   2

Definition at line 4184 of file dptx_reg.h.

◆ DP_TX1_VOLT_SWING_FLDMASK_POS

#define DP_TX1_VOLT_SWING_FLDMASK_POS   8

Definition at line 4183 of file dptx_reg.h.

◆ DP_TX2_DATAK_FLDMASK

#define DP_TX2_DATAK_FLDMASK   0xf00000

Definition at line 4202 of file dptx_reg.h.

◆ DP_TX2_DATAK_FLDMASK_LEN

#define DP_TX2_DATAK_FLDMASK_LEN   4

Definition at line 4204 of file dptx_reg.h.

◆ DP_TX2_DATAK_FLDMASK_POS

#define DP_TX2_DATAK_FLDMASK_POS   20

Definition at line 4203 of file dptx_reg.h.

◆ DP_TX2_PRE_EMPH_FLDMASK

#define DP_TX2_PRE_EMPH_FLDMASK   0xc0000

Definition at line 4198 of file dptx_reg.h.

◆ DP_TX2_PRE_EMPH_FLDMASK_LEN

#define DP_TX2_PRE_EMPH_FLDMASK_LEN   2

Definition at line 4200 of file dptx_reg.h.

◆ DP_TX2_PRE_EMPH_FLDMASK_POS

#define DP_TX2_PRE_EMPH_FLDMASK_POS   18

Definition at line 4199 of file dptx_reg.h.

◆ DP_TX2_VOLT_SWING_FLDMASK

#define DP_TX2_VOLT_SWING_FLDMASK   0x30000

Definition at line 4194 of file dptx_reg.h.

◆ DP_TX2_VOLT_SWING_FLDMASK_LEN

#define DP_TX2_VOLT_SWING_FLDMASK_LEN   2

Definition at line 4196 of file dptx_reg.h.

◆ DP_TX2_VOLT_SWING_FLDMASK_POS

#define DP_TX2_VOLT_SWING_FLDMASK_POS   16

Definition at line 4195 of file dptx_reg.h.

◆ DP_TX3_DATAK_FLDMASK

#define DP_TX3_DATAK_FLDMASK   0xf0000000L

Definition at line 4214 of file dptx_reg.h.

◆ DP_TX3_DATAK_FLDMASK_LEN

#define DP_TX3_DATAK_FLDMASK_LEN   4

Definition at line 4216 of file dptx_reg.h.

◆ DP_TX3_DATAK_FLDMASK_POS

#define DP_TX3_DATAK_FLDMASK_POS   28

Definition at line 4215 of file dptx_reg.h.

◆ DP_TX3_PRE_EMPH_FLDMASK

#define DP_TX3_PRE_EMPH_FLDMASK   0xc000000

Definition at line 4210 of file dptx_reg.h.

◆ DP_TX3_PRE_EMPH_FLDMASK_LEN

#define DP_TX3_PRE_EMPH_FLDMASK_LEN   2

Definition at line 4212 of file dptx_reg.h.

◆ DP_TX3_PRE_EMPH_FLDMASK_POS

#define DP_TX3_PRE_EMPH_FLDMASK_POS   26

Definition at line 4211 of file dptx_reg.h.

◆ DP_TX3_VOLT_SWING_FLDMASK

#define DP_TX3_VOLT_SWING_FLDMASK   0x3000000

Definition at line 4206 of file dptx_reg.h.

◆ DP_TX3_VOLT_SWING_FLDMASK_LEN

#define DP_TX3_VOLT_SWING_FLDMASK_LEN   2

Definition at line 4208 of file dptx_reg.h.

◆ DP_TX3_VOLT_SWING_FLDMASK_POS

#define DP_TX3_VOLT_SWING_FLDMASK_POS   24

Definition at line 4207 of file dptx_reg.h.

◆ DP_TX_ENCODER_4P_RESET_SW_DP_ENCODER0_P0_FLDMASK

#define DP_TX_ENCODER_4P_RESET_SW_DP_ENCODER0_P0_FLDMASK   0x200

Definition at line 55 of file dptx_reg.h.

◆ DP_TX_ENCODER_4P_RESET_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define DP_TX_ENCODER_4P_RESET_SW_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 57 of file dptx_reg.h.

◆ DP_TX_ENCODER_4P_RESET_SW_DP_ENCODER0_P0_FLDMASK_POS

#define DP_TX_ENCODER_4P_RESET_SW_DP_ENCODER0_P0_FLDMASK_POS   9

Definition at line 56 of file dptx_reg.h.

◆ DP_TX_ENCODER_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK

#define DP_TX_ENCODER_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK   0x60

Definition at line 2114 of file dptx_reg.h.

◆ DP_TX_ENCODER_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_LEN

#define DP_TX_ENCODER_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_LEN   2

Definition at line 2116 of file dptx_reg.h.

◆ DP_TX_ENCODER_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_POS

#define DP_TX_ENCODER_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_POS   5

Definition at line 2115 of file dptx_reg.h.

◆ DP_TX_INT_CLR_AUX_TX_P0_FLDMASK

#define DP_TX_INT_CLR_AUX_TX_P0_FLDMASK   0xffff

Definition at line 3587 of file dptx_reg.h.

◆ DP_TX_INT_CLR_AUX_TX_P0_FLDMASK_LEN

#define DP_TX_INT_CLR_AUX_TX_P0_FLDMASK_LEN   16

Definition at line 3589 of file dptx_reg.h.

◆ DP_TX_INT_CLR_AUX_TX_P0_FLDMASK_POS

#define DP_TX_INT_CLR_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3588 of file dptx_reg.h.

◆ DP_TX_INT_FORCE_AUX_TX_P0_FLDMASK

#define DP_TX_INT_FORCE_AUX_TX_P0_FLDMASK   0xffff

Definition at line 3582 of file dptx_reg.h.

◆ DP_TX_INT_FORCE_AUX_TX_P0_FLDMASK_LEN

#define DP_TX_INT_FORCE_AUX_TX_P0_FLDMASK_LEN   16

Definition at line 3584 of file dptx_reg.h.

◆ DP_TX_INT_FORCE_AUX_TX_P0_FLDMASK_POS

#define DP_TX_INT_FORCE_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3583 of file dptx_reg.h.

◆ DP_TX_INT_MASK_AUX_TX_P0_FLDMASK

#define DP_TX_INT_MASK_AUX_TX_P0_FLDMASK   0xffff

Definition at line 3577 of file dptx_reg.h.

◆ DP_TX_INT_MASK_AUX_TX_P0_FLDMASK_LEN

#define DP_TX_INT_MASK_AUX_TX_P0_FLDMASK_LEN   16

Definition at line 3579 of file dptx_reg.h.

◆ DP_TX_INT_MASK_AUX_TX_P0_FLDMASK_POS

#define DP_TX_INT_MASK_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3578 of file dptx_reg.h.

◆ DP_TX_INT_STATUS_AUX_TX_P0_FLDMASK

#define DP_TX_INT_STATUS_AUX_TX_P0_FLDMASK   0xffff

Definition at line 3271 of file dptx_reg.h.

◆ DP_TX_INT_STATUS_AUX_TX_P0_FLDMASK_LEN

#define DP_TX_INT_STATUS_AUX_TX_P0_FLDMASK_LEN   16

Definition at line 3273 of file dptx_reg.h.

◆ DP_TX_INT_STATUS_AUX_TX_P0_FLDMASK_POS

#define DP_TX_INT_STATUS_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3272 of file dptx_reg.h.

◆ DP_TX_MIXER_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK

#define DP_TX_MIXER_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK   0xf00

Definition at line 2101 of file dptx_reg.h.

◆ DP_TX_MIXER_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_LEN

#define DP_TX_MIXER_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_LEN   4

Definition at line 2103 of file dptx_reg.h.

◆ DP_TX_MIXER_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_POS

#define DP_TX_MIXER_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 2102 of file dptx_reg.h.

◆ DP_TX_MUX_DP_ENCODER0_P0_FLDMASK

#define DP_TX_MUX_DP_ENCODER0_P0_FLDMASK   0x4000

Definition at line 75 of file dptx_reg.h.

◆ DP_TX_MUX_DP_ENCODER0_P0_FLDMASK_LEN

#define DP_TX_MUX_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 77 of file dptx_reg.h.

◆ DP_TX_MUX_DP_ENCODER0_P0_FLDMASK_POS

#define DP_TX_MUX_DP_ENCODER0_P0_FLDMASK_POS   14

Definition at line 76 of file dptx_reg.h.

◆ DP_TX_SDP_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK

#define DP_TX_SDP_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK   0xf000

Definition at line 2105 of file dptx_reg.h.

◆ DP_TX_SDP_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_LEN

#define DP_TX_SDP_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_LEN   4

Definition at line 2107 of file dptx_reg.h.

◆ DP_TX_SDP_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_POS

#define DP_TX_SDP_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_POS   12

Definition at line 2106 of file dptx_reg.h.

◆ DP_TX_SECURE_ACC_FAIL

#define DP_TX_SECURE_ACC_FAIL   (SEC_OFFSET + 0xf0)

Definition at line 4618 of file dptx_reg.h.

◆ DP_TX_SECURE_REG0

#define DP_TX_SECURE_REG0   (SEC_OFFSET + 0x00)

Definition at line 4421 of file dptx_reg.h.

◆ DP_TX_SECURE_REG1

#define DP_TX_SECURE_REG1   (SEC_OFFSET + 0x04)

Definition at line 4426 of file dptx_reg.h.

◆ DP_TX_SECURE_REG10

#define DP_TX_SECURE_REG10   (SEC_OFFSET + 0x28)

Definition at line 4471 of file dptx_reg.h.

◆ DP_TX_SECURE_REG11

#define DP_TX_SECURE_REG11   (SEC_OFFSET + 0x2C)

Definition at line 4476 of file dptx_reg.h.

◆ DP_TX_SECURE_REG12

#define DP_TX_SECURE_REG12   (SEC_OFFSET + 0x30)

Definition at line 4525 of file dptx_reg.h.

◆ DP_TX_SECURE_REG13

#define DP_TX_SECURE_REG13   (SEC_OFFSET + 0x34)

Definition at line 4542 of file dptx_reg.h.

◆ DP_TX_SECURE_REG14

#define DP_TX_SECURE_REG14   (SEC_OFFSET + 0x38)

Definition at line 4559 of file dptx_reg.h.

◆ DP_TX_SECURE_REG15

#define DP_TX_SECURE_REG15   (SEC_OFFSET + 0x3C)

Definition at line 4576 of file dptx_reg.h.

◆ DP_TX_SECURE_REG2

#define DP_TX_SECURE_REG2   (SEC_OFFSET + 0x08)

Definition at line 4431 of file dptx_reg.h.

◆ DP_TX_SECURE_REG3

#define DP_TX_SECURE_REG3   (SEC_OFFSET + 0x0c)

Definition at line 4436 of file dptx_reg.h.

◆ DP_TX_SECURE_REG4

#define DP_TX_SECURE_REG4   (SEC_OFFSET + 0x10)

Definition at line 4441 of file dptx_reg.h.

◆ DP_TX_SECURE_REG5

#define DP_TX_SECURE_REG5   (SEC_OFFSET + 0x14)

Definition at line 4446 of file dptx_reg.h.

◆ DP_TX_SECURE_REG6

#define DP_TX_SECURE_REG6   (SEC_OFFSET + 0x18)

Definition at line 4451 of file dptx_reg.h.

◆ DP_TX_SECURE_REG7

#define DP_TX_SECURE_REG7   (SEC_OFFSET + 0x1C)

Definition at line 4456 of file dptx_reg.h.

◆ DP_TX_SECURE_REG8

#define DP_TX_SECURE_REG8   (SEC_OFFSET + 0x20)

Definition at line 4461 of file dptx_reg.h.

◆ DP_TX_SECURE_REG9

#define DP_TX_SECURE_REG9   (SEC_OFFSET + 0x24)

Definition at line 4466 of file dptx_reg.h.

◆ DP_TX_SECURE_STATUS_0

#define DP_TX_SECURE_STATUS_0   (SEC_OFFSET + 0x80)

Definition at line 4593 of file dptx_reg.h.

◆ DP_TX_SECURE_STATUS_1

#define DP_TX_SECURE_STATUS_1   (SEC_OFFSET + 0x84)

Definition at line 4598 of file dptx_reg.h.

◆ DP_TX_SECURE_STATUS_2

#define DP_TX_SECURE_STATUS_2   (SEC_OFFSET + 0x88)

Definition at line 4603 of file dptx_reg.h.

◆ DP_TX_SECURE_STATUS_3

#define DP_TX_SECURE_STATUS_3   (SEC_OFFSET + 0x8C)

Definition at line 4608 of file dptx_reg.h.

◆ DP_TX_SECURE_STATUS_4

#define DP_TX_SECURE_STATUS_4   (SEC_OFFSET + 0x90)

Definition at line 4613 of file dptx_reg.h.

◆ DP_TX_SW_RESET_AUX_TX_P0_FLDMASK

#define DP_TX_SW_RESET_AUX_TX_P0_FLDMASK   0x1

Definition at line 3225 of file dptx_reg.h.

◆ DP_TX_SW_RESET_AUX_TX_P0_FLDMASK_LEN

#define DP_TX_SW_RESET_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3227 of file dptx_reg.h.

◆ DP_TX_SW_RESET_AUX_TX_P0_FLDMASK_POS

#define DP_TX_SW_RESET_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3226 of file dptx_reg.h.

◆ DP_TX_TESTBUS_SEL_AUX_TX_P0_FLDMASK

#define DP_TX_TESTBUS_SEL_AUX_TX_P0_FLDMASK   0xff

Definition at line 3266 of file dptx_reg.h.

◆ DP_TX_TESTBUS_SEL_AUX_TX_P0_FLDMASK_LEN

#define DP_TX_TESTBUS_SEL_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3268 of file dptx_reg.h.

◆ DP_TX_TESTBUS_SEL_AUX_TX_P0_FLDMASK_POS

#define DP_TX_TESTBUS_SEL_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3267 of file dptx_reg.h.

◆ DP_TX_TOP_APB_WSTRB

#define DP_TX_TOP_APB_WSTRB   (TOP_OFFSET + 0x10)

Definition at line 4218 of file dptx_reg.h.

◆ DP_TX_TOP_BLACK_SCREEN

#define DP_TX_TOP_BLACK_SCREEN   (TOP_OFFSET + 0x30)

Definition at line 4268 of file dptx_reg.h.

◆ DP_TX_TOP_IRQ_MASK

#define DP_TX_TOP_IRQ_MASK   (TOP_OFFSET + 0x2C)

Definition at line 4259 of file dptx_reg.h.

◆ DP_TX_TOP_IRQ_STATUS

#define DP_TX_TOP_IRQ_STATUS   (TOP_OFFSET + 0x28)

Definition at line 4254 of file dptx_reg.h.

◆ DP_TX_TOP_MBIST_PREFUSE

#define DP_TX_TOP_MBIST_PREFUSE   (TOP_OFFSET + 0x3C)

Definition at line 4290 of file dptx_reg.h.

◆ DP_TX_TOP_MEM_DELSEL_0

#define DP_TX_TOP_MEM_DELSEL_0   (TOP_OFFSET + 0x40)

Definition at line 4295 of file dptx_reg.h.

◆ DP_TX_TOP_MEM_DELSEL_1

#define DP_TX_TOP_MEM_DELSEL_1   (TOP_OFFSET + 0x44)

Definition at line 4304 of file dptx_reg.h.

◆ DP_TX_TOP_MEM_DELSEL_10

#define DP_TX_TOP_MEM_DELSEL_10   (TOP_OFFSET + 0x68)

Definition at line 4385 of file dptx_reg.h.

◆ DP_TX_TOP_MEM_DELSEL_11

#define DP_TX_TOP_MEM_DELSEL_11   (TOP_OFFSET + 0x6C)

Definition at line 4394 of file dptx_reg.h.

◆ DP_TX_TOP_MEM_DELSEL_12

#define DP_TX_TOP_MEM_DELSEL_12   (TOP_OFFSET + 0x70)

Definition at line 4403 of file dptx_reg.h.

◆ DP_TX_TOP_MEM_DELSEL_2

#define DP_TX_TOP_MEM_DELSEL_2   (TOP_OFFSET + 0x48)

Definition at line 4313 of file dptx_reg.h.

◆ DP_TX_TOP_MEM_DELSEL_3

#define DP_TX_TOP_MEM_DELSEL_3   (TOP_OFFSET + 0x4C)

Definition at line 4322 of file dptx_reg.h.

◆ DP_TX_TOP_MEM_DELSEL_4

#define DP_TX_TOP_MEM_DELSEL_4   (TOP_OFFSET + 0x50)

Definition at line 4331 of file dptx_reg.h.

◆ DP_TX_TOP_MEM_DELSEL_5

#define DP_TX_TOP_MEM_DELSEL_5   (TOP_OFFSET + 0x54)

Definition at line 4340 of file dptx_reg.h.

◆ DP_TX_TOP_MEM_DELSEL_6

#define DP_TX_TOP_MEM_DELSEL_6   (TOP_OFFSET + 0x58)

Definition at line 4349 of file dptx_reg.h.

◆ DP_TX_TOP_MEM_DELSEL_7

#define DP_TX_TOP_MEM_DELSEL_7   (TOP_OFFSET + 0x5C)

Definition at line 4358 of file dptx_reg.h.

◆ DP_TX_TOP_MEM_DELSEL_8

#define DP_TX_TOP_MEM_DELSEL_8   (TOP_OFFSET + 0x60)

Definition at line 4367 of file dptx_reg.h.

◆ DP_TX_TOP_MEM_DELSEL_9

#define DP_TX_TOP_MEM_DELSEL_9   (TOP_OFFSET + 0x64)

Definition at line 4376 of file dptx_reg.h.

◆ DP_TX_TOP_MEM_PD

#define DP_TX_TOP_MEM_PD   (TOP_OFFSET + 0x38)

Definition at line 4273 of file dptx_reg.h.

◆ DP_TX_TOP_PWR_ACK

#define DP_TX_TOP_PWR_ACK   (TOP_OFFSET + 0x80)

Definition at line 4412 of file dptx_reg.h.

◆ DP_TX_TOP_PWR_STATE

#define DP_TX_TOP_PWR_STATE   (TOP_OFFSET + 0x00)

Definition at line 4156 of file dptx_reg.h.

◆ DP_TX_TOP_RESERVED

#define DP_TX_TOP_RESERVED   (TOP_OFFSET + 0x14)

Definition at line 4227 of file dptx_reg.h.

◆ DP_TX_TOP_RESET_AND_PROBE

#define DP_TX_TOP_RESET_AND_PROBE   (TOP_OFFSET + 0x20)

Definition at line 4232 of file dptx_reg.h.

◆ DP_TX_TOP_SOFT_PROBE

#define DP_TX_TOP_SOFT_PROBE   (TOP_OFFSET + 0x24)

Definition at line 4249 of file dptx_reg.h.

◆ DP_TX_TOP_SWING_EMP

#define DP_TX_TOP_SWING_EMP   (TOP_OFFSET + 0x04)

Definition at line 4169 of file dptx_reg.h.

◆ DP_TX_TRANS_TESTBUS_SEL_DP_TRANS_P0_FLDMASK

#define DP_TX_TRANS_TESTBUS_SEL_DP_TRANS_P0_FLDMASK   0x1f

Definition at line 3089 of file dptx_reg.h.

◆ DP_TX_TRANS_TESTBUS_SEL_DP_TRANS_P0_FLDMASK_LEN

#define DP_TX_TRANS_TESTBUS_SEL_DP_TRANS_P0_FLDMASK_LEN   5

Definition at line 3091 of file dptx_reg.h.

◆ DP_TX_TRANS_TESTBUS_SEL_DP_TRANS_P0_FLDMASK_POS

#define DP_TX_TRANS_TESTBUS_SEL_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3090 of file dptx_reg.h.

◆ DP_TX_TRANSMITTER_4P_RESET_SW_DP_TRANS_P0_FLDMASK

#define DP_TX_TRANSMITTER_4P_RESET_SW_DP_TRANS_P0_FLDMASK   0x2000

Definition at line 2408 of file dptx_reg.h.

◆ DP_TX_TRANSMITTER_4P_RESET_SW_DP_TRANS_P0_FLDMASK_LEN

#define DP_TX_TRANSMITTER_4P_RESET_SW_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2410 of file dptx_reg.h.

◆ DP_TX_TRANSMITTER_4P_RESET_SW_DP_TRANS_P0_FLDMASK_POS

#define DP_TX_TRANSMITTER_4P_RESET_SW_DP_TRANS_P0_FLDMASK_POS   13

Definition at line 2409 of file dptx_reg.h.

◆ DP_TX_TRANSMITTER_4P_RESET_SW_SECURE_FLDMASK

#define DP_TX_TRANSMITTER_4P_RESET_SW_SECURE_FLDMASK   0x1

Definition at line 4477 of file dptx_reg.h.

◆ DP_TX_TRANSMITTER_4P_RESET_SW_SECURE_FLDMASK_LEN

#define DP_TX_TRANSMITTER_4P_RESET_SW_SECURE_FLDMASK_LEN   1

Definition at line 4479 of file dptx_reg.h.

◆ DP_TX_TRANSMITTER_4P_RESET_SW_SECURE_FLDMASK_POS

#define DP_TX_TRANSMITTER_4P_RESET_SW_SECURE_FLDMASK_POS   0

Definition at line 4478 of file dptx_reg.h.

◆ DP_TX_VIDEO_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK

#define DP_TX_VIDEO_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK   0x1f

Definition at line 2110 of file dptx_reg.h.

◆ DP_TX_VIDEO_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_LEN

#define DP_TX_VIDEO_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_LEN   5

Definition at line 2112 of file dptx_reg.h.

◆ DP_TX_VIDEO_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_POS

#define DP_TX_VIDEO_TESTBUS_SEL_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2111 of file dptx_reg.h.

◆ DPCD_00000

#define DPCD_00000   0x00000

Definition at line 4623 of file dptx_reg.h.

◆ DPCD_00001

#define DPCD_00001   0x00001

Definition at line 4624 of file dptx_reg.h.

◆ DPCD_00002

#define DPCD_00002   0x00002

Definition at line 4625 of file dptx_reg.h.

◆ DPCD_00003

#define DPCD_00003   0x00003

Definition at line 4626 of file dptx_reg.h.

◆ DPCD_00004

#define DPCD_00004   0x00004

Definition at line 4627 of file dptx_reg.h.

◆ DPCD_00005

#define DPCD_00005   0x00005

Definition at line 4628 of file dptx_reg.h.

◆ DPCD_0000A

#define DPCD_0000A   0x0000A

Definition at line 4629 of file dptx_reg.h.

◆ DPCD_0000E

#define DPCD_0000E   0x0000E

Definition at line 4630 of file dptx_reg.h.

◆ DPCD_00021

#define DPCD_00021   0x00021

Definition at line 4631 of file dptx_reg.h.

◆ DPCD_00030

#define DPCD_00030   0x00030

Definition at line 4632 of file dptx_reg.h.

◆ DPCD_00060

#define DPCD_00060   0x00060

Definition at line 4633 of file dptx_reg.h.

◆ DPCD_00080

#define DPCD_00080   0x00080

Definition at line 4634 of file dptx_reg.h.

◆ DPCD_00090

#define DPCD_00090   0x00090

Definition at line 4635 of file dptx_reg.h.

◆ DPCD_00100

#define DPCD_00100   0x00100

Definition at line 4636 of file dptx_reg.h.

◆ DPCD_00101

#define DPCD_00101   0x00101

Definition at line 4637 of file dptx_reg.h.

◆ DPCD_00102

#define DPCD_00102   0x00102

Definition at line 4638 of file dptx_reg.h.

◆ DPCD_00103

#define DPCD_00103   0x00103

Definition at line 4639 of file dptx_reg.h.

◆ DPCD_00104

#define DPCD_00104   0x00104

Definition at line 4640 of file dptx_reg.h.

◆ DPCD_00105

#define DPCD_00105   0x00105

Definition at line 4641 of file dptx_reg.h.

◆ DPCD_00106

#define DPCD_00106   0x00106

Definition at line 4642 of file dptx_reg.h.

◆ DPCD_00107

#define DPCD_00107   0x00107

Definition at line 4643 of file dptx_reg.h.

◆ DPCD_00111

#define DPCD_00111   0x00111

Definition at line 4644 of file dptx_reg.h.

◆ DPCD_00120

#define DPCD_00120   0x00120

Definition at line 4645 of file dptx_reg.h.

◆ DPCD_00160

#define DPCD_00160   0x00160

Definition at line 4646 of file dptx_reg.h.

◆ DPCD_001A1

#define DPCD_001A1   0x001A1

Definition at line 4647 of file dptx_reg.h.

◆ DPCD_001C0

#define DPCD_001C0   0x001C0

Definition at line 4648 of file dptx_reg.h.

◆ DPCD_00200

#define DPCD_00200   0x00200

Definition at line 4649 of file dptx_reg.h.

◆ DPCD_00201

#define DPCD_00201   0x00201

Definition at line 4650 of file dptx_reg.h.

◆ DPCD_00202

#define DPCD_00202   0x00202

Definition at line 4651 of file dptx_reg.h.

◆ DPCD_00203

#define DPCD_00203   0x00203

Definition at line 4652 of file dptx_reg.h.

◆ DPCD_00204

#define DPCD_00204   0x00204

Definition at line 4653 of file dptx_reg.h.

◆ DPCD_00205

#define DPCD_00205   0x00205

Definition at line 4654 of file dptx_reg.h.

◆ DPCD_00206

#define DPCD_00206   0x00206

Definition at line 4655 of file dptx_reg.h.

◆ DPCD_00210

#define DPCD_00210   0x00210

Definition at line 4656 of file dptx_reg.h.

◆ DPCD_00218

#define DPCD_00218   0x00218

Definition at line 4657 of file dptx_reg.h.

◆ DPCD_00219

#define DPCD_00219   0x00219

Definition at line 4658 of file dptx_reg.h.

◆ DPCD_00220

#define DPCD_00220   0x00220

Definition at line 4659 of file dptx_reg.h.

◆ DPCD_00230

#define DPCD_00230   0x00230

Definition at line 4660 of file dptx_reg.h.

◆ DPCD_00250

#define DPCD_00250   0x00250

Definition at line 4661 of file dptx_reg.h.

◆ DPCD_00260

#define DPCD_00260   0x00260

Definition at line 4662 of file dptx_reg.h.

◆ DPCD_00261

#define DPCD_00261   0x00261

Definition at line 4663 of file dptx_reg.h.

◆ DPCD_00271

#define DPCD_00271   0x00271

Definition at line 4664 of file dptx_reg.h.

◆ DPCD_00280

#define DPCD_00280   0x00280

Definition at line 4665 of file dptx_reg.h.

◆ DPCD_00281

#define DPCD_00281   0x00281

Definition at line 4666 of file dptx_reg.h.

◆ DPCD_00282

#define DPCD_00282   0x00282

Definition at line 4667 of file dptx_reg.h.

◆ DPCD_002C0

#define DPCD_002C0   0x002C0

Definition at line 4668 of file dptx_reg.h.

◆ DPCD_00600

#define DPCD_00600   0x00600

Definition at line 4669 of file dptx_reg.h.

◆ DPCD_01000

#define DPCD_01000   0x01000

Definition at line 4670 of file dptx_reg.h.

◆ DPCD_01200

#define DPCD_01200   0x01200

Definition at line 4671 of file dptx_reg.h.

◆ DPCD_01400

#define DPCD_01400   0x01400

Definition at line 4672 of file dptx_reg.h.

◆ DPCD_01600

#define DPCD_01600   0x01600

Definition at line 4673 of file dptx_reg.h.

◆ DPCD_02002

#define DPCD_02002   0x02002

Definition at line 4674 of file dptx_reg.h.

◆ DPCD_02003

#define DPCD_02003   0x02003

Definition at line 4675 of file dptx_reg.h.

◆ DPCD_0200C

#define DPCD_0200C   0x0200C

Definition at line 4676 of file dptx_reg.h.

◆ DPCD_0200D

#define DPCD_0200D   0x0200D

Definition at line 4677 of file dptx_reg.h.

◆ DPCD_0200E

#define DPCD_0200E   0x0200E

Definition at line 4678 of file dptx_reg.h.

◆ DPCD_0200F

#define DPCD_0200F   0x0200F

Definition at line 4679 of file dptx_reg.h.

◆ DPCD_02200

#define DPCD_02200   0x02200

Definition at line 4680 of file dptx_reg.h.

◆ DPCD_02201

#define DPCD_02201   0x02201

Definition at line 4681 of file dptx_reg.h.

◆ DPCD_02202

#define DPCD_02202   0x02202

Definition at line 4682 of file dptx_reg.h.

◆ DPCD_02203

#define DPCD_02203   0x02203

Definition at line 4683 of file dptx_reg.h.

◆ DPCD_02204

#define DPCD_02204   0x02204

Definition at line 4684 of file dptx_reg.h.

◆ DPCD_02205

#define DPCD_02205   0x02205

Definition at line 4685 of file dptx_reg.h.

◆ DPCD_02206

#define DPCD_02206   0x02206

Definition at line 4686 of file dptx_reg.h.

◆ DPCD_02207

#define DPCD_02207   0x02207

Definition at line 4687 of file dptx_reg.h.

◆ DPCD_02208

#define DPCD_02208   0x02208

Definition at line 4688 of file dptx_reg.h.

◆ DPCD_02209

#define DPCD_02209   0x02209

Definition at line 4689 of file dptx_reg.h.

◆ DPCD_0220A

#define DPCD_0220A   0x0220A

Definition at line 4690 of file dptx_reg.h.

◆ DPCD_0220B

#define DPCD_0220B   0x0220B

Definition at line 4691 of file dptx_reg.h.

◆ DPCD_0220C

#define DPCD_0220C   0x0220C

Definition at line 4692 of file dptx_reg.h.

◆ DPCD_0220D

#define DPCD_0220D   0x0220D

Definition at line 4693 of file dptx_reg.h.

◆ DPCD_0220E

#define DPCD_0220E   0x0220E

Definition at line 4694 of file dptx_reg.h.

◆ DPCD_0220F

#define DPCD_0220F   0x0220F

Definition at line 4695 of file dptx_reg.h.

◆ DPCD_02210

#define DPCD_02210   0x02210

Definition at line 4696 of file dptx_reg.h.

◆ DPCD_02211

#define DPCD_02211   0x02211

Definition at line 4697 of file dptx_reg.h.

◆ DPCD_68000

#define DPCD_68000   0x68000

Definition at line 4698 of file dptx_reg.h.

◆ DPCD_68005

#define DPCD_68005   0x68005

Definition at line 4699 of file dptx_reg.h.

◆ DPCD_68007

#define DPCD_68007   0x68007

Definition at line 4700 of file dptx_reg.h.

◆ DPCD_6800C

#define DPCD_6800C   0x6800C

Definition at line 4701 of file dptx_reg.h.

◆ DPCD_68014

#define DPCD_68014   0x68014

Definition at line 4702 of file dptx_reg.h.

◆ DPCD_68018

#define DPCD_68018   0x68018

Definition at line 4703 of file dptx_reg.h.

◆ DPCD_6801C

#define DPCD_6801C   0x6801C

Definition at line 4704 of file dptx_reg.h.

◆ DPCD_68020

#define DPCD_68020   0x68020

Definition at line 4705 of file dptx_reg.h.

◆ DPCD_68024

#define DPCD_68024   0x68024

Definition at line 4706 of file dptx_reg.h.

◆ DPCD_68028

#define DPCD_68028   0x68028

Definition at line 4707 of file dptx_reg.h.

◆ DPCD_68029

#define DPCD_68029   0x68029

Definition at line 4708 of file dptx_reg.h.

◆ DPCD_6802A

#define DPCD_6802A   0x6802A

Definition at line 4709 of file dptx_reg.h.

◆ DPCD_6802C

#define DPCD_6802C   0x6802C

Definition at line 4710 of file dptx_reg.h.

◆ DPCD_6803B

#define DPCD_6803B   0x6803B

Definition at line 4711 of file dptx_reg.h.

◆ DPCD_69000

#define DPCD_69000   0x69000

Definition at line 4713 of file dptx_reg.h.

◆ DPCD_69008

#define DPCD_69008   0x69008

Definition at line 4714 of file dptx_reg.h.

◆ DPCD_6900B

#define DPCD_6900B   0x6900B

Definition at line 4715 of file dptx_reg.h.

◆ DPCD_69215

#define DPCD_69215   0x69215

Definition at line 4716 of file dptx_reg.h.

◆ DPCD_6921D [1/2]

#define DPCD_6921D   0x6921D

Definition at line 4717 of file dptx_reg.h.

◆ DPCD_6921D [2/2]

#define DPCD_6921D   0x6921D

Definition at line 4717 of file dptx_reg.h.

◆ DPCD_69220

#define DPCD_69220   0x69220

Definition at line 4718 of file dptx_reg.h.

◆ DPCD_692A0

#define DPCD_692A0   0x692A0

Definition at line 4719 of file dptx_reg.h.

◆ DPCD_692B0

#define DPCD_692B0   0x692B0

Definition at line 4720 of file dptx_reg.h.

◆ DPCD_692C0

#define DPCD_692C0   0x692C0

Definition at line 4721 of file dptx_reg.h.

◆ DPCD_692E0

#define DPCD_692E0   0x692E0

Definition at line 4722 of file dptx_reg.h.

◆ DPCD_692F0

#define DPCD_692F0   0x692F0

Definition at line 4723 of file dptx_reg.h.

◆ DPCD_692F8

#define DPCD_692F8   0x692F8

Definition at line 4724 of file dptx_reg.h.

◆ DPCD_69318

#define DPCD_69318   0x69318

Definition at line 4725 of file dptx_reg.h.

◆ DPCD_69328

#define DPCD_69328   0x69328

Definition at line 4726 of file dptx_reg.h.

◆ DPCD_69330

#define DPCD_69330   0x69330

Definition at line 4727 of file dptx_reg.h.

◆ DPCD_69332

#define DPCD_69332   0x69332

Definition at line 4728 of file dptx_reg.h.

◆ DPCD_69335

#define DPCD_69335   0x69335

Definition at line 4729 of file dptx_reg.h.

◆ DPCD_69345

#define DPCD_69345   0x69345

Definition at line 4730 of file dptx_reg.h.

◆ DPCD_693E0

#define DPCD_693E0   0x693E0

Definition at line 4731 of file dptx_reg.h.

◆ DPCD_693F0

#define DPCD_693F0   0x693F0

Definition at line 4732 of file dptx_reg.h.

◆ DPCD_693F3

#define DPCD_693F3   0x693F3

Definition at line 4733 of file dptx_reg.h.

◆ DPCD_693F5

#define DPCD_693F5   0x693F5

Definition at line 4734 of file dptx_reg.h.

◆ DPCD_69473

#define DPCD_69473   0x69473

Definition at line 4735 of file dptx_reg.h.

◆ DPCD_69493

#define DPCD_69493   0x69493

Definition at line 4736 of file dptx_reg.h.

◆ DPCD_69494

#define DPCD_69494   0x69494

Definition at line 4737 of file dptx_reg.h.

◆ DPCD_69518

#define DPCD_69518   0x69518

Definition at line 4738 of file dptx_reg.h.

◆ DPES_TX_HDCP22_DP_TRANS_P0_FLDMASK

#define DPES_TX_HDCP22_DP_TRANS_P0_FLDMASK   0x2000

Definition at line 2814 of file dptx_reg.h.

◆ DPES_TX_HDCP22_DP_TRANS_P0_FLDMASK_LEN

#define DPES_TX_HDCP22_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2816 of file dptx_reg.h.

◆ DPES_TX_HDCP22_DP_TRANS_P0_FLDMASK_POS

#define DPES_TX_HDCP22_DP_TRANS_P0_FLDMASK_POS   13

Definition at line 2815 of file dptx_reg.h.

◆ DPTX_AUX_R_CTRL_AUX_TX_P0_FLDMASK

#define DPTX_AUX_R_CTRL_AUX_TX_P0_FLDMASK   0x1f00

Definition at line 3634 of file dptx_reg.h.

◆ DPTX_AUX_R_CTRL_AUX_TX_P0_FLDMASK_LEN

#define DPTX_AUX_R_CTRL_AUX_TX_P0_FLDMASK_LEN   5

Definition at line 3636 of file dptx_reg.h.

◆ DPTX_AUX_R_CTRL_AUX_TX_P0_FLDMASK_POS

#define DPTX_AUX_R_CTRL_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3635 of file dptx_reg.h.

◆ DPTX_AUXRX_AUX_TX_P0_FLDMASK

#define DPTX_AUXRX_AUX_TX_P0_FLDMASK   0x4

Definition at line 3652 of file dptx_reg.h.

◆ DPTX_AUXRX_AUX_TX_P0_FLDMASK_LEN

#define DPTX_AUXRX_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3654 of file dptx_reg.h.

◆ DPTX_AUXRX_AUX_TX_P0_FLDMASK_POS

#define DPTX_AUXRX_AUX_TX_P0_FLDMASK_POS   2

Definition at line 3653 of file dptx_reg.h.

◆ DPTX_AUXRX_L_TEST_AUX_TX_P0_FLDMASK

#define DPTX_AUXRX_L_TEST_AUX_TX_P0_FLDMASK   0x20

Definition at line 3664 of file dptx_reg.h.

◆ DPTX_AUXRX_L_TEST_AUX_TX_P0_FLDMASK_LEN

#define DPTX_AUXRX_L_TEST_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3666 of file dptx_reg.h.

◆ DPTX_AUXRX_L_TEST_AUX_TX_P0_FLDMASK_POS

#define DPTX_AUXRX_L_TEST_AUX_TX_P0_FLDMASK_POS   5

Definition at line 3665 of file dptx_reg.h.

◆ DPTX_AUXRX_VALID_AUX_TX_P0_FLDMASK

#define DPTX_AUXRX_VALID_AUX_TX_P0_FLDMASK   0x8

Definition at line 3656 of file dptx_reg.h.

◆ DPTX_AUXRX_VALID_AUX_TX_P0_FLDMASK_LEN

#define DPTX_AUXRX_VALID_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3658 of file dptx_reg.h.

◆ DPTX_AUXRX_VALID_AUX_TX_P0_FLDMASK_POS

#define DPTX_AUXRX_VALID_AUX_TX_P0_FLDMASK_POS   3

Definition at line 3657 of file dptx_reg.h.

◆ DPTX_AUXRX_WO_TH_AUX_TX_P0_FLDMASK

#define DPTX_AUXRX_WO_TH_AUX_TX_P0_FLDMASK   0x10

Definition at line 3660 of file dptx_reg.h.

◆ DPTX_AUXRX_WO_TH_AUX_TX_P0_FLDMASK_LEN

#define DPTX_AUXRX_WO_TH_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3662 of file dptx_reg.h.

◆ DPTX_AUXRX_WO_TH_AUX_TX_P0_FLDMASK_POS

#define DPTX_AUXRX_WO_TH_AUX_TX_P0_FLDMASK_POS   4

Definition at line 3661 of file dptx_reg.h.

◆ DPTX_GPIO_EN_AUX_TX_P0_FLDMASK

#define DPTX_GPIO_EN_AUX_TX_P0_FLDMASK   0x7000

Definition at line 3617 of file dptx_reg.h.

◆ DPTX_GPIO_EN_AUX_TX_P0_FLDMASK_LEN

#define DPTX_GPIO_EN_AUX_TX_P0_FLDMASK_LEN   3

Definition at line 3619 of file dptx_reg.h.

◆ DPTX_GPIO_EN_AUX_TX_P0_FLDMASK_POS

#define DPTX_GPIO_EN_AUX_TX_P0_FLDMASK_POS   12

Definition at line 3618 of file dptx_reg.h.

◆ DPTX_GPIO_IN_AUX_TX_P0_FLDMASK

#define DPTX_GPIO_IN_AUX_TX_P0_FLDMASK   0x1c0

Definition at line 3605 of file dptx_reg.h.

◆ DPTX_GPIO_IN_AUX_TX_P0_FLDMASK_LEN

#define DPTX_GPIO_IN_AUX_TX_P0_FLDMASK_LEN   3

Definition at line 3607 of file dptx_reg.h.

◆ DPTX_GPIO_IN_AUX_TX_P0_FLDMASK_POS

#define DPTX_GPIO_IN_AUX_TX_P0_FLDMASK_POS   6

Definition at line 3606 of file dptx_reg.h.

◆ DPTX_GPIO_OEN_AUX_TX_P0_FLDMASK

#define DPTX_GPIO_OEN_AUX_TX_P0_FLDMASK   0x7

Definition at line 3597 of file dptx_reg.h.

◆ DPTX_GPIO_OEN_AUX_TX_P0_FLDMASK_LEN

#define DPTX_GPIO_OEN_AUX_TX_P0_FLDMASK_LEN   3

Definition at line 3599 of file dptx_reg.h.

◆ DPTX_GPIO_OEN_AUX_TX_P0_FLDMASK_POS

#define DPTX_GPIO_OEN_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3598 of file dptx_reg.h.

◆ DPTX_GPIO_OUT_AUX_TX_P0_FLDMASK

#define DPTX_GPIO_OUT_AUX_TX_P0_FLDMASK   0x38

Definition at line 3601 of file dptx_reg.h.

◆ DPTX_GPIO_OUT_AUX_TX_P0_FLDMASK_LEN

#define DPTX_GPIO_OUT_AUX_TX_P0_FLDMASK_LEN   3

Definition at line 3603 of file dptx_reg.h.

◆ DPTX_GPIO_OUT_AUX_TX_P0_FLDMASK_POS

#define DPTX_GPIO_OUT_AUX_TX_P0_FLDMASK_POS   3

Definition at line 3602 of file dptx_reg.h.

◆ DSC_BYPASS_EN_DP_ENCODER0_P0_FLDMASK

#define DSC_BYPASS_EN_DP_ENCODER0_P0_FLDMASK   0x2000

Definition at line 1049 of file dptx_reg.h.

◆ DSC_BYPASS_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define DSC_BYPASS_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1051 of file dptx_reg.h.

◆ DSC_BYPASS_EN_DP_ENCODER0_P0_FLDMASK_POS

#define DSC_BYPASS_EN_DP_ENCODER0_P0_FLDMASK_POS   13

Definition at line 1050 of file dptx_reg.h.

◆ DSC_BYTE_SWAP_DP_ENCODER1_P0_FLDMASK

#define DSC_BYTE_SWAP_DP_ENCODER1_P0_FLDMASK   0x2

Definition at line 2046 of file dptx_reg.h.

◆ DSC_BYTE_SWAP_DP_ENCODER1_P0_FLDMASK_LEN

#define DSC_BYTE_SWAP_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2048 of file dptx_reg.h.

◆ DSC_BYTE_SWAP_DP_ENCODER1_P0_FLDMASK_POS

#define DSC_BYTE_SWAP_DP_ENCODER1_P0_FLDMASK_POS   1

Definition at line 2047 of file dptx_reg.h.

◆ DSC_CHUNK_NUM_DP_ENCODER1_P0_FLDMASK

#define DSC_CHUNK_NUM_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 2059 of file dptx_reg.h.

◆ DSC_CHUNK_NUM_DP_ENCODER1_P0_FLDMASK_LEN

#define DSC_CHUNK_NUM_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 2061 of file dptx_reg.h.

◆ DSC_CHUNK_NUM_DP_ENCODER1_P0_FLDMASK_POS

#define DSC_CHUNK_NUM_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2060 of file dptx_reg.h.

◆ DSC_CHUNK_REMAINDER_DP_ENCODER1_P0_FLDMASK

#define DSC_CHUNK_REMAINDER_DP_ENCODER1_P0_FLDMASK   0xf00

Definition at line 2054 of file dptx_reg.h.

◆ DSC_CHUNK_REMAINDER_DP_ENCODER1_P0_FLDMASK_LEN

#define DSC_CHUNK_REMAINDER_DP_ENCODER1_P0_FLDMASK_LEN   4

Definition at line 2056 of file dptx_reg.h.

◆ DSC_CHUNK_REMAINDER_DP_ENCODER1_P0_FLDMASK_POS

#define DSC_CHUNK_REMAINDER_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 2055 of file dptx_reg.h.

◆ DSC_EN_DP_ENCODER1_P0_FLDMASK

#define DSC_EN_DP_ENCODER1_P0_FLDMASK   0x1

Definition at line 2042 of file dptx_reg.h.

◆ DSC_EN_DP_ENCODER1_P0_FLDMASK_LEN

#define DSC_EN_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2044 of file dptx_reg.h.

◆ DSC_EN_DP_ENCODER1_P0_FLDMASK_POS

#define DSC_EN_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2043 of file dptx_reg.h.

◆ DSC_SLICE_NUM_DP_ENCODER1_P0_FLDMASK

#define DSC_SLICE_NUM_DP_ENCODER1_P0_FLDMASK   0xf0

Definition at line 2050 of file dptx_reg.h.

◆ DSC_SLICE_NUM_DP_ENCODER1_P0_FLDMASK_LEN

#define DSC_SLICE_NUM_DP_ENCODER1_P0_FLDMASK_LEN   4

Definition at line 2052 of file dptx_reg.h.

◆ DSC_SLICE_NUM_DP_ENCODER1_P0_FLDMASK_POS

#define DSC_SLICE_NUM_DP_ENCODER1_P0_FLDMASK_POS   4

Definition at line 2051 of file dptx_reg.h.

◆ ECC_EN_DP_ENCODER0_P0_FLDMASK

#define ECC_EN_DP_ENCODER0_P0_FLDMASK   0x10

Definition at line 529 of file dptx_reg.h.

◆ ECC_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define ECC_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 531 of file dptx_reg.h.

◆ ECC_EN_DP_ENCODER0_P0_FLDMASK_POS

#define ECC_EN_DP_ENCODER0_P0_FLDMASK_POS   4

Definition at line 530 of file dptx_reg.h.

◆ EN_5V_TOL_AUX_TX_P0_FLDMASK

#define EN_5V_TOL_AUX_TX_P0_FLDMASK   0x2000

Definition at line 3680 of file dptx_reg.h.

◆ EN_5V_TOL_AUX_TX_P0_FLDMASK_LEN

#define EN_5V_TOL_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3682 of file dptx_reg.h.

◆ EN_5V_TOL_AUX_TX_P0_FLDMASK_POS

#define EN_5V_TOL_AUX_TX_P0_FLDMASK_POS   13

Definition at line 3681 of file dptx_reg.h.

◆ EN_AUX_AUX_TX_P0_FLDMASK

#define EN_AUX_AUX_TX_P0_FLDMASK   0x1000

Definition at line 3676 of file dptx_reg.h.

◆ EN_AUX_AUX_TX_P0_FLDMASK_LEN

#define EN_AUX_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3678 of file dptx_reg.h.

◆ EN_AUX_AUX_TX_P0_FLDMASK_POS

#define EN_AUX_AUX_TX_P0_FLDMASK_POS   12

Definition at line 3677 of file dptx_reg.h.

◆ EN_AUXRX_AUX_TX_P0_FLDMASK

#define EN_AUXRX_AUX_TX_P0_FLDMASK   0x400

Definition at line 3668 of file dptx_reg.h.

◆ EN_AUXRX_AUX_TX_P0_FLDMASK_LEN

#define EN_AUXRX_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3670 of file dptx_reg.h.

◆ EN_AUXRX_AUX_TX_P0_FLDMASK_POS

#define EN_AUXRX_AUX_TX_P0_FLDMASK_POS   10

Definition at line 3669 of file dptx_reg.h.

◆ EN_AUXTX_AUX_TX_P0_FLDMASK

#define EN_AUXTX_AUX_TX_P0_FLDMASK   0x800

Definition at line 3672 of file dptx_reg.h.

◆ EN_AUXTX_AUX_TX_P0_FLDMASK_LEN

#define EN_AUXTX_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3674 of file dptx_reg.h.

◆ EN_AUXTX_AUX_TX_P0_FLDMASK_POS

#define EN_AUXTX_AUX_TX_P0_FLDMASK_POS   11

Definition at line 3673 of file dptx_reg.h.

◆ EN_COPY_2LANE_MSA_DP_TRANS_P0_FLDMASK

#define EN_COPY_2LANE_MSA_DP_TRANS_P0_FLDMASK   0x1

Definition at line 2778 of file dptx_reg.h.

◆ EN_COPY_2LANE_MSA_DP_TRANS_P0_FLDMASK_LEN

#define EN_COPY_2LANE_MSA_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2780 of file dptx_reg.h.

◆ EN_COPY_2LANE_MSA_DP_TRANS_P0_FLDMASK_POS

#define EN_COPY_2LANE_MSA_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2779 of file dptx_reg.h.

◆ EN_COPY_4LANE_MSA_DP_TRANS_P0_FLDMASK

#define EN_COPY_4LANE_MSA_DP_TRANS_P0_FLDMASK   0x2

Definition at line 2782 of file dptx_reg.h.

◆ EN_COPY_4LANE_MSA_DP_TRANS_P0_FLDMASK_LEN

#define EN_COPY_4LANE_MSA_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2784 of file dptx_reg.h.

◆ EN_COPY_4LANE_MSA_DP_TRANS_P0_FLDMASK_POS

#define EN_COPY_4LANE_MSA_DP_TRANS_P0_FLDMASK_POS   1

Definition at line 2783 of file dptx_reg.h.

◆ EN_FT_MUX_AUX_TX_P0_FLDMASK

#define EN_FT_MUX_AUX_TX_P0_FLDMASK   0x2

Definition at line 3991 of file dptx_reg.h.

◆ EN_FT_MUX_AUX_TX_P0_FLDMASK_LEN

#define EN_FT_MUX_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3993 of file dptx_reg.h.

◆ EN_FT_MUX_AUX_TX_P0_FLDMASK_POS

#define EN_FT_MUX_AUX_TX_P0_FLDMASK_POS   1

Definition at line 3992 of file dptx_reg.h.

◆ EN_GPIO_AUX_TX_P0_FLDMASK

#define EN_GPIO_AUX_TX_P0_FLDMASK   0x4

Definition at line 3995 of file dptx_reg.h.

◆ EN_GPIO_AUX_TX_P0_FLDMASK_LEN

#define EN_GPIO_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3997 of file dptx_reg.h.

◆ EN_GPIO_AUX_TX_P0_FLDMASK_POS

#define EN_GPIO_AUX_TX_P0_FLDMASK_POS   2

Definition at line 3996 of file dptx_reg.h.

◆ EN_HBR3_AUX_TX_P0_FLDMASK

#define EN_HBR3_AUX_TX_P0_FLDMASK   0x8

Definition at line 3999 of file dptx_reg.h.

◆ EN_HBR3_AUX_TX_P0_FLDMASK_LEN

#define EN_HBR3_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 4001 of file dptx_reg.h.

◆ EN_HBR3_AUX_TX_P0_FLDMASK_POS

#define EN_HBR3_AUX_TX_P0_FLDMASK_POS   3

Definition at line 4000 of file dptx_reg.h.

◆ EN_RXCM_BOOST_AUX_TX_P0_FLDMASK

#define EN_RXCM_BOOST_AUX_TX_P0_FLDMASK   0x80

Definition at line 3630 of file dptx_reg.h.

◆ EN_RXCM_BOOST_AUX_TX_P0_FLDMASK_LEN

#define EN_RXCM_BOOST_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3632 of file dptx_reg.h.

◆ EN_RXCM_BOOST_AUX_TX_P0_FLDMASK_POS

#define EN_RXCM_BOOST_AUX_TX_P0_FLDMASK_POS   7

Definition at line 3631 of file dptx_reg.h.

◆ ENC0_OFFSET

#define ENC0_OFFSET   0x3000

Definition at line 7 of file dptx_reg.h.

◆ ENC1_OFFSET

#define ENC1_OFFSET   0x3200

Definition at line 8 of file dptx_reg.h.

◆ ENHANCED_FRAME_EN_DP_ENCODER0_P0_FLDMASK

#define ENHANCED_FRAME_EN_DP_ENCODER0_P0_FLDMASK   0x10

Definition at line 26 of file dptx_reg.h.

◆ ENHANCED_FRAME_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define ENHANCED_FRAME_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 28 of file dptx_reg.h.

◆ ENHANCED_FRAME_EN_DP_ENCODER0_P0_FLDMASK_POS

#define ENHANCED_FRAME_EN_DP_ENCODER0_P0_FLDMASK_POS   4

Definition at line 27 of file dptx_reg.h.

◆ EXT_AUX_PHY_MODE_AUX_TX_P0_FLDMASK

#define EXT_AUX_PHY_MODE_AUX_TX_P0_FLDMASK   0x20

Definition at line 3535 of file dptx_reg.h.

◆ EXT_AUX_PHY_MODE_AUX_TX_P0_FLDMASK_LEN

#define EXT_AUX_PHY_MODE_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3537 of file dptx_reg.h.

◆ EXT_AUX_PHY_MODE_AUX_TX_P0_FLDMASK_POS

#define EXT_AUX_PHY_MODE_AUX_TX_P0_FLDMASK_POS   5

Definition at line 3536 of file dptx_reg.h.

◆ EXT_CFG_DP_ENCODER0_P0_FLDMASK

#define EXT_CFG_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 490 of file dptx_reg.h.

◆ EXT_CFG_DP_ENCODER0_P0_FLDMASK_LEN

#define EXT_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 492 of file dptx_reg.h.

◆ EXT_CFG_DP_ENCODER0_P0_FLDMASK_POS

#define EXT_CFG_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 491 of file dptx_reg.h.

◆ EXT_HB0_DP_ENCODER0_P0_FLDMASK

#define EXT_HB0_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 750 of file dptx_reg.h.

◆ EXT_HB0_DP_ENCODER0_P0_FLDMASK_LEN

#define EXT_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 752 of file dptx_reg.h.

◆ EXT_HB0_DP_ENCODER0_P0_FLDMASK_POS

#define EXT_HB0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 751 of file dptx_reg.h.

◆ EXT_HB1_DP_ENCODER0_P0_FLDMASK

#define EXT_HB1_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 754 of file dptx_reg.h.

◆ EXT_HB1_DP_ENCODER0_P0_FLDMASK_LEN

#define EXT_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 756 of file dptx_reg.h.

◆ EXT_HB1_DP_ENCODER0_P0_FLDMASK_POS

#define EXT_HB1_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 755 of file dptx_reg.h.

◆ EXT_HB2_DP_ENCODER0_P0_FLDMASK

#define EXT_HB2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 759 of file dptx_reg.h.

◆ EXT_HB2_DP_ENCODER0_P0_FLDMASK_LEN

#define EXT_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 761 of file dptx_reg.h.

◆ EXT_HB2_DP_ENCODER0_P0_FLDMASK_POS

#define EXT_HB2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 760 of file dptx_reg.h.

◆ EXT_HB3_DP_ENCODER0_P0_FLDMASK

#define EXT_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 763 of file dptx_reg.h.

◆ EXT_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define EXT_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 765 of file dptx_reg.h.

◆ EXT_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define EXT_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 764 of file dptx_reg.h.

◆ EXT_TX_OEN_POLARITY_AUX_TX_P0_FLDMASK

#define EXT_TX_OEN_POLARITY_AUX_TX_P0_FLDMASK   0x40

Definition at line 3539 of file dptx_reg.h.

◆ EXT_TX_OEN_POLARITY_AUX_TX_P0_FLDMASK_LEN

#define EXT_TX_OEN_POLARITY_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3541 of file dptx_reg.h.

◆ EXT_TX_OEN_POLARITY_AUX_TX_P0_FLDMASK_POS

#define EXT_TX_OEN_POLARITY_AUX_TX_P0_FLDMASK_POS   6

Definition at line 3540 of file dptx_reg.h.

◆ FEC_CLK_GATE_DATA_CNT_0_DP_TRANS_P0_FLDMASK

#define FEC_CLK_GATE_DATA_CNT_0_DP_TRANS_P0_FLDMASK   0x7f

Definition at line 3074 of file dptx_reg.h.

◆ FEC_CLK_GATE_DATA_CNT_0_DP_TRANS_P0_FLDMASK_LEN

#define FEC_CLK_GATE_DATA_CNT_0_DP_TRANS_P0_FLDMASK_LEN   7

Definition at line 3076 of file dptx_reg.h.

◆ FEC_CLK_GATE_DATA_CNT_0_DP_TRANS_P0_FLDMASK_POS

#define FEC_CLK_GATE_DATA_CNT_0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3075 of file dptx_reg.h.

◆ FEC_CLK_GATE_DATA_CNT_1_0_DP_TRANS_P0_FLDMASK

#define FEC_CLK_GATE_DATA_CNT_1_0_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3079 of file dptx_reg.h.

◆ FEC_CLK_GATE_DATA_CNT_1_0_DP_TRANS_P0_FLDMASK_LEN

#define FEC_CLK_GATE_DATA_CNT_1_0_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3081 of file dptx_reg.h.

◆ FEC_CLK_GATE_DATA_CNT_1_0_DP_TRANS_P0_FLDMASK_POS

#define FEC_CLK_GATE_DATA_CNT_1_0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3080 of file dptx_reg.h.

◆ FEC_CLK_GATE_DATA_CNT_1_1_DP_TRANS_P0_FLDMASK

#define FEC_CLK_GATE_DATA_CNT_1_1_DP_TRANS_P0_FLDMASK   0x3

Definition at line 3084 of file dptx_reg.h.

◆ FEC_CLK_GATE_DATA_CNT_1_1_DP_TRANS_P0_FLDMASK_LEN

#define FEC_CLK_GATE_DATA_CNT_1_1_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 3086 of file dptx_reg.h.

◆ FEC_CLK_GATE_DATA_CNT_1_1_DP_TRANS_P0_FLDMASK_POS

#define FEC_CLK_GATE_DATA_CNT_1_1_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3085 of file dptx_reg.h.

◆ FEC_CLOCK_EN_MODE_DP_TRANS_P0_FLDMASK

#define FEC_CLOCK_EN_MODE_DP_TRANS_P0_FLDMASK   0x8

Definition at line 2945 of file dptx_reg.h.

◆ FEC_CLOCK_EN_MODE_DP_TRANS_P0_FLDMASK_LEN

#define FEC_CLOCK_EN_MODE_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2947 of file dptx_reg.h.

◆ FEC_CLOCK_EN_MODE_DP_TRANS_P0_FLDMASK_POS

#define FEC_CLOCK_EN_MODE_DP_TRANS_P0_FLDMASK_POS   3

Definition at line 2946 of file dptx_reg.h.

◆ FEC_CP_HIT_CLR_DP_TRANS_P0_FLDMASK

#define FEC_CP_HIT_CLR_DP_TRANS_P0_FLDMASK   0x10

Definition at line 3052 of file dptx_reg.h.

◆ FEC_CP_HIT_CLR_DP_TRANS_P0_FLDMASK_LEN

#define FEC_CP_HIT_CLR_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 3054 of file dptx_reg.h.

◆ FEC_CP_HIT_CLR_DP_TRANS_P0_FLDMASK_POS

#define FEC_CP_HIT_CLR_DP_TRANS_P0_FLDMASK_POS   4

Definition at line 3053 of file dptx_reg.h.

◆ FEC_CP_HIT_LANE0_DP_TRANS_P0_FLDMASK

#define FEC_CP_HIT_LANE0_DP_TRANS_P0_FLDMASK   0x1

Definition at line 3036 of file dptx_reg.h.

◆ FEC_CP_HIT_LANE0_DP_TRANS_P0_FLDMASK_LEN

#define FEC_CP_HIT_LANE0_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 3038 of file dptx_reg.h.

◆ FEC_CP_HIT_LANE0_DP_TRANS_P0_FLDMASK_POS

#define FEC_CP_HIT_LANE0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3037 of file dptx_reg.h.

◆ FEC_CP_HIT_LANE1_DP_TRANS_P0_FLDMASK

#define FEC_CP_HIT_LANE1_DP_TRANS_P0_FLDMASK   0x2

Definition at line 3040 of file dptx_reg.h.

◆ FEC_CP_HIT_LANE1_DP_TRANS_P0_FLDMASK_LEN

#define FEC_CP_HIT_LANE1_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 3042 of file dptx_reg.h.

◆ FEC_CP_HIT_LANE1_DP_TRANS_P0_FLDMASK_POS

#define FEC_CP_HIT_LANE1_DP_TRANS_P0_FLDMASK_POS   1

Definition at line 3041 of file dptx_reg.h.

◆ FEC_CP_HIT_LANE2_DP_TRANS_P0_FLDMASK

#define FEC_CP_HIT_LANE2_DP_TRANS_P0_FLDMASK   0x4

Definition at line 3044 of file dptx_reg.h.

◆ FEC_CP_HIT_LANE2_DP_TRANS_P0_FLDMASK_LEN

#define FEC_CP_HIT_LANE2_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 3046 of file dptx_reg.h.

◆ FEC_CP_HIT_LANE2_DP_TRANS_P0_FLDMASK_POS

#define FEC_CP_HIT_LANE2_DP_TRANS_P0_FLDMASK_POS   2

Definition at line 3045 of file dptx_reg.h.

◆ FEC_CP_HIT_LANE3_DP_TRANS_P0_FLDMASK

#define FEC_CP_HIT_LANE3_DP_TRANS_P0_FLDMASK   0x8

Definition at line 3048 of file dptx_reg.h.

◆ FEC_CP_HIT_LANE3_DP_TRANS_P0_FLDMASK_LEN

#define FEC_CP_HIT_LANE3_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 3050 of file dptx_reg.h.

◆ FEC_CP_HIT_LANE3_DP_TRANS_P0_FLDMASK_POS

#define FEC_CP_HIT_LANE3_DP_TRANS_P0_FLDMASK_POS   3

Definition at line 3049 of file dptx_reg.h.

◆ FEC_EN_DP_TRANS_P0_FLDMASK

#define FEC_EN_DP_TRANS_P0_FLDMASK   0x1

Definition at line 2937 of file dptx_reg.h.

◆ FEC_EN_DP_TRANS_P0_FLDMASK_LEN

#define FEC_EN_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2939 of file dptx_reg.h.

◆ FEC_EN_DP_TRANS_P0_FLDMASK_POS

#define FEC_EN_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2938 of file dptx_reg.h.

◆ FEC_ENCODE_TOP_TESTBUS_SEL_DP_TRANS_P0_FLDMASK

#define FEC_ENCODE_TOP_TESTBUS_SEL_DP_TRANS_P0_FLDMASK   0x300

Definition at line 3056 of file dptx_reg.h.

◆ FEC_ENCODE_TOP_TESTBUS_SEL_DP_TRANS_P0_FLDMASK_LEN

#define FEC_ENCODE_TOP_TESTBUS_SEL_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 3058 of file dptx_reg.h.

◆ FEC_ENCODE_TOP_TESTBUS_SEL_DP_TRANS_P0_FLDMASK_POS

#define FEC_ENCODE_TOP_TESTBUS_SEL_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 3057 of file dptx_reg.h.

◆ FEC_END_MODE_DP_TRANS_P0_FLDMASK

#define FEC_END_MODE_DP_TRANS_P0_FLDMASK   0x6

Definition at line 2941 of file dptx_reg.h.

◆ FEC_END_MODE_DP_TRANS_P0_FLDMASK_LEN

#define FEC_END_MODE_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 2943 of file dptx_reg.h.

◆ FEC_END_MODE_DP_TRANS_P0_FLDMASK_POS

#define FEC_END_MODE_DP_TRANS_P0_FLDMASK_POS   1

Definition at line 2942 of file dptx_reg.h.

◆ FEC_FIFO_OVER_POINT_DP_TRANS_P0_FLDMASK

#define FEC_FIFO_OVER_POINT_DP_TRANS_P0_FLDMASK   0xf000

Definition at line 2957 of file dptx_reg.h.

◆ FEC_FIFO_OVER_POINT_DP_TRANS_P0_FLDMASK_LEN

#define FEC_FIFO_OVER_POINT_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2959 of file dptx_reg.h.

◆ FEC_FIFO_OVER_POINT_DP_TRANS_P0_FLDMASK_POS

#define FEC_FIFO_OVER_POINT_DP_TRANS_P0_FLDMASK_POS   12

Definition at line 2958 of file dptx_reg.h.

◆ FEC_FIFO_READ_START_DP_TRANS_P0_FLDMASK

#define FEC_FIFO_READ_START_DP_TRANS_P0_FLDMASK   0xf0

Definition at line 2949 of file dptx_reg.h.

◆ FEC_FIFO_READ_START_DP_TRANS_P0_FLDMASK_LEN

#define FEC_FIFO_READ_START_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2951 of file dptx_reg.h.

◆ FEC_FIFO_READ_START_DP_TRANS_P0_FLDMASK_POS

#define FEC_FIFO_READ_START_DP_TRANS_P0_FLDMASK_POS   4

Definition at line 2950 of file dptx_reg.h.

◆ FEC_FIFO_RST_DP_TRANS_P0_FLDMASK

#define FEC_FIFO_RST_DP_TRANS_P0_FLDMASK   0x1

Definition at line 2962 of file dptx_reg.h.

◆ FEC_FIFO_RST_DP_TRANS_P0_FLDMASK_LEN

#define FEC_FIFO_RST_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2964 of file dptx_reg.h.

◆ FEC_FIFO_RST_DP_TRANS_P0_FLDMASK_POS

#define FEC_FIFO_RST_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2963 of file dptx_reg.h.

◆ FEC_FIFO_UNDER_POINT_DP_TRANS_P0_FLDMASK

#define FEC_FIFO_UNDER_POINT_DP_TRANS_P0_FLDMASK   0xf00

Definition at line 2953 of file dptx_reg.h.

◆ FEC_FIFO_UNDER_POINT_DP_TRANS_P0_FLDMASK_LEN

#define FEC_FIFO_UNDER_POINT_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2955 of file dptx_reg.h.

◆ FEC_FIFO_UNDER_POINT_DP_TRANS_P0_FLDMASK_POS

#define FEC_FIFO_UNDER_POINT_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 2954 of file dptx_reg.h.

◆ FEC_INSERT_FIFO_EMPTY_CLR_DP_TRANS_P0_FLDMASK

#define FEC_INSERT_FIFO_EMPTY_CLR_DP_TRANS_P0_FLDMASK   0x20

Definition at line 2978 of file dptx_reg.h.

◆ FEC_INSERT_FIFO_EMPTY_CLR_DP_TRANS_P0_FLDMASK_LEN

#define FEC_INSERT_FIFO_EMPTY_CLR_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2980 of file dptx_reg.h.

◆ FEC_INSERT_FIFO_EMPTY_CLR_DP_TRANS_P0_FLDMASK_POS

#define FEC_INSERT_FIFO_EMPTY_CLR_DP_TRANS_P0_FLDMASK_POS   5

Definition at line 2979 of file dptx_reg.h.

◆ FEC_INSERT_FIFO_EMPTY_DP_TRANS_P0_FLDMASK

#define FEC_INSERT_FIFO_EMPTY_DP_TRANS_P0_FLDMASK   0x10

Definition at line 2974 of file dptx_reg.h.

◆ FEC_INSERT_FIFO_EMPTY_DP_TRANS_P0_FLDMASK_LEN

#define FEC_INSERT_FIFO_EMPTY_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2976 of file dptx_reg.h.

◆ FEC_INSERT_FIFO_EMPTY_DP_TRANS_P0_FLDMASK_POS

#define FEC_INSERT_FIFO_EMPTY_DP_TRANS_P0_FLDMASK_POS   4

Definition at line 2975 of file dptx_reg.h.

◆ FEC_INSERT_FIFO_FULL_CLR_DP_TRANS_P0_FLDMASK

#define FEC_INSERT_FIFO_FULL_CLR_DP_TRANS_P0_FLDMASK   0x80

Definition at line 2986 of file dptx_reg.h.

◆ FEC_INSERT_FIFO_FULL_CLR_DP_TRANS_P0_FLDMASK_LEN

#define FEC_INSERT_FIFO_FULL_CLR_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2988 of file dptx_reg.h.

◆ FEC_INSERT_FIFO_FULL_CLR_DP_TRANS_P0_FLDMASK_POS

#define FEC_INSERT_FIFO_FULL_CLR_DP_TRANS_P0_FLDMASK_POS   7

Definition at line 2987 of file dptx_reg.h.

◆ FEC_INSERT_FIFO_FULL_DP_TRANS_P0_FLDMASK

#define FEC_INSERT_FIFO_FULL_DP_TRANS_P0_FLDMASK   0x40

Definition at line 2982 of file dptx_reg.h.

◆ FEC_INSERT_FIFO_FULL_DP_TRANS_P0_FLDMASK_LEN

#define FEC_INSERT_FIFO_FULL_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2984 of file dptx_reg.h.

◆ FEC_INSERT_FIFO_FULL_DP_TRANS_P0_FLDMASK_POS

#define FEC_INSERT_FIFO_FULL_DP_TRANS_P0_FLDMASK_POS   6

Definition at line 2983 of file dptx_reg.h.

◆ FEC_INSERT_FIFO_RCNT_DP_TRANS_P0_FLDMASK

#define FEC_INSERT_FIFO_RCNT_DP_TRANS_P0_FLDMASK   0x1f00

Definition at line 3069 of file dptx_reg.h.

◆ FEC_INSERT_FIFO_RCNT_DP_TRANS_P0_FLDMASK_LEN

#define FEC_INSERT_FIFO_RCNT_DP_TRANS_P0_FLDMASK_LEN   5

Definition at line 3071 of file dptx_reg.h.

◆ FEC_INSERT_FIFO_RCNT_DP_TRANS_P0_FLDMASK_POS

#define FEC_INSERT_FIFO_RCNT_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 3070 of file dptx_reg.h.

◆ FEC_INSERT_FIFO_WCNT_DP_TRANS_P0_FLDMASK

#define FEC_INSERT_FIFO_WCNT_DP_TRANS_P0_FLDMASK   0x1f

Definition at line 3065 of file dptx_reg.h.

◆ FEC_INSERT_FIFO_WCNT_DP_TRANS_P0_FLDMASK_LEN

#define FEC_INSERT_FIFO_WCNT_DP_TRANS_P0_FLDMASK_LEN   5

Definition at line 3067 of file dptx_reg.h.

◆ FEC_INSERT_FIFO_WCNT_DP_TRANS_P0_FLDMASK_POS

#define FEC_INSERT_FIFO_WCNT_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3066 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_CNT_LANE0_DP_TRANS_P0_FLDMASK

#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE0_DP_TRANS_P0_FLDMASK   0x7

Definition at line 3003 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_CNT_LANE0_DP_TRANS_P0_FLDMASK_LEN

#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE0_DP_TRANS_P0_FLDMASK_LEN   3

Definition at line 3005 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_CNT_LANE0_DP_TRANS_P0_FLDMASK_POS

#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3004 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_CNT_LANE1_DP_TRANS_P0_FLDMASK

#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE1_DP_TRANS_P0_FLDMASK   0x70

Definition at line 3011 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_CNT_LANE1_DP_TRANS_P0_FLDMASK_LEN

#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE1_DP_TRANS_P0_FLDMASK_LEN   3

Definition at line 3013 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_CNT_LANE1_DP_TRANS_P0_FLDMASK_POS

#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE1_DP_TRANS_P0_FLDMASK_POS   4

Definition at line 3012 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_CNT_LANE2_DP_TRANS_P0_FLDMASK

#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE2_DP_TRANS_P0_FLDMASK   0x700

Definition at line 3019 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_CNT_LANE2_DP_TRANS_P0_FLDMASK_LEN

#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE2_DP_TRANS_P0_FLDMASK_LEN   3

Definition at line 3021 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_CNT_LANE2_DP_TRANS_P0_FLDMASK_POS

#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE2_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 3020 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_CNT_LANE3_DP_TRANS_P0_FLDMASK

#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE3_DP_TRANS_P0_FLDMASK   0x7000

Definition at line 3027 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_CNT_LANE3_DP_TRANS_P0_FLDMASK_LEN

#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE3_DP_TRANS_P0_FLDMASK_LEN   3

Definition at line 3029 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_CNT_LANE3_DP_TRANS_P0_FLDMASK_POS

#define FEC_INSERT_SYMBOL_ERROR_CNT_LANE3_DP_TRANS_P0_FLDMASK_POS   12

Definition at line 3028 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_LANE0_DP_TRANS_P0_FLDMASK

#define FEC_INSERT_SYMBOL_ERROR_LANE0_DP_TRANS_P0_FLDMASK   0x8

Definition at line 3007 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN

#define FEC_INSERT_SYMBOL_ERROR_LANE0_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 3009 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS

#define FEC_INSERT_SYMBOL_ERROR_LANE0_DP_TRANS_P0_FLDMASK_POS   3

Definition at line 3008 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_LANE1_DP_TRANS_P0_FLDMASK

#define FEC_INSERT_SYMBOL_ERROR_LANE1_DP_TRANS_P0_FLDMASK   0x80

Definition at line 3015 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN

#define FEC_INSERT_SYMBOL_ERROR_LANE1_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 3017 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS

#define FEC_INSERT_SYMBOL_ERROR_LANE1_DP_TRANS_P0_FLDMASK_POS   7

Definition at line 3016 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_LANE2_DP_TRANS_P0_FLDMASK

#define FEC_INSERT_SYMBOL_ERROR_LANE2_DP_TRANS_P0_FLDMASK   0x800

Definition at line 3023 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN

#define FEC_INSERT_SYMBOL_ERROR_LANE2_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 3025 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS

#define FEC_INSERT_SYMBOL_ERROR_LANE2_DP_TRANS_P0_FLDMASK_POS   11

Definition at line 3024 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_LANE3_DP_TRANS_P0_FLDMASK

#define FEC_INSERT_SYMBOL_ERROR_LANE3_DP_TRANS_P0_FLDMASK   0x8000

Definition at line 3031 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN

#define FEC_INSERT_SYMBOL_ERROR_LANE3_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 3033 of file dptx_reg.h.

◆ FEC_INSERT_SYMBOL_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS

#define FEC_INSERT_SYMBOL_ERROR_LANE3_DP_TRANS_P0_FLDMASK_POS   15

Definition at line 3032 of file dptx_reg.h.

◆ FEC_INSERT_TOP_TESTBUS_SEL_DP_TRANS_P0_FLDMASK

#define FEC_INSERT_TOP_TESTBUS_SEL_DP_TRANS_P0_FLDMASK   0xc00

Definition at line 3060 of file dptx_reg.h.

◆ FEC_INSERT_TOP_TESTBUS_SEL_DP_TRANS_P0_FLDMASK_LEN

#define FEC_INSERT_TOP_TESTBUS_SEL_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 3062 of file dptx_reg.h.

◆ FEC_INSERT_TOP_TESTBUS_SEL_DP_TRANS_P0_FLDMASK_POS

#define FEC_INSERT_TOP_TESTBUS_SEL_DP_TRANS_P0_FLDMASK_POS   10

Definition at line 3061 of file dptx_reg.h.

◆ FEC_PARITY_DATA_LANE_SWAP_DP_TRANS_P0_FLDMASK

#define FEC_PARITY_DATA_LANE_SWAP_DP_TRANS_P0_FLDMASK   0x1000

Definition at line 2998 of file dptx_reg.h.

◆ FEC_PARITY_DATA_LANE_SWAP_DP_TRANS_P0_FLDMASK_LEN

#define FEC_PARITY_DATA_LANE_SWAP_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 3000 of file dptx_reg.h.

◆ FEC_PARITY_DATA_LANE_SWAP_DP_TRANS_P0_FLDMASK_POS

#define FEC_PARITY_DATA_LANE_SWAP_DP_TRANS_P0_FLDMASK_POS   12

Definition at line 2999 of file dptx_reg.h.

◆ FEC_PATTERN_NEW_DP_TRANS_P0_FLDMASK

#define FEC_PATTERN_NEW_DP_TRANS_P0_FLDMASK   0x4

Definition at line 2970 of file dptx_reg.h.

◆ FEC_PATTERN_NEW_DP_TRANS_P0_FLDMASK_LEN

#define FEC_PATTERN_NEW_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2972 of file dptx_reg.h.

◆ FEC_PATTERN_NEW_DP_TRANS_P0_FLDMASK_POS

#define FEC_PATTERN_NEW_DP_TRANS_P0_FLDMASK_POS   2

Definition at line 2971 of file dptx_reg.h.

◆ FEC_SUPPORT_DP_TRANS_P0_FLDMASK

#define FEC_SUPPORT_DP_TRANS_P0_FLDMASK   0x2

Definition at line 2966 of file dptx_reg.h.

◆ FEC_SUPPORT_DP_TRANS_P0_FLDMASK_LEN

#define FEC_SUPPORT_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2968 of file dptx_reg.h.

◆ FEC_SUPPORT_DP_TRANS_P0_FLDMASK_POS

#define FEC_SUPPORT_DP_TRANS_P0_FLDMASK_POS   1

Definition at line 2967 of file dptx_reg.h.

◆ FIELD_DETECT_EN_DP_ENCODER0_P0_FLDMASK

#define FIELD_DETECT_EN_DP_ENCODER0_P0_FLDMASK   0x10

Definition at line 370 of file dptx_reg.h.

◆ FIELD_DETECT_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define FIELD_DETECT_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 372 of file dptx_reg.h.

◆ FIELD_DETECT_EN_DP_ENCODER0_P0_FLDMASK_POS

#define FIELD_DETECT_EN_DP_ENCODER0_P0_FLDMASK_POS   4

Definition at line 371 of file dptx_reg.h.

◆ FIELD_DETECT_UPDATE_THRD_DP_ENCODER0_P0_FLDMASK

#define FIELD_DETECT_UPDATE_THRD_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 374 of file dptx_reg.h.

◆ FIELD_DETECT_UPDATE_THRD_DP_ENCODER0_P0_FLDMASK_LEN

#define FIELD_DETECT_UPDATE_THRD_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 376 of file dptx_reg.h.

◆ FIELD_DETECT_UPDATE_THRD_DP_ENCODER0_P0_FLDMASK_POS

#define FIELD_DETECT_UPDATE_THRD_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 375 of file dptx_reg.h.

◆ FIELD_SW_DP_ENCODER0_P0_FLDMASK

#define FIELD_SW_DP_ENCODER0_P0_FLDMASK   0x2000

Definition at line 256 of file dptx_reg.h.

◆ FIELD_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define FIELD_SW_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 258 of file dptx_reg.h.

◆ FIELD_SW_DP_ENCODER0_P0_FLDMASK_POS

#define FIELD_SW_DP_ENCODER0_P0_FLDMASK_POS   13

Definition at line 257 of file dptx_reg.h.

◆ FIELD_VBID_SW_EN_DP_ENCODER0_P0_FLDMASK

#define FIELD_VBID_SW_EN_DP_ENCODER0_P0_FLDMASK   0x1000

Definition at line 252 of file dptx_reg.h.

◆ FIELD_VBID_SW_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define FIELD_VBID_SW_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 254 of file dptx_reg.h.

◆ FIELD_VBID_SW_EN_DP_ENCODER0_P0_FLDMASK_POS

#define FIELD_VBID_SW_EN_DP_ENCODER0_P0_FLDMASK_POS   12

Definition at line 253 of file dptx_reg.h.

◆ FIFO_READ_START_POINT_DP_ENCODER1_P0_FLDMASK

#define FIFO_READ_START_POINT_DP_ENCODER1_P0_FLDMASK   0xf000

Definition at line 2012 of file dptx_reg.h.

◆ FIFO_READ_START_POINT_DP_ENCODER1_P0_FLDMASK_LEN

#define FIFO_READ_START_POINT_DP_ENCODER1_P0_FLDMASK_LEN   4

Definition at line 2014 of file dptx_reg.h.

◆ FIFO_READ_START_POINT_DP_ENCODER1_P0_FLDMASK_POS

#define FIFO_READ_START_POINT_DP_ENCODER1_P0_FLDMASK_POS   12

Definition at line 2013 of file dptx_reg.h.

◆ FREQ_AUX_TX_P0_FLDMASK

#define FREQ_AUX_TX_P0_FLDMASK   0xff00

Definition at line 3810 of file dptx_reg.h.

◆ FREQ_AUX_TX_P0_FLDMASK_LEN

#define FREQ_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3812 of file dptx_reg.h.

◆ FREQ_AUX_TX_P0_FLDMASK_POS

#define FREQ_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3811 of file dptx_reg.h.

◆ FUSE_SEL_FLDMASK

#define FUSE_SEL_FLDMASK   0x4

Definition at line 4282 of file dptx_reg.h.

◆ FUSE_SEL_FLDMASK_LEN

#define FUSE_SEL_FLDMASK_LEN   1

Definition at line 4284 of file dptx_reg.h.

◆ FUSE_SEL_FLDMASK_POS

#define FUSE_SEL_FLDMASK_POS   2

Definition at line 4283 of file dptx_reg.h.

◆ GTC_DATA_IN_MODE_AUX_TX_P0_FLDMASK

#define GTC_DATA_IN_MODE_AUX_TX_P0_FLDMASK   0x800

Definition at line 4027 of file dptx_reg.h.

◆ GTC_DATA_IN_MODE_AUX_TX_P0_FLDMASK_LEN

#define GTC_DATA_IN_MODE_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 4029 of file dptx_reg.h.

◆ GTC_DATA_IN_MODE_AUX_TX_P0_FLDMASK_POS

#define GTC_DATA_IN_MODE_AUX_TX_P0_FLDMASK_POS   11

Definition at line 4028 of file dptx_reg.h.

◆ GTC_DB_OPTION_AUX_TX_P0_FLDMASK

#define GTC_DB_OPTION_AUX_TX_P0_FLDMASK   0x7

Definition at line 3857 of file dptx_reg.h.

◆ GTC_DB_OPTION_AUX_TX_P0_FLDMASK_LEN

#define GTC_DB_OPTION_AUX_TX_P0_FLDMASK_LEN   3

Definition at line 3859 of file dptx_reg.h.

◆ GTC_DB_OPTION_AUX_TX_P0_FLDMASK_POS

#define GTC_DB_OPTION_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3858 of file dptx_reg.h.

◆ GTC_EN_AUX_TX_P0_FLDMASK

#define GTC_EN_AUX_TX_P0_FLDMASK   0x400

Definition at line 4023 of file dptx_reg.h.

◆ GTC_EN_AUX_TX_P0_FLDMASK_LEN

#define GTC_EN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 4025 of file dptx_reg.h.

◆ GTC_EN_AUX_TX_P0_FLDMASK_POS

#define GTC_EN_AUX_TX_P0_FLDMASK_POS   10

Definition at line 4024 of file dptx_reg.h.

◆ GTC_PUL_DELAY_AUX_TX_P0_FLDMASK

#define GTC_PUL_DELAY_AUX_TX_P0_FLDMASK   0xff00

Definition at line 3865 of file dptx_reg.h.

◆ GTC_PUL_DELAY_AUX_TX_P0_FLDMASK_LEN

#define GTC_PUL_DELAY_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3867 of file dptx_reg.h.

◆ GTC_PUL_DELAY_AUX_TX_P0_FLDMASK_POS

#define GTC_PUL_DELAY_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3866 of file dptx_reg.h.

◆ GTC_SEND_RCV_EN_AUX_TX_P0_FLDMASK

#define GTC_SEND_RCV_EN_AUX_TX_P0_FLDMASK   0x4

Definition at line 3832 of file dptx_reg.h.

◆ GTC_SEND_RCV_EN_AUX_TX_P0_FLDMASK_LEN

#define GTC_SEND_RCV_EN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3834 of file dptx_reg.h.

◆ GTC_SEND_RCV_EN_AUX_TX_P0_FLDMASK_POS

#define GTC_SEND_RCV_EN_AUX_TX_P0_FLDMASK_POS   2

Definition at line 3833 of file dptx_reg.h.

◆ GTC_STATE_AUX_TX_P0_FLDMASK

#define GTC_STATE_AUX_TX_P0_FLDMASK   0xf

Definition at line 3802 of file dptx_reg.h.

◆ GTC_STATE_AUX_TX_P0_FLDMASK_LEN

#define GTC_STATE_AUX_TX_P0_FLDMASK_LEN   4

Definition at line 3804 of file dptx_reg.h.

◆ GTC_STATE_AUX_TX_P0_FLDMASK_POS

#define GTC_STATE_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3803 of file dptx_reg.h.

◆ GTC_TX_10M_ADD_VAL_AUX_TX_P0_FLDMASK

#define GTC_TX_10M_ADD_VAL_AUX_TX_P0_FLDMASK   0xf000

Definition at line 3819 of file dptx_reg.h.

◆ GTC_TX_10M_ADD_VAL_AUX_TX_P0_FLDMASK_LEN

#define GTC_TX_10M_ADD_VAL_AUX_TX_P0_FLDMASK_LEN   4

Definition at line 3821 of file dptx_reg.h.

◆ GTC_TX_10M_ADD_VAL_AUX_TX_P0_FLDMASK_POS

#define GTC_TX_10M_ADD_VAL_AUX_TX_P0_FLDMASK_POS   12

Definition at line 3820 of file dptx_reg.h.

◆ GTC_TX_1M_ADD_VAL_AUX_TX_P0_FLDMASK

#define GTC_TX_1M_ADD_VAL_AUX_TX_P0_FLDMASK   0x3ff

Definition at line 3815 of file dptx_reg.h.

◆ GTC_TX_1M_ADD_VAL_AUX_TX_P0_FLDMASK_LEN

#define GTC_TX_1M_ADD_VAL_AUX_TX_P0_FLDMASK_LEN   10

Definition at line 3817 of file dptx_reg.h.

◆ GTC_TX_1M_ADD_VAL_AUX_TX_P0_FLDMASK_POS

#define GTC_TX_1M_ADD_VAL_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3816 of file dptx_reg.h.

◆ GTC_TX_LCK_ACQ_SEND_NUM_AUX_TX_P0_FLDMASK

#define GTC_TX_LCK_ACQ_SEND_NUM_AUX_TX_P0_FLDMASK   0x1f

Definition at line 3870 of file dptx_reg.h.

◆ GTC_TX_LCK_ACQ_SEND_NUM_AUX_TX_P0_FLDMASK_LEN

#define GTC_TX_LCK_ACQ_SEND_NUM_AUX_TX_P0_FLDMASK_LEN   5

Definition at line 3872 of file dptx_reg.h.

◆ GTC_TX_LCK_ACQ_SEND_NUM_AUX_TX_P0_FLDMASK_POS

#define GTC_TX_LCK_ACQ_SEND_NUM_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3871 of file dptx_reg.h.

◆ GTC_TX_MASTER_EN_AUX_TX_P0_FLDMASK

#define GTC_TX_MASTER_EN_AUX_TX_P0_FLDMASK   0x10

Definition at line 3840 of file dptx_reg.h.

◆ GTC_TX_MASTER_EN_AUX_TX_P0_FLDMASK_LEN

#define GTC_TX_MASTER_EN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3842 of file dptx_reg.h.

◆ GTC_TX_MASTER_EN_AUX_TX_P0_FLDMASK_POS

#define GTC_TX_MASTER_EN_AUX_TX_P0_FLDMASK_POS   4

Definition at line 3841 of file dptx_reg.h.

◆ GTC_TX_SLAVE_EN_AUX_TX_P0_FLDMASK

#define GTC_TX_SLAVE_EN_AUX_TX_P0_FLDMASK   0x20

Definition at line 3844 of file dptx_reg.h.

◆ GTC_TX_SLAVE_EN_AUX_TX_P0_FLDMASK_LEN

#define GTC_TX_SLAVE_EN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3846 of file dptx_reg.h.

◆ GTC_TX_SLAVE_EN_AUX_TX_P0_FLDMASK_POS

#define GTC_TX_SLAVE_EN_AUX_TX_P0_FLDMASK_POS   5

Definition at line 3845 of file dptx_reg.h.

◆ HDCP13_AN_CODE_0_FLDMASK

#define HDCP13_AN_CODE_0_FLDMASK   0xffffffffL

Definition at line 4467 of file dptx_reg.h.

◆ HDCP13_AN_CODE_0_FLDMASK_LEN

#define HDCP13_AN_CODE_0_FLDMASK_LEN   32

Definition at line 4469 of file dptx_reg.h.

◆ HDCP13_AN_CODE_0_FLDMASK_POS

#define HDCP13_AN_CODE_0_FLDMASK_POS   0

Definition at line 4468 of file dptx_reg.h.

◆ HDCP13_AN_CODE_1_FLDMASK

#define HDCP13_AN_CODE_1_FLDMASK   0xffffffffL

Definition at line 4472 of file dptx_reg.h.

◆ HDCP13_AN_CODE_1_FLDMASK_LEN

#define HDCP13_AN_CODE_1_FLDMASK_LEN   32

Definition at line 4474 of file dptx_reg.h.

◆ HDCP13_AN_CODE_1_FLDMASK_POS

#define HDCP13_AN_CODE_1_FLDMASK_POS   0

Definition at line 4473 of file dptx_reg.h.

◆ HDCP13_LN_CODE_0_FLDMASK

#define HDCP13_LN_CODE_0_FLDMASK   0xffffffffL

Definition at line 4457 of file dptx_reg.h.

◆ HDCP13_LN_CODE_0_FLDMASK_LEN

#define HDCP13_LN_CODE_0_FLDMASK_LEN   32

Definition at line 4459 of file dptx_reg.h.

◆ HDCP13_LN_CODE_0_FLDMASK_POS

#define HDCP13_LN_CODE_0_FLDMASK_POS   0

Definition at line 4458 of file dptx_reg.h.

◆ HDCP13_LN_CODE_1_FLDMASK

#define HDCP13_LN_CODE_1_FLDMASK   0xffffff

Definition at line 4462 of file dptx_reg.h.

◆ HDCP13_LN_CODE_1_FLDMASK_LEN

#define HDCP13_LN_CODE_1_FLDMASK_LEN   24

Definition at line 4464 of file dptx_reg.h.

◆ HDCP13_LN_CODE_1_FLDMASK_POS

#define HDCP13_LN_CODE_1_FLDMASK_POS   0

Definition at line 4463 of file dptx_reg.h.

◆ HDCP13_LN_SEED_FLDMASK

#define HDCP13_LN_SEED_FLDMASK   0xff

Definition at line 4452 of file dptx_reg.h.

◆ HDCP13_LN_SEED_FLDMASK_LEN

#define HDCP13_LN_SEED_FLDMASK_LEN   8

Definition at line 4454 of file dptx_reg.h.

◆ HDCP13_LN_SEED_FLDMASK_POS

#define HDCP13_LN_SEED_FLDMASK_POS   0

Definition at line 4453 of file dptx_reg.h.

◆ HDCP13_RST_SW_DP_TRANS_P0_FLDMASK

#define HDCP13_RST_SW_DP_TRANS_P0_FLDMASK   0x4000

Definition at line 2412 of file dptx_reg.h.

◆ HDCP13_RST_SW_DP_TRANS_P0_FLDMASK_LEN

#define HDCP13_RST_SW_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2414 of file dptx_reg.h.

◆ HDCP13_RST_SW_DP_TRANS_P0_FLDMASK_POS

#define HDCP13_RST_SW_DP_TRANS_P0_FLDMASK_POS   14

Definition at line 2413 of file dptx_reg.h.

◆ HDCP13_RST_SW_SECURE_FLDMASK

#define HDCP13_RST_SW_SECURE_FLDMASK   0x4

Definition at line 4485 of file dptx_reg.h.

◆ HDCP13_RST_SW_SECURE_FLDMASK_LEN

#define HDCP13_RST_SW_SECURE_FLDMASK_LEN   1

Definition at line 4487 of file dptx_reg.h.

◆ HDCP13_RST_SW_SECURE_FLDMASK_POS

#define HDCP13_RST_SW_SECURE_FLDMASK_POS   2

Definition at line 4486 of file dptx_reg.h.

◆ HDCP22_AUTH_DONE_DP_TRANS_P0_FLDMASK

#define HDCP22_AUTH_DONE_DP_TRANS_P0_FLDMASK   0x10

Definition at line 2790 of file dptx_reg.h.

◆ HDCP22_AUTH_DONE_DP_TRANS_P0_FLDMASK_LEN

#define HDCP22_AUTH_DONE_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2792 of file dptx_reg.h.

◆ HDCP22_AUTH_DONE_DP_TRANS_P0_FLDMASK_POS

#define HDCP22_AUTH_DONE_DP_TRANS_P0_FLDMASK_POS   4

Definition at line 2791 of file dptx_reg.h.

◆ HDCP22_CIPHER_REVERSE_DP_TRANS_P0_FLDMASK

#define HDCP22_CIPHER_REVERSE_DP_TRANS_P0_FLDMASK   0x40

Definition at line 2798 of file dptx_reg.h.

◆ HDCP22_CIPHER_REVERSE_DP_TRANS_P0_FLDMASK_LEN

#define HDCP22_CIPHER_REVERSE_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2800 of file dptx_reg.h.

◆ HDCP22_CIPHER_REVERSE_DP_TRANS_P0_FLDMASK_POS

#define HDCP22_CIPHER_REVERSE_DP_TRANS_P0_FLDMASK_POS   6

Definition at line 2799 of file dptx_reg.h.

◆ HDCP22_KS_XOR_LC128_KEY_0_FLDMASK

#define HDCP22_KS_XOR_LC128_KEY_0_FLDMASK   0xffffffffL

Definition at line 4422 of file dptx_reg.h.

◆ HDCP22_KS_XOR_LC128_KEY_0_FLDMASK_LEN

#define HDCP22_KS_XOR_LC128_KEY_0_FLDMASK_LEN   32

Definition at line 4424 of file dptx_reg.h.

◆ HDCP22_KS_XOR_LC128_KEY_0_FLDMASK_POS

#define HDCP22_KS_XOR_LC128_KEY_0_FLDMASK_POS   0

Definition at line 4423 of file dptx_reg.h.

◆ HDCP22_KS_XOR_LC128_KEY_1_FLDMASK

#define HDCP22_KS_XOR_LC128_KEY_1_FLDMASK   0xffffffffL

Definition at line 4427 of file dptx_reg.h.

◆ HDCP22_KS_XOR_LC128_KEY_1_FLDMASK_LEN

#define HDCP22_KS_XOR_LC128_KEY_1_FLDMASK_LEN   32

Definition at line 4429 of file dptx_reg.h.

◆ HDCP22_KS_XOR_LC128_KEY_1_FLDMASK_POS

#define HDCP22_KS_XOR_LC128_KEY_1_FLDMASK_POS   0

Definition at line 4428 of file dptx_reg.h.

◆ HDCP22_KS_XOR_LC128_KEY_2_FLDMASK

#define HDCP22_KS_XOR_LC128_KEY_2_FLDMASK   0xffffffffL

Definition at line 4432 of file dptx_reg.h.

◆ HDCP22_KS_XOR_LC128_KEY_2_FLDMASK_LEN

#define HDCP22_KS_XOR_LC128_KEY_2_FLDMASK_LEN   32

Definition at line 4434 of file dptx_reg.h.

◆ HDCP22_KS_XOR_LC128_KEY_2_FLDMASK_POS

#define HDCP22_KS_XOR_LC128_KEY_2_FLDMASK_POS   0

Definition at line 4433 of file dptx_reg.h.

◆ HDCP22_KS_XOR_LC128_KEY_3_FLDMASK

#define HDCP22_KS_XOR_LC128_KEY_3_FLDMASK   0xffffffffL

Definition at line 4437 of file dptx_reg.h.

◆ HDCP22_KS_XOR_LC128_KEY_3_FLDMASK_LEN

#define HDCP22_KS_XOR_LC128_KEY_3_FLDMASK_LEN   32

Definition at line 4439 of file dptx_reg.h.

◆ HDCP22_KS_XOR_LC128_KEY_3_FLDMASK_POS

#define HDCP22_KS_XOR_LC128_KEY_3_FLDMASK_POS   0

Definition at line 4438 of file dptx_reg.h.

◆ HDCP22_RIV_0_FLDMASK

#define HDCP22_RIV_0_FLDMASK   0xffffffffL

Definition at line 4442 of file dptx_reg.h.

◆ HDCP22_RIV_0_FLDMASK_LEN

#define HDCP22_RIV_0_FLDMASK_LEN   32

Definition at line 4444 of file dptx_reg.h.

◆ HDCP22_RIV_0_FLDMASK_POS

#define HDCP22_RIV_0_FLDMASK_POS   0

Definition at line 4443 of file dptx_reg.h.

◆ HDCP22_RIV_1_FLDMASK

#define HDCP22_RIV_1_FLDMASK   0xffffffffL

Definition at line 4447 of file dptx_reg.h.

◆ HDCP22_RIV_1_FLDMASK_LEN

#define HDCP22_RIV_1_FLDMASK_LEN   32

Definition at line 4449 of file dptx_reg.h.

◆ HDCP22_RIV_1_FLDMASK_POS

#define HDCP22_RIV_1_FLDMASK_POS   0

Definition at line 4448 of file dptx_reg.h.

◆ HDCP22_RST_SW_DP_TRANS_P0_FLDMASK

#define HDCP22_RST_SW_DP_TRANS_P0_FLDMASK   0x8000

Definition at line 2416 of file dptx_reg.h.

◆ HDCP22_RST_SW_DP_TRANS_P0_FLDMASK_LEN

#define HDCP22_RST_SW_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2418 of file dptx_reg.h.

◆ HDCP22_RST_SW_DP_TRANS_P0_FLDMASK_POS

#define HDCP22_RST_SW_DP_TRANS_P0_FLDMASK_POS   15

Definition at line 2417 of file dptx_reg.h.

◆ HDCP22_RST_SW_SECURE_FLDMASK

#define HDCP22_RST_SW_SECURE_FLDMASK   0x2

Definition at line 4481 of file dptx_reg.h.

◆ HDCP22_RST_SW_SECURE_FLDMASK_LEN

#define HDCP22_RST_SW_SECURE_FLDMASK_LEN   1

Definition at line 4483 of file dptx_reg.h.

◆ HDCP22_RST_SW_SECURE_FLDMASK_POS

#define HDCP22_RST_SW_SECURE_FLDMASK_POS   1

Definition at line 4482 of file dptx_reg.h.

◆ HDCP22_TYPE_DP_TRANS_P0_FLDMASK

#define HDCP22_TYPE_DP_TRANS_P0_FLDMASK   0xff

Definition at line 2932 of file dptx_reg.h.

◆ HDCP22_TYPE_DP_TRANS_P0_FLDMASK_LEN

#define HDCP22_TYPE_DP_TRANS_P0_FLDMASK_LEN   8

Definition at line 2934 of file dptx_reg.h.

◆ HDCP22_TYPE_DP_TRANS_P0_FLDMASK_POS

#define HDCP22_TYPE_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2933 of file dptx_reg.h.

◆ HDCP_1LANE_SEL_DP_TRANS_P0_FLDMASK

#define HDCP_1LANE_SEL_DP_TRANS_P0_FLDMASK   0x2000

Definition at line 2765 of file dptx_reg.h.

◆ HDCP_1LANE_SEL_DP_TRANS_P0_FLDMASK_LEN

#define HDCP_1LANE_SEL_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2767 of file dptx_reg.h.

◆ HDCP_1LANE_SEL_DP_TRANS_P0_FLDMASK_POS

#define HDCP_1LANE_SEL_DP_TRANS_P0_FLDMASK_POS   13

Definition at line 2766 of file dptx_reg.h.

◆ HDCP_24LANE_SEL_DP_TRANS_P0_FLDMASK

#define HDCP_24LANE_SEL_DP_TRANS_P0_FLDMASK   0x4000

Definition at line 2769 of file dptx_reg.h.

◆ HDCP_24LANE_SEL_DP_TRANS_P0_FLDMASK_LEN

#define HDCP_24LANE_SEL_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2771 of file dptx_reg.h.

◆ HDCP_24LANE_SEL_DP_TRANS_P0_FLDMASK_POS

#define HDCP_24LANE_SEL_DP_TRANS_P0_FLDMASK_POS   14

Definition at line 2770 of file dptx_reg.h.

◆ HDCP_2P_TO_4P_FIFO_RST_CHK_DP_TRANS_P0_FLDMASK

#define HDCP_2P_TO_4P_FIFO_RST_CHK_DP_TRANS_P0_FLDMASK   0xff00

Definition at line 2907 of file dptx_reg.h.

◆ HDCP_2P_TO_4P_FIFO_RST_CHK_DP_TRANS_P0_FLDMASK_LEN

#define HDCP_2P_TO_4P_FIFO_RST_CHK_DP_TRANS_P0_FLDMASK_LEN   8

Definition at line 2909 of file dptx_reg.h.

◆ HDCP_2P_TO_4P_FIFO_RST_CHK_DP_TRANS_P0_FLDMASK_POS

#define HDCP_2P_TO_4P_FIFO_RST_CHK_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 2908 of file dptx_reg.h.

◆ HDCP_4P_TO_2P_FIFO_RST_CHK_DP_TRANS_P0_FLDMASK

#define HDCP_4P_TO_2P_FIFO_RST_CHK_DP_TRANS_P0_FLDMASK   0xff

Definition at line 2903 of file dptx_reg.h.

◆ HDCP_4P_TO_2P_FIFO_RST_CHK_DP_TRANS_P0_FLDMASK_LEN

#define HDCP_4P_TO_2P_FIFO_RST_CHK_DP_TRANS_P0_FLDMASK_LEN   8

Definition at line 2905 of file dptx_reg.h.

◆ HDCP_4P_TO_2P_FIFO_RST_CHK_DP_TRANS_P0_FLDMASK_POS

#define HDCP_4P_TO_2P_FIFO_RST_CHK_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2904 of file dptx_reg.h.

◆ HDCP_CAPABLE_DP_TRANS_P0_FLDMASK

#define HDCP_CAPABLE_DP_TRANS_P0_FLDMASK   0x2

Definition at line 2745 of file dptx_reg.h.

◆ HDCP_CAPABLE_DP_TRANS_P0_FLDMASK_LEN

#define HDCP_CAPABLE_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2747 of file dptx_reg.h.

◆ HDCP_CAPABLE_DP_TRANS_P0_FLDMASK_POS

#define HDCP_CAPABLE_DP_TRANS_P0_FLDMASK_POS   1

Definition at line 2746 of file dptx_reg.h.

◆ HDCP_FRAME_EN_DP_ENCODER0_P0_FLDMASK

#define HDCP_FRAME_EN_DP_ENCODER0_P0_FLDMASK   0x20

Definition at line 30 of file dptx_reg.h.

◆ HDCP_FRAME_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define HDCP_FRAME_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 32 of file dptx_reg.h.

◆ HDCP_FRAME_EN_DP_ENCODER0_P0_FLDMASK_POS

#define HDCP_FRAME_EN_DP_ENCODER0_P0_FLDMASK_POS   5

Definition at line 31 of file dptx_reg.h.

◆ HDCP_FRAME_EN_SECURE_FLDMASK

#define HDCP_FRAME_EN_SECURE_FLDMASK   0x20

Definition at line 4497 of file dptx_reg.h.

◆ HDCP_FRAME_EN_SECURE_FLDMASK_LEN

#define HDCP_FRAME_EN_SECURE_FLDMASK_LEN   1

Definition at line 4499 of file dptx_reg.h.

◆ HDCP_FRAME_EN_SECURE_FLDMASK_POS

#define HDCP_FRAME_EN_SECURE_FLDMASK_POS   5

Definition at line 4498 of file dptx_reg.h.

◆ HDCP_FRAME_EN_SEL_SECURE_FLDMASK

#define HDCP_FRAME_EN_SEL_SECURE_FLDMASK   0x40

Definition at line 4501 of file dptx_reg.h.

◆ HDCP_FRAME_EN_SEL_SECURE_FLDMASK_LEN

#define HDCP_FRAME_EN_SEL_SECURE_FLDMASK_LEN   1

Definition at line 4503 of file dptx_reg.h.

◆ HDCP_FRAME_EN_SEL_SECURE_FLDMASK_POS

#define HDCP_FRAME_EN_SEL_SECURE_FLDMASK_POS   6

Definition at line 4502 of file dptx_reg.h.

◆ HDCP_SEL_DP_TRANS_P0_FLDMASK

#define HDCP_SEL_DP_TRANS_P0_FLDMASK   0x800

Definition at line 2305 of file dptx_reg.h.

◆ HDCP_SEL_DP_TRANS_P0_FLDMASK_LEN

#define HDCP_SEL_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2307 of file dptx_reg.h.

◆ HDCP_SEL_DP_TRANS_P0_FLDMASK_POS

#define HDCP_SEL_DP_TRANS_P0_FLDMASK_POS   11

Definition at line 2306 of file dptx_reg.h.

◆ HDCP_SYNC_SEL_DP_ENCODER0_P0_FLDMASK

#define HDCP_SYNC_SEL_DP_ENCODER0_P0_FLDMASK   0x10

Definition at line 329 of file dptx_reg.h.

◆ HDCP_SYNC_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define HDCP_SYNC_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 331 of file dptx_reg.h.

◆ HDCP_SYNC_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define HDCP_SYNC_SEL_DP_ENCODER0_P0_FLDMASK_POS   4

Definition at line 330 of file dptx_reg.h.

◆ HDCP_SYNC_SW_DP_ENCODER0_P0_FLDMASK

#define HDCP_SYNC_SW_DP_ENCODER0_P0_FLDMASK   0x20

Definition at line 333 of file dptx_reg.h.

◆ HDCP_SYNC_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define HDCP_SYNC_SW_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 335 of file dptx_reg.h.

◆ HDCP_SYNC_SW_DP_ENCODER0_P0_FLDMASK_POS

#define HDCP_SYNC_SW_DP_ENCODER0_P0_FLDMASK_POS   5

Definition at line 334 of file dptx_reg.h.

◆ HDCP_TYPE_TX_0_DP_TRANS_P0_FLDMASK

#define HDCP_TYPE_TX_0_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2865 of file dptx_reg.h.

◆ HDCP_TYPE_TX_0_DP_TRANS_P0_FLDMASK_LEN

#define HDCP_TYPE_TX_0_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2867 of file dptx_reg.h.

◆ HDCP_TYPE_TX_0_DP_TRANS_P0_FLDMASK_POS

#define HDCP_TYPE_TX_0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2866 of file dptx_reg.h.

◆ HDCP_TYPE_TX_1_DP_TRANS_P0_FLDMASK

#define HDCP_TYPE_TX_1_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2870 of file dptx_reg.h.

◆ HDCP_TYPE_TX_1_DP_TRANS_P0_FLDMASK_LEN

#define HDCP_TYPE_TX_1_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2872 of file dptx_reg.h.

◆ HDCP_TYPE_TX_1_DP_TRANS_P0_FLDMASK_POS

#define HDCP_TYPE_TX_1_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2871 of file dptx_reg.h.

◆ HDCP_TYPE_TX_2_DP_TRANS_P0_FLDMASK

#define HDCP_TYPE_TX_2_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2875 of file dptx_reg.h.

◆ HDCP_TYPE_TX_2_DP_TRANS_P0_FLDMASK_LEN

#define HDCP_TYPE_TX_2_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2877 of file dptx_reg.h.

◆ HDCP_TYPE_TX_2_DP_TRANS_P0_FLDMASK_POS

#define HDCP_TYPE_TX_2_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2876 of file dptx_reg.h.

◆ HDCP_TYPE_TX_3_DP_TRANS_P0_FLDMASK

#define HDCP_TYPE_TX_3_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2880 of file dptx_reg.h.

◆ HDCP_TYPE_TX_3_DP_TRANS_P0_FLDMASK_LEN

#define HDCP_TYPE_TX_3_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2882 of file dptx_reg.h.

◆ HDCP_TYPE_TX_3_DP_TRANS_P0_FLDMASK_POS

#define HDCP_TYPE_TX_3_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2881 of file dptx_reg.h.

◆ HDE_DETECT_DP_ENCODER1_P0_FLDMASK

#define HDE_DETECT_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 1882 of file dptx_reg.h.

◆ HDE_DETECT_DP_ENCODER1_P0_FLDMASK_LEN

#define HDE_DETECT_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 1884 of file dptx_reg.h.

◆ HDE_DETECT_DP_ENCODER1_P0_FLDMASK_POS

#define HDE_DETECT_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1883 of file dptx_reg.h.

◆ HDE_DETECT_STABLE_DP_ENCODER1_P0_FLDMASK

#define HDE_DETECT_STABLE_DP_ENCODER1_P0_FLDMASK   0x8

Definition at line 1862 of file dptx_reg.h.

◆ HDE_DETECT_STABLE_DP_ENCODER1_P0_FLDMASK_LEN

#define HDE_DETECT_STABLE_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1864 of file dptx_reg.h.

◆ HDE_DETECT_STABLE_DP_ENCODER1_P0_FLDMASK_POS

#define HDE_DETECT_STABLE_DP_ENCODER1_P0_FLDMASK_POS   3

Definition at line 1863 of file dptx_reg.h.

◆ HDE_NUM_EVEN_EN_SW_LANE0_DP_ENCODER0_P0_FLDMASK

#define HDE_NUM_EVEN_EN_SW_LANE0_DP_ENCODER0_P0_FLDMASK   0x100

Definition at line 1206 of file dptx_reg.h.

◆ HDE_NUM_EVEN_EN_SW_LANE0_DP_ENCODER0_P0_FLDMASK_LEN

#define HDE_NUM_EVEN_EN_SW_LANE0_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1208 of file dptx_reg.h.

◆ HDE_NUM_EVEN_EN_SW_LANE0_DP_ENCODER0_P0_FLDMASK_POS

#define HDE_NUM_EVEN_EN_SW_LANE0_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 1207 of file dptx_reg.h.

◆ HDE_NUM_EVEN_EN_SW_LANE1_DP_ENCODER0_P0_FLDMASK

#define HDE_NUM_EVEN_EN_SW_LANE1_DP_ENCODER0_P0_FLDMASK   0x200

Definition at line 1210 of file dptx_reg.h.

◆ HDE_NUM_EVEN_EN_SW_LANE1_DP_ENCODER0_P0_FLDMASK_LEN

#define HDE_NUM_EVEN_EN_SW_LANE1_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1212 of file dptx_reg.h.

◆ HDE_NUM_EVEN_EN_SW_LANE1_DP_ENCODER0_P0_FLDMASK_POS

#define HDE_NUM_EVEN_EN_SW_LANE1_DP_ENCODER0_P0_FLDMASK_POS   9

Definition at line 1211 of file dptx_reg.h.

◆ HDE_NUM_EVEN_EN_SW_LANE2_DP_ENCODER0_P0_FLDMASK

#define HDE_NUM_EVEN_EN_SW_LANE2_DP_ENCODER0_P0_FLDMASK   0x400

Definition at line 1214 of file dptx_reg.h.

◆ HDE_NUM_EVEN_EN_SW_LANE2_DP_ENCODER0_P0_FLDMASK_LEN

#define HDE_NUM_EVEN_EN_SW_LANE2_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1216 of file dptx_reg.h.

◆ HDE_NUM_EVEN_EN_SW_LANE2_DP_ENCODER0_P0_FLDMASK_POS

#define HDE_NUM_EVEN_EN_SW_LANE2_DP_ENCODER0_P0_FLDMASK_POS   10

Definition at line 1215 of file dptx_reg.h.

◆ HDE_NUM_EVEN_EN_SW_LANE3_DP_ENCODER0_P0_FLDMASK

#define HDE_NUM_EVEN_EN_SW_LANE3_DP_ENCODER0_P0_FLDMASK   0x800

Definition at line 1218 of file dptx_reg.h.

◆ HDE_NUM_EVEN_EN_SW_LANE3_DP_ENCODER0_P0_FLDMASK_LEN

#define HDE_NUM_EVEN_EN_SW_LANE3_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1220 of file dptx_reg.h.

◆ HDE_NUM_EVEN_EN_SW_LANE3_DP_ENCODER0_P0_FLDMASK_POS

#define HDE_NUM_EVEN_EN_SW_LANE3_DP_ENCODER0_P0_FLDMASK_POS   11

Definition at line 1219 of file dptx_reg.h.

◆ HDE_NUM_LAST_DP_ENCODER0_P0_FLDMASK

#define HDE_NUM_LAST_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 379 of file dptx_reg.h.

◆ HDE_NUM_LAST_DP_ENCODER0_P0_FLDMASK_LEN

#define HDE_NUM_LAST_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 381 of file dptx_reg.h.

◆ HDE_NUM_LAST_DP_ENCODER0_P0_FLDMASK_POS

#define HDE_NUM_LAST_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 380 of file dptx_reg.h.

◆ HDR0_CFG_DP_ENCODER0_P0_FLDMASK

#define HDR0_CFG_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 1107 of file dptx_reg.h.

◆ HDR0_CFG_DP_ENCODER0_P0_FLDMASK_LEN

#define HDR0_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1109 of file dptx_reg.h.

◆ HDR0_CFG_DP_ENCODER0_P0_FLDMASK_POS

#define HDR0_CFG_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 1108 of file dptx_reg.h.

◆ HDR0_HB0_DP_ENCODER0_P0_FLDMASK

#define HDR0_HB0_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 804 of file dptx_reg.h.

◆ HDR0_HB0_DP_ENCODER0_P0_FLDMASK_LEN

#define HDR0_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 806 of file dptx_reg.h.

◆ HDR0_HB0_DP_ENCODER0_P0_FLDMASK_POS

#define HDR0_HB0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 805 of file dptx_reg.h.

◆ HDR0_HB1_DP_ENCODER0_P0_FLDMASK

#define HDR0_HB1_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 808 of file dptx_reg.h.

◆ HDR0_HB1_DP_ENCODER0_P0_FLDMASK_LEN

#define HDR0_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 810 of file dptx_reg.h.

◆ HDR0_HB1_DP_ENCODER0_P0_FLDMASK_POS

#define HDR0_HB1_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 809 of file dptx_reg.h.

◆ HDR0_HB2_DP_ENCODER0_P0_FLDMASK

#define HDR0_HB2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 813 of file dptx_reg.h.

◆ HDR0_HB2_DP_ENCODER0_P0_FLDMASK_LEN

#define HDR0_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 815 of file dptx_reg.h.

◆ HDR0_HB2_DP_ENCODER0_P0_FLDMASK_POS

#define HDR0_HB2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 814 of file dptx_reg.h.

◆ HDR0_HB3_DP_ENCODER0_P0_FLDMASK

#define HDR0_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 817 of file dptx_reg.h.

◆ HDR0_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define HDR0_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 819 of file dptx_reg.h.

◆ HDR0_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define HDR0_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 818 of file dptx_reg.h.

◆ HDR0_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK

#define HDR0_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK   0x8000

Definition at line 1057 of file dptx_reg.h.

◆ HDR0_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK_LEN

#define HDR0_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1059 of file dptx_reg.h.

◆ HDR0_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK_POS

#define HDR0_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK_POS   15

Definition at line 1058 of file dptx_reg.h.

◆ HPD_CONN_THD_DP_TRANS_P0_FLDMASK

#define HPD_CONN_THD_DP_TRANS_P0_FLDMASK   0xf000

Definition at line 2433 of file dptx_reg.h.

◆ HPD_CONN_THD_DP_TRANS_P0_FLDMASK_LEN

#define HPD_CONN_THD_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2435 of file dptx_reg.h.

◆ HPD_CONN_THD_DP_TRANS_P0_FLDMASK_POS

#define HPD_CONN_THD_DP_TRANS_P0_FLDMASK_POS   12

Definition at line 2434 of file dptx_reg.h.

◆ HPD_DB_DP_TRANS_P0_FLDMASK

#define HPD_DB_DP_TRANS_P0_FLDMASK   0x4

Definition at line 2446 of file dptx_reg.h.

◆ HPD_DB_DP_TRANS_P0_FLDMASK_LEN

#define HPD_DB_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2448 of file dptx_reg.h.

◆ HPD_DB_DP_TRANS_P0_FLDMASK_POS

#define HPD_DB_DP_TRANS_P0_FLDMASK_POS   2

Definition at line 2447 of file dptx_reg.h.

◆ HPD_DEB_THD_DP_TRANS_P0_FLDMASK

#define HPD_DEB_THD_DP_TRANS_P0_FLDMASK   0xf

Definition at line 2421 of file dptx_reg.h.

◆ HPD_DEB_THD_DP_TRANS_P0_FLDMASK_LEN

#define HPD_DEB_THD_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2423 of file dptx_reg.h.

◆ HPD_DEB_THD_DP_TRANS_P0_FLDMASK_POS

#define HPD_DEB_THD_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2422 of file dptx_reg.h.

◆ HPD_DISC_THD_DP_TRANS_P0_FLDMASK

#define HPD_DISC_THD_DP_TRANS_P0_FLDMASK   0xf00

Definition at line 2429 of file dptx_reg.h.

◆ HPD_DISC_THD_DP_TRANS_P0_FLDMASK_LEN

#define HPD_DISC_THD_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2431 of file dptx_reg.h.

◆ HPD_DISC_THD_DP_TRANS_P0_FLDMASK_POS

#define HPD_DISC_THD_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 2430 of file dptx_reg.h.

◆ HPD_I_AUX_TX_P0_FLDMASK

#define HPD_I_AUX_TX_P0_FLDMASK   0x2

Definition at line 3977 of file dptx_reg.h.

◆ HPD_I_AUX_TX_P0_FLDMASK_LEN

#define HPD_I_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3979 of file dptx_reg.h.

◆ HPD_I_AUX_TX_P0_FLDMASK_POS

#define HPD_I_AUX_TX_P0_FLDMASK_POS   1

Definition at line 3978 of file dptx_reg.h.

◆ HPD_INT_THD_DP_TRANS_P0_FLDMASK

#define HPD_INT_THD_DP_TRANS_P0_FLDMASK   0xf0

Definition at line 2425 of file dptx_reg.h.

◆ HPD_INT_THD_DP_TRANS_P0_FLDMASK_LEN

#define HPD_INT_THD_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2427 of file dptx_reg.h.

◆ HPD_INT_THD_DP_TRANS_P0_FLDMASK_POS

#define HPD_INT_THD_DP_TRANS_P0_FLDMASK_POS   4

Definition at line 2426 of file dptx_reg.h.

◆ HPD_INT_THD_ECO_DP_TRANS_P0_FLDMASK

#define HPD_INT_THD_ECO_DP_TRANS_P0_FLDMASK   0x3

Definition at line 2544 of file dptx_reg.h.

◆ HPD_INT_THD_ECO_DP_TRANS_P0_FLDMASK_LEN

#define HPD_INT_THD_ECO_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 2546 of file dptx_reg.h.

◆ HPD_INT_THD_ECO_DP_TRANS_P0_FLDMASK_POS

#define HPD_INT_THD_ECO_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2545 of file dptx_reg.h.

◆ HPD_OEN_AUX_TX_P0_FLDMASK

#define HPD_OEN_AUX_TX_P0_FLDMASK   0x1

Definition at line 3973 of file dptx_reg.h.

◆ HPD_OEN_AUX_TX_P0_FLDMASK_LEN

#define HPD_OEN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3975 of file dptx_reg.h.

◆ HPD_OEN_AUX_TX_P0_FLDMASK_POS

#define HPD_OEN_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3974 of file dptx_reg.h.

◆ HPD_OVR_EN_DP_TRANS_P0_FLDMASK

#define HPD_OVR_EN_DP_TRANS_P0_FLDMASK   0x1

Definition at line 2438 of file dptx_reg.h.

◆ HPD_OVR_EN_DP_TRANS_P0_FLDMASK_LEN

#define HPD_OVR_EN_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2440 of file dptx_reg.h.

◆ HPD_OVR_EN_DP_TRANS_P0_FLDMASK_POS

#define HPD_OVR_EN_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2439 of file dptx_reg.h.

◆ HPD_SET_DP_TRANS_P0_FLDMASK

#define HPD_SET_DP_TRANS_P0_FLDMASK   0x2

Definition at line 2442 of file dptx_reg.h.

◆ HPD_SET_DP_TRANS_P0_FLDMASK_LEN

#define HPD_SET_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2444 of file dptx_reg.h.

◆ HPD_SET_DP_TRANS_P0_FLDMASK_POS

#define HPD_SET_DP_TRANS_P0_FLDMASK_POS   1

Definition at line 2443 of file dptx_reg.h.

◆ HPD_STATUS_DP_TRANS_P0_FLDMASK

#define HPD_STATUS_DP_TRANS_P0_FLDMASK   0x1

Definition at line 2485 of file dptx_reg.h.

◆ HPD_STATUS_DP_TRANS_P0_FLDMASK_LEN

#define HPD_STATUS_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2487 of file dptx_reg.h.

◆ HPD_STATUS_DP_TRANS_P0_FLDMASK_POS

#define HPD_STATUS_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2486 of file dptx_reg.h.

◆ HSP_SEL_DP_ENCODER0_P0_FLDMASK

#define HSP_SEL_DP_ENCODER0_P0_FLDMASK   0x40

Definition at line 190 of file dptx_reg.h.

◆ HSP_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define HSP_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 192 of file dptx_reg.h.

◆ HSP_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define HSP_SEL_DP_ENCODER0_P0_FLDMASK_POS   6

Definition at line 191 of file dptx_reg.h.

◆ HSP_SW_DP_ENCODER0_P0_FLDMASK

#define HSP_SW_DP_ENCODER0_P0_FLDMASK   0x8000

Definition at line 152 of file dptx_reg.h.

◆ HSP_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define HSP_SW_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 154 of file dptx_reg.h.

◆ HSP_SW_DP_ENCODER0_P0_FLDMASK_POS

#define HSP_SW_DP_ENCODER0_P0_FLDMASK_POS   15

Definition at line 153 of file dptx_reg.h.

◆ HSTART_SEL_DP_ENCODER0_P0_FLDMASK

#define HSTART_SEL_DP_ENCODER0_P0_FLDMASK   0x4

Definition at line 174 of file dptx_reg.h.

◆ HSTART_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define HSTART_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 176 of file dptx_reg.h.

◆ HSTART_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define HSTART_SEL_DP_ENCODER0_P0_FLDMASK_POS   2

Definition at line 175 of file dptx_reg.h.

◆ HSTART_SW_DP_ENCODER0_P0_FLDMASK

#define HSTART_SW_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 128 of file dptx_reg.h.

◆ HSTART_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define HSTART_SW_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 130 of file dptx_reg.h.

◆ HSTART_SW_DP_ENCODER0_P0_FLDMASK_POS

#define HSTART_SW_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 129 of file dptx_reg.h.

◆ HSW_SEL_DP_ENCODER0_P0_FLDMASK

#define HSW_SEL_DP_ENCODER0_P0_FLDMASK   0x80

Definition at line 194 of file dptx_reg.h.

◆ HSW_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define HSW_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 196 of file dptx_reg.h.

◆ HSW_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define HSW_SEL_DP_ENCODER0_P0_FLDMASK_POS   7

Definition at line 195 of file dptx_reg.h.

◆ HSW_SW_DP_ENCODER0_P0_FLDMASK

#define HSW_SW_DP_ENCODER0_P0_FLDMASK   0x7fff

Definition at line 148 of file dptx_reg.h.

◆ HSW_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define HSW_SW_DP_ENCODER0_P0_FLDMASK_LEN   15

Definition at line 150 of file dptx_reg.h.

◆ HSW_SW_DP_ENCODER0_P0_FLDMASK_POS

#define HSW_SW_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 149 of file dptx_reg.h.

◆ HSYNC_DETECT_POL_DP_ENCODER1_P0_FLDMASK

#define HSYNC_DETECT_POL_DP_ENCODER1_P0_FLDMASK   0x2

Definition at line 1854 of file dptx_reg.h.

◆ HSYNC_DETECT_POL_DP_ENCODER1_P0_FLDMASK_LEN

#define HSYNC_DETECT_POL_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1856 of file dptx_reg.h.

◆ HSYNC_DETECT_POL_DP_ENCODER1_P0_FLDMASK_POS

#define HSYNC_DETECT_POL_DP_ENCODER1_P0_FLDMASK_POS   1

Definition at line 1855 of file dptx_reg.h.

◆ HTOTAL_DETECT_DP_ENCODER1_P0_FLDMASK

#define HTOTAL_DETECT_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 1877 of file dptx_reg.h.

◆ HTOTAL_DETECT_DP_ENCODER1_P0_FLDMASK_LEN

#define HTOTAL_DETECT_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 1879 of file dptx_reg.h.

◆ HTOTAL_DETECT_DP_ENCODER1_P0_FLDMASK_POS

#define HTOTAL_DETECT_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1878 of file dptx_reg.h.

◆ HTOTAL_DETECT_STABLE_DP_ENCODER1_P0_FLDMASK

#define HTOTAL_DETECT_STABLE_DP_ENCODER1_P0_FLDMASK   0x4

Definition at line 1858 of file dptx_reg.h.

◆ HTOTAL_DETECT_STABLE_DP_ENCODER1_P0_FLDMASK_LEN

#define HTOTAL_DETECT_STABLE_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1860 of file dptx_reg.h.

◆ HTOTAL_DETECT_STABLE_DP_ENCODER1_P0_FLDMASK_POS

#define HTOTAL_DETECT_STABLE_DP_ENCODER1_P0_FLDMASK_POS   2

Definition at line 1859 of file dptx_reg.h.

◆ HTOTAL_SEL_DP_ENCODER0_P0_FLDMASK

#define HTOTAL_SEL_DP_ENCODER0_P0_FLDMASK   0x1

Definition at line 166 of file dptx_reg.h.

◆ HTOTAL_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define HTOTAL_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 168 of file dptx_reg.h.

◆ HTOTAL_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define HTOTAL_SEL_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 167 of file dptx_reg.h.

◆ HTOTAL_SW_DP_ENCODER0_P0_FLDMASK

#define HTOTAL_SW_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 118 of file dptx_reg.h.

◆ HTOTAL_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define HTOTAL_SW_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 120 of file dptx_reg.h.

◆ HTOTAL_SW_DP_ENCODER0_P0_FLDMASK_PO

#define HTOTAL_SW_DP_ENCODER0_P0_FLDMASK_PO   0

Definition at line 119 of file dptx_reg.h.

◆ HW_SW_ARBIT_AUX_TX_P0_FLDMASK

#define HW_SW_ARBIT_AUX_TX_P0_FLDMASK   0xc000

Definition at line 3852 of file dptx_reg.h.

◆ HW_SW_ARBIT_AUX_TX_P0_FLDMASK_LEN

#define HW_SW_ARBIT_AUX_TX_P0_FLDMASK_LEN   2

Definition at line 3854 of file dptx_reg.h.

◆ HW_SW_ARBIT_AUX_TX_P0_FLDMASK_POS

#define HW_SW_ARBIT_AUX_TX_P0_FLDMASK_POS   14

Definition at line 3853 of file dptx_reg.h.

◆ HWIDTH_SEL_DP_ENCODER0_P0_FLDMASK

#define HWIDTH_SEL_DP_ENCODER0_P0_FLDMASK   0x10

Definition at line 182 of file dptx_reg.h.

◆ HWIDTH_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define HWIDTH_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 184 of file dptx_reg.h.

◆ HWIDTH_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define HWIDTH_SEL_DP_ENCODER0_P0_FLDMASK_POS   4

Definition at line 183 of file dptx_reg.h.

◆ HWIDTH_SW_DP_ENCODER0_P0_FLDMASK

#define HWIDTH_SW_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 138 of file dptx_reg.h.

◆ HWIDTH_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define HWIDTH_SW_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 140 of file dptx_reg.h.

◆ HWIDTH_SW_DP_ENCODER0_P0_FLDMASK_POS

#define HWIDTH_SW_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 139 of file dptx_reg.h.

◆ I2C_EN_AUXN_AUX_TX_P0_FLDMASK

#define I2C_EN_AUXN_AUX_TX_P0_FLDMASK   0x2000

Definition at line 3638 of file dptx_reg.h.

◆ I2C_EN_AUXN_AUX_TX_P0_FLDMASK_LEN

#define I2C_EN_AUXN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3640 of file dptx_reg.h.

◆ I2C_EN_AUXN_AUX_TX_P0_FLDMASK_POS

#define I2C_EN_AUXN_AUX_TX_P0_FLDMASK_POS   13

Definition at line 3639 of file dptx_reg.h.

◆ I2C_EN_AUXP_AUX_TX_P0_FLDMASK

#define I2C_EN_AUXP_AUX_TX_P0_FLDMASK   0x4000

Definition at line 3642 of file dptx_reg.h.

◆ I2C_EN_AUXP_AUX_TX_P0_FLDMASK_LEN

#define I2C_EN_AUXP_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3644 of file dptx_reg.h.

◆ I2C_EN_AUXP_AUX_TX_P0_FLDMASK_POS

#define I2C_EN_AUXP_AUX_TX_P0_FLDMASK_POS   14

Definition at line 3643 of file dptx_reg.h.

◆ IDP_EN_DP_ENCODER0_P0_FLDMASK

#define IDP_EN_DP_ENCODER0_P0_FLDMASK   0x40

Definition at line 34 of file dptx_reg.h.

◆ IDP_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define IDP_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 36 of file dptx_reg.h.

◆ IDP_EN_DP_ENCODER0_P0_FLDMASK_POS

#define IDP_EN_DP_ENCODER0_P0_FLDMASK_POS   6

Definition at line 35 of file dptx_reg.h.

◆ INDEX_SCR_MODE_DP_TRANS_P0_FLDMASK

#define INDEX_SCR_MODE_DP_TRANS_P0_FLDMASK   0x30

Definition at line 2342 of file dptx_reg.h.

◆ INDEX_SCR_MODE_DP_TRANS_P0_FLDMASK_LEN

#define INDEX_SCR_MODE_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 2344 of file dptx_reg.h.

◆ INDEX_SCR_MODE_DP_TRANS_P0_FLDMASK_POS

#define INDEX_SCR_MODE_DP_TRANS_P0_FLDMASK_POS   4

Definition at line 2343 of file dptx_reg.h.

◆ INTERLACE_DET_EVEN_EN_DP_ENCODER0_P0_FLDMASK

#define INTERLACE_DET_EVEN_EN_DP_ENCODER0_P0_FLDMASK   0x8

Definition at line 366 of file dptx_reg.h.

◆ INTERLACE_DET_EVEN_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define INTERLACE_DET_EVEN_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 368 of file dptx_reg.h.

◆ INTERLACE_DET_EVEN_EN_DP_ENCODER0_P0_FLDMASK_POS

#define INTERLACE_DET_EVEN_EN_DP_ENCODER0_P0_FLDMASK_POS   3

Definition at line 367 of file dptx_reg.h.

◆ IRQ_CLR_51_DP_ENCODER1_P0_FLDMASK

#define IRQ_CLR_51_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 1721 of file dptx_reg.h.

◆ IRQ_CLR_51_DP_ENCODER1_P0_FLDMASK_LEN

#define IRQ_CLR_51_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 1723 of file dptx_reg.h.

◆ IRQ_CLR_51_DP_ENCODER1_P0_FLDMASK_POS

#define IRQ_CLR_51_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1722 of file dptx_reg.h.

◆ IRQ_CLR_51_DP_TRANS_P0_FLDMASK

#define IRQ_CLR_51_DP_TRANS_P0_FLDMASK   0xf

Definition at line 2468 of file dptx_reg.h.

◆ IRQ_CLR_51_DP_TRANS_P0_FLDMASK_LEN

#define IRQ_CLR_51_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2470 of file dptx_reg.h.

◆ IRQ_CLR_51_DP_TRANS_P0_FLDMASK_POS

#define IRQ_CLR_51_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2469 of file dptx_reg.h.

◆ IRQ_CLR_DP_ENCODER1_P0_FLDMASK

#define IRQ_CLR_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 1696 of file dptx_reg.h.

◆ IRQ_CLR_DP_ENCODER1_P0_FLDMASK_LEN

#define IRQ_CLR_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 1698 of file dptx_reg.h.

◆ IRQ_CLR_DP_ENCODER1_P0_FLDMASK_POS

#define IRQ_CLR_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1697 of file dptx_reg.h.

◆ IRQ_CLR_DP_TRANS_P0_FLDMASK

#define IRQ_CLR_DP_TRANS_P0_FLDMASK   0xf

Definition at line 2451 of file dptx_reg.h.

◆ IRQ_CLR_DP_TRANS_P0_FLDMASK_LEN

#define IRQ_CLR_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2453 of file dptx_reg.h.

◆ IRQ_CLR_DP_TRANS_P0_FLDMASK_POS

#define IRQ_CLR_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2452 of file dptx_reg.h.

◆ IRQ_FINAL_STATUS_51_DP_ENCODER1_P0_FLDMASK

#define IRQ_FINAL_STATUS_51_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 1736 of file dptx_reg.h.

◆ IRQ_FINAL_STATUS_51_DP_ENCODER1_P0_FLDMASK_LEN

#define IRQ_FINAL_STATUS_51_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 1738 of file dptx_reg.h.

◆ IRQ_FINAL_STATUS_51_DP_ENCODER1_P0_FLDMASK_POS

#define IRQ_FINAL_STATUS_51_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1737 of file dptx_reg.h.

◆ IRQ_FINAL_STATUS_DP_ENCODER1_P0_FLDMASK

#define IRQ_FINAL_STATUS_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 1711 of file dptx_reg.h.

◆ IRQ_FINAL_STATUS_DP_ENCODER1_P0_FLDMASK_LEN

#define IRQ_FINAL_STATUS_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 1713 of file dptx_reg.h.

◆ IRQ_FINAL_STATUS_DP_ENCODER1_P0_FLDMASK_POS

#define IRQ_FINAL_STATUS_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1712 of file dptx_reg.h.

◆ IRQ_FORCE_51_DP_ENCODER1_P0_FLDMASK

#define IRQ_FORCE_51_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 1726 of file dptx_reg.h.

◆ IRQ_FORCE_51_DP_ENCODER1_P0_FLDMASK_LEN

#define IRQ_FORCE_51_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 1728 of file dptx_reg.h.

◆ IRQ_FORCE_51_DP_ENCODER1_P0_FLDMASK_POS

#define IRQ_FORCE_51_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1727 of file dptx_reg.h.

◆ IRQ_FORCE_51_DP_TRANS_P0_FLDMASK

#define IRQ_FORCE_51_DP_TRANS_P0_FLDMASK   0xf00

Definition at line 2476 of file dptx_reg.h.

◆ IRQ_FORCE_51_DP_TRANS_P0_FLDMASK_LEN

#define IRQ_FORCE_51_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2478 of file dptx_reg.h.

◆ IRQ_FORCE_51_DP_TRANS_P0_FLDMASK_POS

#define IRQ_FORCE_51_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 2477 of file dptx_reg.h.

◆ IRQ_FORCE_DP_ENCODER1_P0_FLDMASK

#define IRQ_FORCE_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 1701 of file dptx_reg.h.

◆ IRQ_FORCE_DP_ENCODER1_P0_FLDMASK_LEN

#define IRQ_FORCE_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 1703 of file dptx_reg.h.

◆ IRQ_FORCE_DP_ENCODER1_P0_FLDMASK_POS

#define IRQ_FORCE_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1702 of file dptx_reg.h.

◆ IRQ_FORCE_DP_TRANS_P0_FLDMASK

#define IRQ_FORCE_DP_TRANS_P0_FLDMASK   0xf00

Definition at line 2459 of file dptx_reg.h.

◆ IRQ_FORCE_DP_TRANS_P0_FLDMASK_LEN

#define IRQ_FORCE_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2461 of file dptx_reg.h.

◆ IRQ_FORCE_DP_TRANS_P0_FLDMASK_POS

#define IRQ_FORCE_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 2460 of file dptx_reg.h.

◆ IRQ_MASK_51_DP_ENCODER1_P0_FLDMASK

#define IRQ_MASK_51_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 1716 of file dptx_reg.h.

◆ IRQ_MASK_51_DP_ENCODER1_P0_FLDMASK_LEN

#define IRQ_MASK_51_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 1718 of file dptx_reg.h.

◆ IRQ_MASK_51_DP_ENCODER1_P0_FLDMASK_POS

#define IRQ_MASK_51_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1717 of file dptx_reg.h.

◆ IRQ_MASK_51_DP_TRANS_P0_FLDMASK

#define IRQ_MASK_51_DP_TRANS_P0_FLDMASK   0xf0

Definition at line 2472 of file dptx_reg.h.

◆ IRQ_MASK_51_DP_TRANS_P0_FLDMASK_LEN

#define IRQ_MASK_51_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2474 of file dptx_reg.h.

◆ IRQ_MASK_51_DP_TRANS_P0_FLDMASK_POS

#define IRQ_MASK_51_DP_TRANS_P0_FLDMASK_POS   4

Definition at line 2473 of file dptx_reg.h.

◆ IRQ_MASK_DP_ENCODER1_P0_FLDMASK

#define IRQ_MASK_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 1691 of file dptx_reg.h.

◆ IRQ_MASK_DP_ENCODER1_P0_FLDMASK_LEN

#define IRQ_MASK_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 1693 of file dptx_reg.h.

◆ IRQ_MASK_DP_ENCODER1_P0_FLDMASK_POS

#define IRQ_MASK_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1692 of file dptx_reg.h.

◆ IRQ_MASK_DP_TRANS_P0_FLDMASK

#define IRQ_MASK_DP_TRANS_P0_FLDMASK   0xf0

Definition at line 2455 of file dptx_reg.h.

◆ IRQ_MASK_DP_TRANS_P0_FLDMASK_LEN

#define IRQ_MASK_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2457 of file dptx_reg.h.

◆ IRQ_MASK_DP_TRANS_P0_FLDMASK_POS

#define IRQ_MASK_DP_TRANS_P0_FLDMASK_POS   4

Definition at line 2456 of file dptx_reg.h.

◆ IRQ_MASK_FLDMASK

#define IRQ_MASK_FLDMASK   0x7

Definition at line 4260 of file dptx_reg.h.

◆ IRQ_MASK_FLDMASK_LEN

#define IRQ_MASK_FLDMASK_LEN   3

Definition at line 4262 of file dptx_reg.h.

◆ IRQ_MASK_FLDMASK_POS

#define IRQ_MASK_FLDMASK_POS   0

Definition at line 4261 of file dptx_reg.h.

◆ IRQ_OUT_HIGH_ACTIVE_FLDMASK

#define IRQ_OUT_HIGH_ACTIVE_FLDMASK   0x100

Definition at line 4264 of file dptx_reg.h.

◆ IRQ_OUT_HIGH_ACTIVE_FLDMASK_LEN

#define IRQ_OUT_HIGH_ACTIVE_FLDMASK_LEN   1

Definition at line 4266 of file dptx_reg.h.

◆ IRQ_OUT_HIGH_ACTIVE_FLDMASK_POS

#define IRQ_OUT_HIGH_ACTIVE_FLDMASK_POS   8

Definition at line 4265 of file dptx_reg.h.

◆ IRQ_STATUS_51_DP_ENCODER1_P0_FLDMASK

#define IRQ_STATUS_51_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 1731 of file dptx_reg.h.

◆ IRQ_STATUS_51_DP_ENCODER1_P0_FLDMASK_LEN

#define IRQ_STATUS_51_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 1733 of file dptx_reg.h.

◆ IRQ_STATUS_51_DP_ENCODER1_P0_FLDMASK_POS

#define IRQ_STATUS_51_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1732 of file dptx_reg.h.

◆ IRQ_STATUS_51_DP_TRANS_P0_FLDMASK

#define IRQ_STATUS_51_DP_TRANS_P0_FLDMASK   0xf000

Definition at line 2480 of file dptx_reg.h.

◆ IRQ_STATUS_51_DP_TRANS_P0_FLDMASK_LEN

#define IRQ_STATUS_51_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2482 of file dptx_reg.h.

◆ IRQ_STATUS_51_DP_TRANS_P0_FLDMASK_POS

#define IRQ_STATUS_51_DP_TRANS_P0_FLDMASK_POS   12

Definition at line 2481 of file dptx_reg.h.

◆ IRQ_STATUS_DP_ENCODER1_P0_FLDMASK

#define IRQ_STATUS_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 1706 of file dptx_reg.h.

◆ IRQ_STATUS_DP_ENCODER1_P0_FLDMASK_LEN

#define IRQ_STATUS_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 1708 of file dptx_reg.h.

◆ IRQ_STATUS_DP_ENCODER1_P0_FLDMASK_POS

#define IRQ_STATUS_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1707 of file dptx_reg.h.

◆ IRQ_STATUS_DP_TRANS_P0_FLDMASK

#define IRQ_STATUS_DP_TRANS_P0_FLDMASK   0xf000

Definition at line 2463 of file dptx_reg.h.

◆ IRQ_STATUS_DP_TRANS_P0_FLDMASK_LEN

#define IRQ_STATUS_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2465 of file dptx_reg.h.

◆ IRQ_STATUS_DP_TRANS_P0_FLDMASK_POS

#define IRQ_STATUS_DP_TRANS_P0_FLDMASK_POS   12

Definition at line 2464 of file dptx_reg.h.

◆ ISRC0_HB3_DP_ENCODER0_P0_FLDMASK

#define ISRC0_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 619 of file dptx_reg.h.

◆ ISRC0_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define ISRC0_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 621 of file dptx_reg.h.

◆ ISRC0_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define ISRC0_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 620 of file dptx_reg.h.

◆ ISRC1_HB3_DP_ENCODER0_P0_FLDMASK

#define ISRC1_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 1167 of file dptx_reg.h.

◆ ISRC1_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define ISRC1_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1169 of file dptx_reg.h.

◆ ISRC1_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define ISRC1_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 1168 of file dptx_reg.h.

◆ ISRC_CFG_DP_ENCODER0_P0_FLDMASK

#define ISRC_CFG_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 499 of file dptx_reg.h.

◆ ISRC_CFG_DP_ENCODER0_P0_FLDMASK_LEN

#define ISRC_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 501 of file dptx_reg.h.

◆ ISRC_CFG_DP_ENCODER0_P0_FLDMASK_POS

#define ISRC_CFG_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 500 of file dptx_reg.h.

◆ ISRC_CONT_DP_ENCODER0_P0_FLDMASK

#define ISRC_CONT_DP_ENCODER0_P0_FLDMASK   0x1

Definition at line 513 of file dptx_reg.h.

◆ ISRC_CONT_DP_ENCODER0_P0_FLDMASK_LEN

#define ISRC_CONT_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 515 of file dptx_reg.h.

◆ ISRC_CONT_DP_ENCODER0_P0_FLDMASK_POS

#define ISRC_CONT_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 514 of file dptx_reg.h.

◆ ISRC_HB0_DP_ENCODER0_P0_FLDMASK

#define ISRC_HB0_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 606 of file dptx_reg.h.

◆ ISRC_HB0_DP_ENCODER0_P0_FLDMASK_LEN

#define ISRC_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 608 of file dptx_reg.h.

◆ ISRC_HB0_DP_ENCODER0_P0_FLDMASK_POS

#define ISRC_HB0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 607 of file dptx_reg.h.

◆ ISRC_HB1_DP_ENCODER0_P0_FLDMASK

#define ISRC_HB1_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 610 of file dptx_reg.h.

◆ ISRC_HB1_DP_ENCODER0_P0_FLDMASK_LEN

#define ISRC_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 612 of file dptx_reg.h.

◆ ISRC_HB1_DP_ENCODER0_P0_FLDMASK_POS

#define ISRC_HB1_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 611 of file dptx_reg.h.

◆ ISRC_HB2_DP_ENCODER0_P0_FLDMASK

#define ISRC_HB2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 615 of file dptx_reg.h.

◆ ISRC_HB2_DP_ENCODER0_P0_FLDMASK_LEN

#define ISRC_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 617 of file dptx_reg.h.

◆ ISRC_HB2_DP_ENCODER0_P0_FLDMASK_POS

#define ISRC_HB2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 616 of file dptx_reg.h.

◆ KM_GENERATED_DP_TRANS_P0_FLDMASK

#define KM_GENERATED_DP_TRANS_P0_FLDMASK   0x10

Definition at line 2757 of file dptx_reg.h.

◆ KM_GENERATED_DP_TRANS_P0_FLDMASK_LEN

#define KM_GENERATED_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2759 of file dptx_reg.h.

◆ KM_GENERATED_DP_TRANS_P0_FLDMASK_POS

#define KM_GENERATED_DP_TRANS_P0_FLDMASK_POS   4

Definition at line 2758 of file dptx_reg.h.

◆ LANE0_RESET_SW_DP_TRANS_P0_FLDMASK

#define LANE0_RESET_SW_DP_TRANS_P0_FLDMASK   0x200

Definition at line 2392 of file dptx_reg.h.

◆ LANE0_RESET_SW_DP_TRANS_P0_FLDMASK_LEN

#define LANE0_RESET_SW_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2394 of file dptx_reg.h.

◆ LANE0_RESET_SW_DP_TRANS_P0_FLDMASK_POS

#define LANE0_RESET_SW_DP_TRANS_P0_FLDMASK_POS   9

Definition at line 2393 of file dptx_reg.h.

◆ LANE1_RESET_SW_DP_TRANS_P0_FLDMASK

#define LANE1_RESET_SW_DP_TRANS_P0_FLDMASK   0x400

Definition at line 2396 of file dptx_reg.h.

◆ LANE1_RESET_SW_DP_TRANS_P0_FLDMASK_LEN

#define LANE1_RESET_SW_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2398 of file dptx_reg.h.

◆ LANE1_RESET_SW_DP_TRANS_P0_FLDMASK_POS

#define LANE1_RESET_SW_DP_TRANS_P0_FLDMASK_POS   10

Definition at line 2397 of file dptx_reg.h.

◆ LANE2_RESET_SW_DP_TRANS_P0_FLDMASK

#define LANE2_RESET_SW_DP_TRANS_P0_FLDMASK   0x800

Definition at line 2400 of file dptx_reg.h.

◆ LANE2_RESET_SW_DP_TRANS_P0_FLDMASK_LEN

#define LANE2_RESET_SW_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2402 of file dptx_reg.h.

◆ LANE2_RESET_SW_DP_TRANS_P0_FLDMASK_POS

#define LANE2_RESET_SW_DP_TRANS_P0_FLDMASK_POS   11

Definition at line 2401 of file dptx_reg.h.

◆ LANE3_RESET_SW_DP_TRANS_P0_FLDMASK

#define LANE3_RESET_SW_DP_TRANS_P0_FLDMASK   0x1000

Definition at line 2404 of file dptx_reg.h.

◆ LANE3_RESET_SW_DP_TRANS_P0_FLDMASK_LEN

#define LANE3_RESET_SW_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2406 of file dptx_reg.h.

◆ LANE3_RESET_SW_DP_TRANS_P0_FLDMASK_POS

#define LANE3_RESET_SW_DP_TRANS_P0_FLDMASK_POS   12

Definition at line 2405 of file dptx_reg.h.

◆ LANE_NUM_DP_ENCODER0_P0_FLDMASK

#define LANE_NUM_DP_ENCODER0_P0_FLDMASK   0x3

Definition at line 14 of file dptx_reg.h.

◆ LANE_NUM_DP_ENCODER0_P0_FLDMASK_LEN

#define LANE_NUM_DP_ENCODER0_P0_FLDMASK_LEN   2

Definition at line 16 of file dptx_reg.h.

◆ LANE_NUM_DP_ENCODER0_P0_FLDMASK_POS

#define LANE_NUM_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 15 of file dptx_reg.h.

◆ LANE_NUM_DP_TRANS_P0_FLDMASK

#define LANE_NUM_DP_TRANS_P0_FLDMASK   0xc

Definition at line 2786 of file dptx_reg.h.

◆ LANE_NUM_DP_TRANS_P0_FLDMASK_LEN

#define LANE_NUM_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 2788 of file dptx_reg.h.

◆ LANE_NUM_DP_TRANS_P0_FLDMASK_POS

#define LANE_NUM_DP_TRANS_P0_FLDMASK_POS   2

Definition at line 2787 of file dptx_reg.h.

◆ LANE_SKEW_SEL_LANE0_DP_TRANS_P0_FLDMASK

#define LANE_SKEW_SEL_LANE0_DP_TRANS_P0_FLDMASK   0x3

Definition at line 2355 of file dptx_reg.h.

◆ LANE_SKEW_SEL_LANE0_DP_TRANS_P0_FLDMASK_LEN

#define LANE_SKEW_SEL_LANE0_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 2357 of file dptx_reg.h.

◆ LANE_SKEW_SEL_LANE0_DP_TRANS_P0_FLDMASK_POS

#define LANE_SKEW_SEL_LANE0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2356 of file dptx_reg.h.

◆ LANE_SKEW_SEL_LANE1_DP_TRANS_P0_FLDMASK

#define LANE_SKEW_SEL_LANE1_DP_TRANS_P0_FLDMASK   0xc

Definition at line 2359 of file dptx_reg.h.

◆ LANE_SKEW_SEL_LANE1_DP_TRANS_P0_FLDMASK_LEN

#define LANE_SKEW_SEL_LANE1_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 2361 of file dptx_reg.h.

◆ LANE_SKEW_SEL_LANE1_DP_TRANS_P0_FLDMASK_POS

#define LANE_SKEW_SEL_LANE1_DP_TRANS_P0_FLDMASK_POS   2

Definition at line 2360 of file dptx_reg.h.

◆ LANE_SKEW_SEL_LANE2_DP_TRANS_P0_FLDMASK

#define LANE_SKEW_SEL_LANE2_DP_TRANS_P0_FLDMASK   0x30

Definition at line 2363 of file dptx_reg.h.

◆ LANE_SKEW_SEL_LANE2_DP_TRANS_P0_FLDMASK_LEN

#define LANE_SKEW_SEL_LANE2_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 2365 of file dptx_reg.h.

◆ LANE_SKEW_SEL_LANE2_DP_TRANS_P0_FLDMASK_POS

#define LANE_SKEW_SEL_LANE2_DP_TRANS_P0_FLDMASK_POS   4

Definition at line 2364 of file dptx_reg.h.

◆ LANE_SKEW_SEL_LANE3_DP_TRANS_P0_FLDMASK

#define LANE_SKEW_SEL_LANE3_DP_TRANS_P0_FLDMASK   0xc0

Definition at line 2367 of file dptx_reg.h.

◆ LANE_SKEW_SEL_LANE3_DP_TRANS_P0_FLDMASK_LEN

#define LANE_SKEW_SEL_LANE3_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 2369 of file dptx_reg.h.

◆ LANE_SKEW_SEL_LANE3_DP_TRANS_P0_FLDMASK_POS

#define LANE_SKEW_SEL_LANE3_DP_TRANS_P0_FLDMASK_POS   6

Definition at line 2368 of file dptx_reg.h.

◆ LOAD_PREFUSE_FLDMASK

#define LOAD_PREFUSE_FLDMASK   0x8

Definition at line 4286 of file dptx_reg.h.

◆ LOAD_PREFUSE_FLDMASK_LEN

#define LOAD_PREFUSE_FLDMASK_LEN   1

Definition at line 4288 of file dptx_reg.h.

◆ LOAD_PREFUSE_FLDMASK_POS

#define LOAD_PREFUSE_FLDMASK_POS   3

Definition at line 4287 of file dptx_reg.h.

◆ LR_FIELD_SYNC_SEL_DP_ENCODER1_P0_FLDMASK

#define LR_FIELD_SYNC_SEL_DP_ENCODER1_P0_FLDMASK   0x7000

Definition at line 1935 of file dptx_reg.h.

◆ LR_FIELD_SYNC_SEL_DP_ENCODER1_P0_FLDMASK_LEN

#define LR_FIELD_SYNC_SEL_DP_ENCODER1_P0_FLDMASK_LEN   3

Definition at line 1937 of file dptx_reg.h.

◆ LR_FIELD_SYNC_SEL_DP_ENCODER1_P0_FLDMASK_POS

#define LR_FIELD_SYNC_SEL_DP_ENCODER1_P0_FLDMASK_POS   12

Definition at line 1936 of file dptx_reg.h.

◆ M_CODE_FEC_MERGE_0_DP_ENCODER1_P0_FLDMASK

#define M_CODE_FEC_MERGE_0_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 1759 of file dptx_reg.h.

◆ M_CODE_FEC_MERGE_0_DP_ENCODER1_P0_FLDMASK_LEN

#define M_CODE_FEC_MERGE_0_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 1761 of file dptx_reg.h.

◆ M_CODE_FEC_MERGE_0_DP_ENCODER1_P0_FLDMASK_POS

#define M_CODE_FEC_MERGE_0_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1760 of file dptx_reg.h.

◆ M_CODE_FEC_MERGE_1_DP_ENCODER1_P0_FLDMASK

#define M_CODE_FEC_MERGE_1_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1764 of file dptx_reg.h.

◆ M_CODE_FEC_MERGE_1_DP_ENCODER1_P0_FLDMASK_LEN

#define M_CODE_FEC_MERGE_1_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1766 of file dptx_reg.h.

◆ M_CODE_FEC_MERGE_1_DP_ENCODER1_P0_FLDMASK_POS

#define M_CODE_FEC_MERGE_1_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1765 of file dptx_reg.h.

◆ MCU_ACK_TRAN_COMPLETE_AUX_TX_P0_FLDMASK_POS

#define MCU_ACK_TRAN_COMPLETE_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3502 of file dptx_reg.h.

◆ MCU_ACK_TRANSACTION_COMPLETE_AUX_TX_P0_FLDMASK

#define MCU_ACK_TRANSACTION_COMPLETE_AUX_TX_P0_FLDMASK   0x100

Definition at line 3501 of file dptx_reg.h.

◆ MCU_ACK_TRANSACTION_COMPLETE_AUX_TX_P0_FLDMASK_LEN

#define MCU_ACK_TRANSACTION_COMPLETE_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3503 of file dptx_reg.h.

◆ MCU_REQ_DATA_NUM_AUX_TX_P0_FLDMASK_POS

#define MCU_REQ_DATA_NUM_AUX_TX_P0_FLDMASK_POS   12

Definition at line 3494 of file dptx_reg.h.

◆ MCU_REQUEST_ADDRESS_LSB_AUX_TX_P0_FLDMASK

#define MCU_REQUEST_ADDRESS_LSB_AUX_TX_P0_FLDMASK   0xffff

Definition at line 3483 of file dptx_reg.h.

◆ MCU_REQUEST_ADDRESS_LSB_AUX_TX_P0_FLDMASK_LEN

#define MCU_REQUEST_ADDRESS_LSB_AUX_TX_P0_FLDMASK_LEN   16

Definition at line 3485 of file dptx_reg.h.

◆ MCU_REQUEST_ADDRESS_LSB_AUX_TX_P0_FLDMASK_POS

#define MCU_REQUEST_ADDRESS_LSB_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3484 of file dptx_reg.h.

◆ MCU_REQUEST_ADDRESS_MSB_AUX_TX_P0_FLDMASK

#define MCU_REQUEST_ADDRESS_MSB_AUX_TX_P0_FLDMASK   0xf

Definition at line 3488 of file dptx_reg.h.

◆ MCU_REQUEST_ADDRESS_MSB_AUX_TX_P0_FLDMASK_LEN

#define MCU_REQUEST_ADDRESS_MSB_AUX_TX_P0_FLDMASK_LEN   4

Definition at line 3490 of file dptx_reg.h.

◆ MCU_REQUEST_ADDRESS_MSB_AUX_TX_P0_FLDMASK_POS

#define MCU_REQUEST_ADDRESS_MSB_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3489 of file dptx_reg.h.

◆ MCU_REQUEST_COMMAND_AUX_TX_P0_FLDMASK

#define MCU_REQUEST_COMMAND_AUX_TX_P0_FLDMASK   0xf

Definition at line 3474 of file dptx_reg.h.

◆ MCU_REQUEST_COMMAND_AUX_TX_P0_FLDMASK_LEN

#define MCU_REQUEST_COMMAND_AUX_TX_P0_FLDMASK_LEN   4

Definition at line 3476 of file dptx_reg.h.

◆ MCU_REQUEST_COMMAND_AUX_TX_P0_FLDMASK_POS

#define MCU_REQUEST_COMMAND_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3475 of file dptx_reg.h.

◆ MCU_REQUEST_DATA_NUM_AUX_TX_P0_FLDMASK

#define MCU_REQUEST_DATA_NUM_AUX_TX_P0_FLDMASK   0xf000

Definition at line 3493 of file dptx_reg.h.

◆ MCU_REQUEST_DATA_NUM_AUX_TX_P0_FLDMASK_LEN

#define MCU_REQUEST_DATA_NUM_AUX_TX_P0_FLDMASK_LEN   4

Definition at line 3495 of file dptx_reg.h.

◆ MEM_ISO_EN_FLDMASK

#define MEM_ISO_EN_FLDMASK   0x1

Definition at line 4274 of file dptx_reg.h.

◆ MEM_ISO_EN_FLDMASK_LEN

#define MEM_ISO_EN_FLDMASK_LEN   1

Definition at line 4276 of file dptx_reg.h.

◆ MEM_ISO_EN_FLDMASK_POS

#define MEM_ISO_EN_FLDMASK_POS   0

Definition at line 4275 of file dptx_reg.h.

◆ MEM_PD_FLDMASK

#define MEM_PD_FLDMASK   0x2

Definition at line 4278 of file dptx_reg.h.

◆ MEM_PD_FLDMASK_LEN

#define MEM_PD_FLDMASK_LEN   1

Definition at line 4280 of file dptx_reg.h.

◆ MEM_PD_FLDMASK_POS

#define MEM_PD_FLDMASK_POS   1

Definition at line 4279 of file dptx_reg.h.

◆ MISC0_DATA_DP_ENCODER0_P0_FLDMASK

#define MISC0_DATA_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 231 of file dptx_reg.h.

◆ MISC0_DATA_DP_ENCODER0_P0_FLDMASK_LEN

#define MISC0_DATA_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 233 of file dptx_reg.h.

◆ MISC0_DATA_DP_ENCODER0_P0_FLDMASK_POS

#define MISC0_DATA_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 232 of file dptx_reg.h.

◆ MISC1_DATA_DP_ENCODER0_P0_FLDMASK

#define MISC1_DATA_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 235 of file dptx_reg.h.

◆ MISC1_DATA_DP_ENCODER0_P0_FLDMASK_LEN

#define MISC1_DATA_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 237 of file dptx_reg.h.

◆ MISC1_DATA_DP_ENCODER0_P0_FLDMASK_POS

#define MISC1_DATA_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 236 of file dptx_reg.h.

◆ MIXER_DUMMY_DATA_DP_ENCODER0_P0_FLDMASK

#define MIXER_DUMMY_DATA_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 42 of file dptx_reg.h.

◆ MIXER_DUMMY_DATA_DP_ENCODER0_P0_FLDMASK_LEN

#define MIXER_DUMMY_DATA_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 44 of file dptx_reg.h.

◆ MIXER_DUMMY_DATA_DP_ENCODER0_P0_FLDMASK_POS

#define MIXER_DUMMY_DATA_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 43 of file dptx_reg.h.

◆ MIXER_FSM_RESET_DP_ENCODER0_P0_FLDMASK

#define MIXER_FSM_RESET_DP_ENCODER0_P0_FLDMASK   0x8000

Definition at line 79 of file dptx_reg.h.

◆ MIXER_FSM_RESET_DP_ENCODER0_P0_FLDMASK_LEN

#define MIXER_FSM_RESET_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 81 of file dptx_reg.h.

◆ MIXER_FSM_RESET_DP_ENCODER0_P0_FLDMASK_POS

#define MIXER_FSM_RESET_DP_ENCODER0_P0_FLDMASK_POS   15

Definition at line 80 of file dptx_reg.h.

◆ MIXER_RESET_SW_DP_ENCODER0_P0_FLDMASK

#define MIXER_RESET_SW_DP_ENCODER0_P0_FLDMASK   0x400

Definition at line 59 of file dptx_reg.h.

◆ MIXER_RESET_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define MIXER_RESET_SW_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 61 of file dptx_reg.h.

◆ MIXER_RESET_SW_DP_ENCODER0_P0_FLDMASK_POS

#define MIXER_RESET_SW_DP_ENCODER0_P0_FLDMASK_POS   10

Definition at line 60 of file dptx_reg.h.

◆ MIXER_SDP_EN_DP_ENCODER0_P0_FLDMASK

#define MIXER_SDP_EN_DP_ENCODER0_P0_FLDMASK   0x8000

Definition at line 226 of file dptx_reg.h.

◆ MIXER_SDP_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define MIXER_SDP_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 228 of file dptx_reg.h.

◆ MIXER_SDP_EN_DP_ENCODER0_P0_FLDMASK_POS

#define MIXER_SDP_EN_DP_ENCODER0_P0_FLDMASK_POS   15

Definition at line 227 of file dptx_reg.h.

◆ MIXER_STATE_0_DP_ENCODER1_P0_FLDMASK

#define MIXER_STATE_0_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 2230 of file dptx_reg.h.

◆ MIXER_STATE_0_DP_ENCODER1_P0_FLDMASK_LEN

#define MIXER_STATE_0_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 2232 of file dptx_reg.h.

◆ MIXER_STATE_0_DP_ENCODER1_P0_FLDMASK_POS

#define MIXER_STATE_0_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2231 of file dptx_reg.h.

◆ MIXER_STATE_1_DP_ENCODER1_P0_FLDMASK

#define MIXER_STATE_1_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 2235 of file dptx_reg.h.

◆ MIXER_STATE_1_DP_ENCODER1_P0_FLDMASK_LEN

#define MIXER_STATE_1_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 2237 of file dptx_reg.h.

◆ MIXER_STATE_1_DP_ENCODER1_P0_FLDMASK_POS

#define MIXER_STATE_1_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2236 of file dptx_reg.h.

◆ MIXER_STATE_2_DP_ENCODER1_P0_FLDMASK

#define MIXER_STATE_2_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 2240 of file dptx_reg.h.

◆ MIXER_STATE_2_DP_ENCODER1_P0_FLDMASK_LEN

#define MIXER_STATE_2_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 2242 of file dptx_reg.h.

◆ MIXER_STATE_2_DP_ENCODER1_P0_FLDMASK_POS

#define MIXER_STATE_2_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2241 of file dptx_reg.h.

◆ MIXER_STUFF_DUMMY_DATA_DP_ENCODER0_P0_FLDMASK

#define MIXER_STUFF_DUMMY_DATA_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 47 of file dptx_reg.h.

◆ MIXER_STUFF_DUMMY_DATA_DP_ENCODER0_P0_FLDMASK_LEN

#define MIXER_STUFF_DUMMY_DATA_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 49 of file dptx_reg.h.

◆ MIXER_STUFF_DUMMY_DATA_DP_ENCODER0_P0_FLDMASK_POS

#define MIXER_STUFF_DUMMY_DATA_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 48 of file dptx_reg.h.

◆ MPEG_CFG_DP_ENCODER0_P0_FLDMASK

#define MPEG_CFG_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 477 of file dptx_reg.h.

◆ MPEG_CFG_DP_ENCODER0_P0_FLDMASK_LEN

#define MPEG_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 479 of file dptx_reg.h.

◆ MPEG_CFG_DP_ENCODER0_P0_FLDMASK_POS

#define MPEG_CFG_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 478 of file dptx_reg.h.

◆ MPEG_HB0_DP_ENCODER0_P0_FLDMASK

#define MPEG_HB0_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 678 of file dptx_reg.h.

◆ MPEG_HB0_DP_ENCODER0_P0_FLDMASK_LEN

#define MPEG_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 680 of file dptx_reg.h.

◆ MPEG_HB0_DP_ENCODER0_P0_FLDMASK_POS

#define MPEG_HB0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 679 of file dptx_reg.h.

◆ MPEG_HB1_DP_ENCODER0_P0_FLDMASK

#define MPEG_HB1_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 682 of file dptx_reg.h.

◆ MPEG_HB1_DP_ENCODER0_P0_FLDMASK_LEN

#define MPEG_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 684 of file dptx_reg.h.

◆ MPEG_HB1_DP_ENCODER0_P0_FLDMASK_POS

#define MPEG_HB1_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 683 of file dptx_reg.h.

◆ MPEG_HB2_DP_ENCODER0_P0_FLDMASK

#define MPEG_HB2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 687 of file dptx_reg.h.

◆ MPEG_HB2_DP_ENCODER0_P0_FLDMASK_LEN

#define MPEG_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 689 of file dptx_reg.h.

◆ MPEG_HB2_DP_ENCODER0_P0_FLDMASK_POS

#define MPEG_HB2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 688 of file dptx_reg.h.

◆ MPEG_HB3_DP_ENCODER0_P0_FLDMASK

#define MPEG_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 691 of file dptx_reg.h.

◆ MPEG_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define MPEG_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 693 of file dptx_reg.h.

◆ MPEG_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define MPEG_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 692 of file dptx_reg.h.

◆ MSA_BY_SDP_DP_ENCODER0_P0_FLDMASK

#define MSA_BY_SDP_DP_ENCODER0_P0_FLDMASK   0x2

Definition at line 517 of file dptx_reg.h.

◆ MSA_BY_SDP_DP_ENCODER0_P0_FLDMASK_LEN

#define MSA_BY_SDP_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 519 of file dptx_reg.h.

◆ MSA_BY_SDP_DP_ENCODER0_P0_FLDMASK_POS

#define MSA_BY_SDP_DP_ENCODER0_P0_FLDMASK_POS   1

Definition at line 518 of file dptx_reg.h.

◆ MSA_CFG_DP_ENCODER0_P0_FLDMASK

#define MSA_CFG_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 508 of file dptx_reg.h.

◆ MSA_CFG_DP_ENCODER0_P0_FLDMASK_LEN

#define MSA_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 510 of file dptx_reg.h.

◆ MSA_CFG_DP_ENCODER0_P0_FLDMASK_POS

#define MSA_CFG_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 509 of file dptx_reg.h.

◆ MSA_MISC_FROM_DPRX_DP_ENCODER0_P0_FLDMASK

#define MSA_MISC_FROM_DPRX_DP_ENCODER0_P0_FLDMASK   0x2

Definition at line 1151 of file dptx_reg.h.

◆ MSA_MISC_FROM_DPRX_DP_ENCODER0_P0_FLDMASK_LEN

#define MSA_MISC_FROM_DPRX_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1153 of file dptx_reg.h.

◆ MSA_MISC_FROM_DPRX_DP_ENCODER0_P0_FLDMASK_POS

#define MSA_MISC_FROM_DPRX_DP_ENCODER0_P0_FLDMASK_POS   1

Definition at line 1152 of file dptx_reg.h.

◆ MSA_MUTE_MASK_DP_ENCODER1_P0_FLDMASK

#define MSA_MUTE_MASK_DP_ENCODER1_P0_FLDMASK   0x400

Definition at line 1777 of file dptx_reg.h.

◆ MSA_MUTE_MASK_DP_ENCODER1_P0_FLDMASK_LEN

#define MSA_MUTE_MASK_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1779 of file dptx_reg.h.

◆ MSA_MUTE_MASK_DP_ENCODER1_P0_FLDMASK_POS

#define MSA_MUTE_MASK_DP_ENCODER1_P0_FLDMASK_POS   10

Definition at line 1778 of file dptx_reg.h.

◆ MSA_UPDATE_LINE_CNT_THRD_DP_ENCODER1_P0_FLDMASK

#define MSA_UPDATE_LINE_CNT_THRD_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1769 of file dptx_reg.h.

◆ MSA_UPDATE_LINE_CNT_THRD_DP_ENCODER1_P0_FLDMASK_LEN

#define MSA_UPDATE_LINE_CNT_THRD_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1771 of file dptx_reg.h.

◆ MSA_UPDATE_LINE_CNT_THRD_DP_ENCODER1_P0_FLDMASK_POS

#define MSA_UPDATE_LINE_CNT_THRD_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1770 of file dptx_reg.h.

◆ MSA_UPDATE_SEL_DP_ENCODER1_P0_FLDMASK

#define MSA_UPDATE_SEL_DP_ENCODER1_P0_FLDMASK   0x3000

Definition at line 1781 of file dptx_reg.h.

◆ MSA_UPDATE_SEL_DP_ENCODER1_P0_FLDMASK_LEN

#define MSA_UPDATE_SEL_DP_ENCODER1_P0_FLDMASK_LEN   2

Definition at line 1783 of file dptx_reg.h.

◆ MSA_UPDATE_SEL_DP_ENCODER1_P0_FLDMASK_POS

#define MSA_UPDATE_SEL_DP_ENCODER1_P0_FLDMASK_POS   12

Definition at line 1782 of file dptx_reg.h.

◆ MST_DELAY_CYCLE_FLAG_SEL_DP_TRANS_P0_FLDMASK

#define MST_DELAY_CYCLE_FLAG_SEL_DP_TRANS_P0_FLDMASK   0x80

Definition at line 2802 of file dptx_reg.h.

◆ MST_DELAY_CYCLE_FLAG_SEL_DP_TRANS_P0_FLDMASK_LEN

#define MST_DELAY_CYCLE_FLAG_SEL_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2804 of file dptx_reg.h.

◆ MST_DELAY_CYCLE_FLAG_SEL_DP_TRANS_P0_FLDMASK_POS

#define MST_DELAY_CYCLE_FLAG_SEL_DP_TRANS_P0_FLDMASK_POS   7

Definition at line 2803 of file dptx_reg.h.

◆ MST_EN_DP_ENCODER0_P0_FLDMASK

#define MST_EN_DP_ENCODER0_P0_FLDMASK   0x1000

Definition at line 1045 of file dptx_reg.h.

◆ MST_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define MST_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1047 of file dptx_reg.h.

◆ MST_EN_DP_ENCODER0_P0_FLDMASK_POS

#define MST_EN_DP_ENCODER0_P0_FLDMASK_POS   12

Definition at line 1046 of file dptx_reg.h.

◆ MST_EN_DP_TRANS_P0_FLDMASK

#define MST_EN_DP_TRANS_P0_FLDMASK   0x8000

Definition at line 2773 of file dptx_reg.h.

◆ MST_EN_DP_TRANS_P0_FLDMASK_LEN

#define MST_EN_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2775 of file dptx_reg.h.

◆ MST_EN_DP_TRANS_P0_FLDMASK_POS

#define MST_EN_DP_TRANS_P0_FLDMASK_POS   15

Definition at line 2774 of file dptx_reg.h.

◆ MTK_ATOP_EN_AUX_TX_P0_FLDMASK

#define MTK_ATOP_EN_AUX_TX_P0_FLDMASK   0x1

Definition at line 4151 of file dptx_reg.h.

◆ MTK_ATOP_EN_AUX_TX_P0_FLDMASK_LEN

#define MTK_ATOP_EN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 4153 of file dptx_reg.h.

◆ MTK_ATOP_EN_AUX_TX_P0_FLDMASK_POS

#define MTK_ATOP_EN_AUX_TX_P0_FLDMASK_POS   0

Definition at line 4152 of file dptx_reg.h.

◆ NIBBLE_INTERLEAVER_EN_DP_ENCODER0_P0_FLDMASK

#define NIBBLE_INTERLEAVER_EN_DP_ENCODER0_P0_FLDMASK   0x8

Definition at line 525 of file dptx_reg.h.

◆ NIBBLE_INTERLEAVER_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define NIBBLE_INTERLEAVER_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 527 of file dptx_reg.h.

◆ NIBBLE_INTERLEAVER_EN_DP_ENCODER0_P0_FLDMASK_POS

#define NIBBLE_INTERLEAVER_EN_DP_ENCODER0_P0_FLDMASK_POS   3

Definition at line 526 of file dptx_reg.h.

◆ NO_AUTH_READ_VALUE_FLDMASK

#define NO_AUTH_READ_VALUE_FLDMASK   0xffffffffL

Definition at line 4619 of file dptx_reg.h.

◆ NO_AUTH_READ_VALUE_FLDMASK_LEN

#define NO_AUTH_READ_VALUE_FLDMASK_LEN   32

Definition at line 4621 of file dptx_reg.h.

◆ NO_AUTH_READ_VALUE_FLDMASK_POS

#define NO_AUTH_READ_VALUE_FLDMASK_POS   0

Definition at line 4620 of file dptx_reg.h.

◆ NTSC_CFG_DP_ENCODER0_P0_FLDMASK

#define NTSC_CFG_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 481 of file dptx_reg.h.

◆ NTSC_CFG_DP_ENCODER0_P0_FLDMASK_LEN

#define NTSC_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 483 of file dptx_reg.h.

◆ NTSC_CFG_DP_ENCODER0_P0_FLDMASK_POS

#define NTSC_CFG_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 482 of file dptx_reg.h.

◆ NTSC_HB0_DP_ENCODER0_P0_FLDMASK

#define NTSC_HB0_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 696 of file dptx_reg.h.

◆ NTSC_HB0_DP_ENCODER0_P0_FLDMASK_LEN

#define NTSC_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 698 of file dptx_reg.h.

◆ NTSC_HB0_DP_ENCODER0_P0_FLDMASK_POS

#define NTSC_HB0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 697 of file dptx_reg.h.

◆ NTSC_HB1_DP_ENCODER0_P0_FLDMASK

#define NTSC_HB1_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 700 of file dptx_reg.h.

◆ NTSC_HB1_DP_ENCODER0_P0_FLDMASK_LEN

#define NTSC_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 702 of file dptx_reg.h.

◆ NTSC_HB1_DP_ENCODER0_P0_FLDMASK_POS

#define NTSC_HB1_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 701 of file dptx_reg.h.

◆ NTSC_HB2_DP_ENCODER0_P0_FLDMASK

#define NTSC_HB2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 705 of file dptx_reg.h.

◆ NTSC_HB2_DP_ENCODER0_P0_FLDMASK_LEN

#define NTSC_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 707 of file dptx_reg.h.

◆ NTSC_HB2_DP_ENCODER0_P0_FLDMASK_POS

#define NTSC_HB2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 706 of file dptx_reg.h.

◆ NTSC_HB3_DP_ENCODER0_P0_FLDMASK

#define NTSC_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 709 of file dptx_reg.h.

◆ NTSC_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define NTSC_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 711 of file dptx_reg.h.

◆ NTSC_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define NTSC_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 710 of file dptx_reg.h.

◆ NUM_INTERLACE_FRAME_DP_ENCODER0_P0_FLDMASK

#define NUM_INTERLACE_FRAME_DP_ENCODER0_P0_FLDMASK   0x7

Definition at line 362 of file dptx_reg.h.

◆ NUM_INTERLACE_FRAME_DP_ENCODER0_P0_FLDMASK_LEN

#define NUM_INTERLACE_FRAME_DP_ENCODER0_P0_FLDMASK_LEN   3

Definition at line 364 of file dptx_reg.h.

◆ NUM_INTERLACE_FRAME_DP_ENCODER0_P0_FLDMASK_POS

#define NUM_INTERLACE_FRAME_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 363 of file dptx_reg.h.

◆ OFFSET_TRY_NUM_AUX_TX_P0_FLDMASK

#define OFFSET_TRY_NUM_AUX_TX_P0_FLDMASK   0xf00

Definition at line 3848 of file dptx_reg.h.

◆ OFFSET_TRY_NUM_AUX_TX_P0_FLDMASK_LEN

#define OFFSET_TRY_NUM_AUX_TX_P0_FLDMASK_LEN   4

Definition at line 3850 of file dptx_reg.h.

◆ OFFSET_TRY_NUM_AUX_TX_P0_FLDMASK_POS

#define OFFSET_TRY_NUM_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3849 of file dptx_reg.h.

◆ PARITY_INTERLEAVER_DATA_INVERT_PIPE_SEL_DP_TRANS_P0_FLDMASK

#define PARITY_INTERLEAVER_DATA_INVERT_PIPE_SEL_DP_TRANS_P0_FLDMASK   0x700

Definition at line 2990 of file dptx_reg.h.

◆ PARITY_INTERLEAVER_DATA_INVERT_PIPE_SEL_DP_TRANS_P0_FLDMASK_LEN

#define PARITY_INTERLEAVER_DATA_INVERT_PIPE_SEL_DP_TRANS_P0_FLDMASK_LEN   3

Definition at line 2992 of file dptx_reg.h.

◆ PARITY_INTERLEAVER_DATA_INVERT_PIPE_SEL_DP_TRANS_P0_FLDMASK_POS

#define PARITY_INTERLEAVER_DATA_INVERT_PIPE_SEL_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 2991 of file dptx_reg.h.

◆ PAT_INIT_DISPARITY_DP_TRANS_P0_FLDMASK

#define PAT_INIT_DISPARITY_DP_TRANS_P0_FLDMASK   0x40

Definition at line 2346 of file dptx_reg.h.

◆ PAT_INIT_DISPARITY_DP_TRANS_P0_FLDMASK_LEN

#define PAT_INIT_DISPARITY_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2348 of file dptx_reg.h.

◆ PAT_INIT_DISPARITY_DP_TRANS_P0_FLDMASK_POS

#define PAT_INIT_DISPARITY_DP_TRANS_P0_FLDMASK_POS   6

Definition at line 2347 of file dptx_reg.h.

◆ PAT_INIT_DISPARITY_FEC_DP_TRANS_P0_FLDMASK

#define PAT_INIT_DISPARITY_FEC_DP_TRANS_P0_FLDMASK   0x800

Definition at line 2994 of file dptx_reg.h.

◆ PAT_INIT_DISPARITY_FEC_DP_TRANS_P0_FLDMASK_LEN

#define PAT_INIT_DISPARITY_FEC_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2996 of file dptx_reg.h.

◆ PAT_INIT_DISPARITY_FEC_DP_TRANS_P0_FLDMASK_POS

#define PAT_INIT_DISPARITY_FEC_DP_TRANS_P0_FLDMASK_POS   11

Definition at line 2995 of file dptx_reg.h.

◆ PATTERN1_EN_DP_TRANS_P0_FLDMASK

#define PATTERN1_EN_DP_TRANS_P0_FLDMASK   0x1000

Definition at line 2309 of file dptx_reg.h.

◆ PATTERN1_EN_DP_TRANS_P0_FLDMASK_LEN

#define PATTERN1_EN_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2311 of file dptx_reg.h.

◆ PATTERN1_EN_DP_TRANS_P0_FLDMASK_POS

#define PATTERN1_EN_DP_TRANS_P0_FLDMASK_POS   12

Definition at line 2310 of file dptx_reg.h.

◆ PATTERN2_EN_DP_TRANS_P0_FLDMASK

#define PATTERN2_EN_DP_TRANS_P0_FLDMASK   0x2000

Definition at line 2313 of file dptx_reg.h.

◆ PATTERN2_EN_DP_TRANS_P0_FLDMASK_LEN

#define PATTERN2_EN_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2315 of file dptx_reg.h.

◆ PATTERN2_EN_DP_TRANS_P0_FLDMASK_POS

#define PATTERN2_EN_DP_TRANS_P0_FLDMASK_POS   13

Definition at line 2314 of file dptx_reg.h.

◆ PATTERN3_EN_DP_TRANS_P0_FLDMASK

#define PATTERN3_EN_DP_TRANS_P0_FLDMASK   0x4000

Definition at line 2317 of file dptx_reg.h.

◆ PATTERN3_EN_DP_TRANS_P0_FLDMASK_LEN

#define PATTERN3_EN_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2319 of file dptx_reg.h.

◆ PATTERN3_EN_DP_TRANS_P0_FLDMASK_POS

#define PATTERN3_EN_DP_TRANS_P0_FLDMASK_POS   14

Definition at line 2318 of file dptx_reg.h.

◆ PATTERN4_EN_DP_TRANS_P0_FLDMASK

#define PATTERN4_EN_DP_TRANS_P0_FLDMASK   0x8000

Definition at line 2321 of file dptx_reg.h.

◆ PATTERN4_EN_DP_TRANS_P0_FLDMASK_LEN

#define PATTERN4_EN_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2323 of file dptx_reg.h.

◆ PATTERN4_EN_DP_TRANS_P0_FLDMASK_POS

#define PATTERN4_EN_DP_TRANS_P0_FLDMASK_POS   15

Definition at line 2322 of file dptx_reg.h.

◆ PD_AUX_RTERM_AUX_TX_P0_FLDMASK

#define PD_AUX_RTERM_AUX_TX_P0_FLDMASK   0x400

Definition at line 3613 of file dptx_reg.h.

◆ PD_AUX_RTERM_AUX_TX_P0_FLDMASK_LEN

#define PD_AUX_RTERM_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3615 of file dptx_reg.h.

◆ PD_AUX_RTERM_AUX_TX_P0_FLDMASK_POS

#define PD_AUX_RTERM_AUX_TX_P0_FLDMASK_POS   10

Definition at line 3614 of file dptx_reg.h.

◆ PD_NGATE_OV_AUX_TX_P0_FLDMASK

#define PD_NGATE_OV_AUX_TX_P0_FLDMASK   0x10

Definition at line 4003 of file dptx_reg.h.

◆ PD_NGATE_OV_AUX_TX_P0_FLDMASK_LEN

#define PD_NGATE_OV_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 4005 of file dptx_reg.h.

◆ PD_NGATE_OV_AUX_TX_P0_FLDMASK_POS

#define PD_NGATE_OV_AUX_TX_P0_FLDMASK_POS   4

Definition at line 4004 of file dptx_reg.h.

◆ PD_NGATE_OVEN_AUX_TX_P0_FLDMASK

#define PD_NGATE_OVEN_AUX_TX_P0_FLDMASK   0x20

Definition at line 4007 of file dptx_reg.h.

◆ PD_NGATE_OVEN_AUX_TX_P0_FLDMASK_LEN

#define PD_NGATE_OVEN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 4009 of file dptx_reg.h.

◆ PD_NGATE_OVEN_AUX_TX_P0_FLDMASK_POS

#define PD_NGATE_OVEN_AUX_TX_P0_FLDMASK_POS   5

Definition at line 4008 of file dptx_reg.h.

◆ PD_VCM_OP_AUX_TX_P0_FLDMASK

#define PD_VCM_OP_AUX_TX_P0_FLDMASK   0x40

Definition at line 4011 of file dptx_reg.h.

◆ PD_VCM_OP_AUX_TX_P0_FLDMASK_LEN

#define PD_VCM_OP_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 4013 of file dptx_reg.h.

◆ PD_VCM_OP_AUX_TX_P0_FLDMASK_POS

#define PD_VCM_OP_AUX_TX_P0_FLDMASK_POS   6

Definition at line 4012 of file dptx_reg.h.

◆ PGEN_CURSOR_EN_DP_ENCODER0_P0_FLDMASK

#define PGEN_CURSOR_EN_DP_ENCODER0_P0_FLDMASK   0x8000

Definition at line 834 of file dptx_reg.h.

◆ PGEN_CURSOR_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_CURSOR_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 836 of file dptx_reg.h.

◆ PGEN_CURSOR_EN_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_CURSOR_EN_DP_ENCODER0_P0_FLDMASK_POS   15

Definition at line 835 of file dptx_reg.h.

◆ PGEN_CURSOR_H_DP_ENCODER0_P0_FLDMASK

#define PGEN_CURSOR_H_DP_ENCODER0_P0_FLDMASK   0x3fff

Definition at line 839 of file dptx_reg.h.

◆ PGEN_CURSOR_H_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_CURSOR_H_DP_ENCODER0_P0_FLDMASK_LEN   14

Definition at line 841 of file dptx_reg.h.

◆ PGEN_CURSOR_H_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_CURSOR_H_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 840 of file dptx_reg.h.

◆ PGEN_CURSOR_RGB_COLOR_CODE_0_DP_ENCODER0_P0_FLDMASK

#define PGEN_CURSOR_RGB_COLOR_CODE_0_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 844 of file dptx_reg.h.

◆ PGEN_CURSOR_RGB_COLOR_CODE_0_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_CURSOR_RGB_COLOR_CODE_0_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 846 of file dptx_reg.h.

◆ PGEN_CURSOR_RGB_COLOR_CODE_0_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_CURSOR_RGB_COLOR_CODE_0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 845 of file dptx_reg.h.

◆ PGEN_CURSOR_RGB_COLOR_CODE_1_DP_ENCODER0_P0_FLDMASK

#define PGEN_CURSOR_RGB_COLOR_CODE_1_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 849 of file dptx_reg.h.

◆ PGEN_CURSOR_RGB_COLOR_CODE_1_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_CURSOR_RGB_COLOR_CODE_1_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 851 of file dptx_reg.h.

◆ PGEN_CURSOR_RGB_COLOR_CODE_1_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_CURSOR_RGB_COLOR_CODE_1_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 850 of file dptx_reg.h.

◆ PGEN_CURSOR_RGB_COLOR_CODE_2_DP_ENCODER0_P0_FLDMASK

#define PGEN_CURSOR_RGB_COLOR_CODE_2_DP_ENCODER0_P0_FLDMASK   0xf

Definition at line 854 of file dptx_reg.h.

◆ PGEN_CURSOR_RGB_COLOR_CODE_2_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_CURSOR_RGB_COLOR_CODE_2_DP_ENCODER0_P0_FLDMASK_LEN   4

Definition at line 856 of file dptx_reg.h.

◆ PGEN_CURSOR_RGB_COLOR_CODE_2_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_CURSOR_RGB_COLOR_CODE_2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 855 of file dptx_reg.h.

◆ PGEN_CURSOR_V_DP_ENCODER0_P0_FLDMASK

#define PGEN_CURSOR_V_DP_ENCODER0_P0_FLDMASK   0x1fff

Definition at line 822 of file dptx_reg.h.

◆ PGEN_CURSOR_V_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_CURSOR_V_DP_ENCODER0_P0_FLDMASK_LEN   13

Definition at line 824 of file dptx_reg.h.

◆ PGEN_CURSOR_V_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_CURSOR_V_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 823 of file dptx_reg.h.

◆ PGEN_FRAME_8K4K_MODE_EN_DP_ENCODER0_P0_FLDMASK

#define PGEN_FRAME_8K4K_MODE_EN_DP_ENCODER0_P0_FLDMASK   0x10

Definition at line 938 of file dptx_reg.h.

◆ PGEN_FRAME_8K4K_MODE_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_FRAME_8K4K_MODE_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 940 of file dptx_reg.h.

◆ PGEN_FRAME_8K4K_MODE_EN_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_FRAME_8K4K_MODE_EN_DP_ENCODER0_P0_FLDMASK_POS   4

Definition at line 939 of file dptx_reg.h.

◆ PGEN_FRAME_8K4K_MODE_SET_DP_ENCODER0_P0_FLDMASK

#define PGEN_FRAME_8K4K_MODE_SET_DP_ENCODER0_P0_FLDMASK   0x20

Definition at line 942 of file dptx_reg.h.

◆ PGEN_FRAME_8K4K_MODE_SET_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_FRAME_8K4K_MODE_SET_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 944 of file dptx_reg.h.

◆ PGEN_FRAME_8K4K_MODE_SET_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_FRAME_8K4K_MODE_SET_DP_ENCODER0_P0_FLDMASK_POS   5

Definition at line 943 of file dptx_reg.h.

◆ PGEN_FRAME_END_H_EN_DP_ENCODER0_P0_FLDMASK

#define PGEN_FRAME_END_H_EN_DP_ENCODER0_P0_FLDMASK   0x100

Definition at line 954 of file dptx_reg.h.

◆ PGEN_FRAME_END_H_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_FRAME_END_H_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 956 of file dptx_reg.h.

◆ PGEN_FRAME_END_H_EN_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_FRAME_END_H_EN_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 955 of file dptx_reg.h.

◆ PGEN_FRAME_END_V_EN_DP_ENCODER0_P0_FLDMASK

#define PGEN_FRAME_END_V_EN_DP_ENCODER0_P0_FLDMASK   0x200

Definition at line 958 of file dptx_reg.h.

◆ PGEN_FRAME_END_V_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_FRAME_END_V_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 960 of file dptx_reg.h.

◆ PGEN_FRAME_END_V_EN_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_FRAME_END_V_EN_DP_ENCODER0_P0_FLDMASK_POS   9

Definition at line 959 of file dptx_reg.h.

◆ PGEN_HFDE_ACTIVE_WIDTH_DP_ENCODER0_P0_FLDMASK

#define PGEN_HFDE_ACTIVE_WIDTH_DP_ENCODER0_P0_FLDMASK   0x3fff

Definition at line 879 of file dptx_reg.h.

◆ PGEN_HFDE_ACTIVE_WIDTH_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_HFDE_ACTIVE_WIDTH_DP_ENCODER0_P0_FLDMASK_LEN   14

Definition at line 881 of file dptx_reg.h.

◆ PGEN_HFDE_ACTIVE_WIDTH_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_HFDE_ACTIVE_WIDTH_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 880 of file dptx_reg.h.

◆ PGEN_HFDE_START_DP_ENCODER0_P0_FLDMASK

#define PGEN_HFDE_START_DP_ENCODER0_P0_FLDMASK   0x3fff

Definition at line 874 of file dptx_reg.h.

◆ PGEN_HFDE_START_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_HFDE_START_DP_ENCODER0_P0_FLDMASK_LEN   14

Definition at line 876 of file dptx_reg.h.

◆ PGEN_HFDE_START_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_HFDE_START_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 875 of file dptx_reg.h.

◆ PGEN_HSYNC_PULSE_WIDTH_DP_ENCODER0_P0_FLDMASK

#define PGEN_HSYNC_PULSE_WIDTH_DP_ENCODER0_P0_FLDMASK   0x3fff

Definition at line 869 of file dptx_reg.h.

◆ PGEN_HSYNC_PULSE_WIDTH_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_HSYNC_PULSE_WIDTH_DP_ENCODER0_P0_FLDMASK_LEN   14

Definition at line 871 of file dptx_reg.h.

◆ PGEN_HSYNC_PULSE_WIDTH_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_HSYNC_PULSE_WIDTH_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 870 of file dptx_reg.h.

◆ PGEN_HSYNC_RISING_DP_ENCODER0_P0_FLDMASK

#define PGEN_HSYNC_RISING_DP_ENCODER0_P0_FLDMASK   0x3fff

Definition at line 864 of file dptx_reg.h.

◆ PGEN_HSYNC_RISING_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_HSYNC_RISING_DP_ENCODER0_P0_FLDMASK_LEN   14

Definition at line 866 of file dptx_reg.h.

◆ PGEN_HSYNC_RISING_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_HSYNC_RISING_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 865 of file dptx_reg.h.

◆ PGEN_HTOTAL_DP_ENCODER0_P0_FLDMASK

#define PGEN_HTOTAL_DP_ENCODER0_P0_FLDMASK   0x3fff

Definition at line 859 of file dptx_reg.h.

◆ PGEN_HTOTAL_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_HTOTAL_DP_ENCODER0_P0_FLDMASK_LEN   14

Definition at line 861 of file dptx_reg.h.

◆ PGEN_HTOTAL_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_HTOTAL_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 860 of file dptx_reg.h.

◆ PGEN_INITIAL_CB_SEL_DP_ENCODER0_P0_FLDMASK

#define PGEN_INITIAL_CB_SEL_DP_ENCODER0_P0_FLDMASK   0x7

Definition at line 934 of file dptx_reg.h.

◆ PGEN_INITIAL_CB_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_INITIAL_CB_SEL_DP_ENCODER0_P0_FLDMASK_LEN   3

Definition at line 936 of file dptx_reg.h.

◆ PGEN_INITIAL_CB_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_INITIAL_CB_SEL_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 935 of file dptx_reg.h.

◆ PGEN_INITIAL_H_CNT_DP_ENCODER0_P0_FLDMASK

#define PGEN_INITIAL_H_CNT_DP_ENCODER0_P0_FLDMASK   0x3fff

Definition at line 924 of file dptx_reg.h.

◆ PGEN_INITIAL_H_CNT_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_INITIAL_H_CNT_DP_ENCODER0_P0_FLDMASK_LEN   14

Definition at line 926 of file dptx_reg.h.

◆ PGEN_INITIAL_H_CNT_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_INITIAL_H_CNT_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 925 of file dptx_reg.h.

◆ PGEN_INITIAL_H_GRAD_FLAG_DP_ENCODER0_P0_FLDMASK

#define PGEN_INITIAL_H_GRAD_FLAG_DP_ENCODER0_P0_FLDMASK   0x40

Definition at line 946 of file dptx_reg.h.

◆ PGEN_INITIAL_H_GRAD_FLAG_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_INITIAL_H_GRAD_FLAG_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 948 of file dptx_reg.h.

◆ PGEN_INITIAL_H_GRAD_FLAG_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_INITIAL_H_GRAD_FLAG_DP_ENCODER0_P0_FLDMASK_POS   6

Definition at line 947 of file dptx_reg.h.

◆ PGEN_INITIAL_V_CNT_DP_ENCODER0_P0_FLDMASK

#define PGEN_INITIAL_V_CNT_DP_ENCODER0_P0_FLDMASK   0x1fff

Definition at line 929 of file dptx_reg.h.

◆ PGEN_INITIAL_V_CNT_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_INITIAL_V_CNT_DP_ENCODER0_P0_FLDMASK_LEN   13

Definition at line 931 of file dptx_reg.h.

◆ PGEN_INITIAL_V_CNT_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_INITIAL_V_CNT_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 930 of file dptx_reg.h.

◆ PGEN_INITIAL_V_GRAD_FLAG_DP_ENCODER0_P0_FLDMASK

#define PGEN_INITIAL_V_GRAD_FLAG_DP_ENCODER0_P0_FLDMASK   0x80

Definition at line 950 of file dptx_reg.h.

◆ PGEN_INITIAL_V_GRAD_FLAG_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_INITIAL_V_GRAD_FLAG_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 952 of file dptx_reg.h.

◆ PGEN_INITIAL_V_GRAD_FLAG_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_INITIAL_V_GRAD_FLAG_DP_ENCODER0_P0_FLDMASK_POS   7

Definition at line 951 of file dptx_reg.h.

◆ PGEN_PAT_BASE_PIXEL_0_DP_ENCODER0_P0_FLDMASK

#define PGEN_PAT_BASE_PIXEL_0_DP_ENCODER0_P0_FLDMASK   0xfff

Definition at line 909 of file dptx_reg.h.

◆ PGEN_PAT_BASE_PIXEL_0_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PAT_BASE_PIXEL_0_DP_ENCODER0_P0_FLDMASK_LEN   12

Definition at line 911 of file dptx_reg.h.

◆ PGEN_PAT_BASE_PIXEL_0_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PAT_BASE_PIXEL_0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 910 of file dptx_reg.h.

◆ PGEN_PAT_BASE_PIXEL_1_DP_ENCODER0_P0_FLDMASK

#define PGEN_PAT_BASE_PIXEL_1_DP_ENCODER0_P0_FLDMASK   0xfff

Definition at line 914 of file dptx_reg.h.

◆ PGEN_PAT_BASE_PIXEL_1_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PAT_BASE_PIXEL_1_DP_ENCODER0_P0_FLDMASK_LEN   12

Definition at line 916 of file dptx_reg.h.

◆ PGEN_PAT_BASE_PIXEL_1_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PAT_BASE_PIXEL_1_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 915 of file dptx_reg.h.

◆ PGEN_PAT_BASE_PIXEL_2_DP_ENCODER0_P0_FLDMASK

#define PGEN_PAT_BASE_PIXEL_2_DP_ENCODER0_P0_FLDMASK   0xfff

Definition at line 919 of file dptx_reg.h.

◆ PGEN_PAT_BASE_PIXEL_2_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PAT_BASE_PIXEL_2_DP_ENCODER0_P0_FLDMASK_LEN   12

Definition at line 921 of file dptx_reg.h.

◆ PGEN_PAT_BASE_PIXEL_2_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PAT_BASE_PIXEL_2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 920 of file dptx_reg.h.

◆ PGEN_PAT_CHESSBOARD_NORMAL_MODE_DP_ENCODER0_P0_FLDMASK

#define PGEN_PAT_CHESSBOARD_NORMAL_MODE_DP_ENCODER0_P0_FLDMASK   0x400

Definition at line 1018 of file dptx_reg.h.

◆ PGEN_PAT_CHESSBOARD_NORMAL_MODE_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PAT_CHESSBOARD_NORMAL_MODE_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1020 of file dptx_reg.h.

◆ PGEN_PAT_CHESSBOARD_NORMAL_MODE_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PAT_CHESSBOARD_NORMAL_MODE_DP_ENCODER0_P0_FLDMASK_POS   10

Definition at line 1019 of file dptx_reg.h.

◆ PGEN_PAT_COLOR_BAR_GRADIENT_EN_DP_ENCODER0_P0_FLDMASK

#define PGEN_PAT_COLOR_BAR_GRADIENT_EN_DP_ENCODER0_P0_FLDMASK   0x200

Definition at line 1014 of file dptx_reg.h.

◆ PGEN_PAT_COLOR_BAR_GRADIENT_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PAT_COLOR_BAR_GRADIENT_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1016 of file dptx_reg.h.

◆ PGEN_PAT_COLOR_BAR_GRADIENT_EN_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PAT_COLOR_BAR_GRADIENT_EN_DP_ENCODER0_P0_FLDMASK_POS   9

Definition at line 1015 of file dptx_reg.h.

◆ PGEN_PAT_DIRECTION_DP_ENCODER0_P0_FLDMASK

#define PGEN_PAT_DIRECTION_DP_ENCODER0_P0_FLDMASK   0x80

Definition at line 1006 of file dptx_reg.h.

◆ PGEN_PAT_DIRECTION_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PAT_DIRECTION_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1008 of file dptx_reg.h.

◆ PGEN_PAT_DIRECTION_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PAT_DIRECTION_DP_ENCODER0_P0_FLDMASK_POS   7

Definition at line 1007 of file dptx_reg.h.

◆ PGEN_PAT_EXCHANGE_DP_ENCODER0_P0_FLDMASK

#define PGEN_PAT_EXCHANGE_DP_ENCODER0_P0_FLDMASK   0x800

Definition at line 1022 of file dptx_reg.h.

◆ PGEN_PAT_EXCHANGE_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PAT_EXCHANGE_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1024 of file dptx_reg.h.

◆ PGEN_PAT_EXCHANGE_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PAT_EXCHANGE_DP_ENCODER0_P0_FLDMASK_POS   11

Definition at line 1023 of file dptx_reg.h.

◆ PGEN_PAT_EXTRA_PIXEL_0_DP_ENCODER0_P0_FLDMASK

#define PGEN_PAT_EXTRA_PIXEL_0_DP_ENCODER0_P0_FLDMASK   0xfff

Definition at line 963 of file dptx_reg.h.

◆ PGEN_PAT_EXTRA_PIXEL_0_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PAT_EXTRA_PIXEL_0_DP_ENCODER0_P0_FLDMASK_LEN   12

Definition at line 965 of file dptx_reg.h.

◆ PGEN_PAT_EXTRA_PIXEL_0_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PAT_EXTRA_PIXEL_0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 964 of file dptx_reg.h.

◆ PGEN_PAT_EXTRA_PIXEL_1_DP_ENCODER0_P0_FLDMASK

#define PGEN_PAT_EXTRA_PIXEL_1_DP_ENCODER0_P0_FLDMASK   0xfff

Definition at line 968 of file dptx_reg.h.

◆ PGEN_PAT_EXTRA_PIXEL_1_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PAT_EXTRA_PIXEL_1_DP_ENCODER0_P0_FLDMASK_LEN   12

Definition at line 970 of file dptx_reg.h.

◆ PGEN_PAT_EXTRA_PIXEL_1_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PAT_EXTRA_PIXEL_1_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 969 of file dptx_reg.h.

◆ PGEN_PAT_EXTRA_PIXEL_2_DP_ENCODER0_P0_FLDMASK

#define PGEN_PAT_EXTRA_PIXEL_2_DP_ENCODER0_P0_FLDMASK   0xfff

Definition at line 973 of file dptx_reg.h.

◆ PGEN_PAT_EXTRA_PIXEL_2_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PAT_EXTRA_PIXEL_2_DP_ENCODER0_P0_FLDMASK_LEN   12

Definition at line 975 of file dptx_reg.h.

◆ PGEN_PAT_EXTRA_PIXEL_2_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PAT_EXTRA_PIXEL_2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 974 of file dptx_reg.h.

◆ PGEN_PAT_GRADIENT_NORMAL_MODE_DP_ENCODER0_P0_FLDMASK

#define PGEN_PAT_GRADIENT_NORMAL_MODE_DP_ENCODER0_P0_FLDMASK   0x100

Definition at line 1010 of file dptx_reg.h.

◆ PGEN_PAT_GRADIENT_NORMAL_MODE_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PAT_GRADIENT_NORMAL_MODE_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1012 of file dptx_reg.h.

◆ PGEN_PAT_GRADIENT_NORMAL_MODE_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PAT_GRADIENT_NORMAL_MODE_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 1011 of file dptx_reg.h.

◆ PGEN_PAT_HWIDTH_DP_ENCODER0_P0_FLDMASK

#define PGEN_PAT_HWIDTH_DP_ENCODER0_P0_FLDMASK   0x3fff

Definition at line 988 of file dptx_reg.h.

◆ PGEN_PAT_HWIDTH_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PAT_HWIDTH_DP_ENCODER0_P0_FLDMASK_LEN   14

Definition at line 990 of file dptx_reg.h.

◆ PGEN_PAT_HWIDTH_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PAT_HWIDTH_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 989 of file dptx_reg.h.

◆ PGEN_PAT_INCREMENT_0_DP_ENCODER0_P0_FLDMASK

#define PGEN_PAT_INCREMENT_0_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 978 of file dptx_reg.h.

◆ PGEN_PAT_INCREMENT_0_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PAT_INCREMENT_0_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 980 of file dptx_reg.h.

◆ PGEN_PAT_INCREMENT_0_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PAT_INCREMENT_0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 979 of file dptx_reg.h.

◆ PGEN_PAT_INCREMENT_1_DP_ENCODER0_P0_FLDMASK

#define PGEN_PAT_INCREMENT_1_DP_ENCODER0_P0_FLDMASK   0x1

Definition at line 983 of file dptx_reg.h.

◆ PGEN_PAT_INCREMENT_1_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PAT_INCREMENT_1_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 985 of file dptx_reg.h.

◆ PGEN_PAT_INCREMENT_1_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PAT_INCREMENT_1_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 984 of file dptx_reg.h.

◆ PGEN_PAT_RGB_ENABLE_DP_ENCODER0_P0_FLDMASK

#define PGEN_PAT_RGB_ENABLE_DP_ENCODER0_P0_FLDMASK   0x7

Definition at line 998 of file dptx_reg.h.

◆ PGEN_PAT_RGB_ENABLE_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PAT_RGB_ENABLE_DP_ENCODER0_P0_FLDMASK_LEN   3

Definition at line 1000 of file dptx_reg.h.

◆ PGEN_PAT_RGB_ENABLE_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PAT_RGB_ENABLE_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 999 of file dptx_reg.h.

◆ PGEN_PAT_RGB_SUB_PIXEL_MASK_DP_ENCODER0_P0_FLDMASK

#define PGEN_PAT_RGB_SUB_PIXEL_MASK_DP_ENCODER0_P0_FLDMASK   0x1000

Definition at line 1026 of file dptx_reg.h.

◆ PGEN_PAT_RGB_SUB_PIXEL_MASK_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PAT_RGB_SUB_PIXEL_MASK_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1028 of file dptx_reg.h.

◆ PGEN_PAT_RGB_SUB_PIXEL_MASK_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PAT_RGB_SUB_PIXEL_MASK_DP_ENCODER0_P0_FLDMASK_POS   12

Definition at line 1027 of file dptx_reg.h.

◆ PGEN_PAT_THICKNESS_DP_ENCODER0_P0_FLDMASK

#define PGEN_PAT_THICKNESS_DP_ENCODER0_P0_FLDMASK   0xf

Definition at line 1031 of file dptx_reg.h.

◆ PGEN_PAT_THICKNESS_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PAT_THICKNESS_DP_ENCODER0_P0_FLDMASK_LEN   4

Definition at line 1033 of file dptx_reg.h.

◆ PGEN_PAT_THICKNESS_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PAT_THICKNESS_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 1032 of file dptx_reg.h.

◆ PGEN_PAT_VWIDTH_DP_ENCODER0_P0_FLDMASK

#define PGEN_PAT_VWIDTH_DP_ENCODER0_P0_FLDMASK   0x1fff

Definition at line 993 of file dptx_reg.h.

◆ PGEN_PAT_VWIDTH_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PAT_VWIDTH_DP_ENCODER0_P0_FLDMASK_LEN   13

Definition at line 995 of file dptx_reg.h.

◆ PGEN_PAT_VWIDTH_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PAT_VWIDTH_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 994 of file dptx_reg.h.

◆ PGEN_PATTERN_SEL_DP_ENCODER0_P0_FLDMASK

#define PGEN_PATTERN_SEL_DP_ENCODER0_P0_FLDMASK   0x70

Definition at line 1002 of file dptx_reg.h.

◆ PGEN_PATTERN_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PATTERN_SEL_DP_ENCODER0_P0_FLDMASK_LEN   3

Definition at line 1004 of file dptx_reg.h.

◆ PGEN_PATTERN_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PATTERN_SEL_DP_ENCODER0_P0_FLDMASK_POS   4

Definition at line 1003 of file dptx_reg.h.

◆ PGEN_PG_SEL_DP_ENCODER0_P0_FLDMASK

#define PGEN_PG_SEL_DP_ENCODER0_P0_FLDMASK   0x4000

Definition at line 830 of file dptx_reg.h.

◆ PGEN_PG_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_PG_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 832 of file dptx_reg.h.

◆ PGEN_PG_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_PG_SEL_DP_ENCODER0_P0_FLDMASK_POS   14

Definition at line 831 of file dptx_reg.h.

◆ PGEN_TG_SEL_DP_ENCODER0_P0_FLDMASK

#define PGEN_TG_SEL_DP_ENCODER0_P0_FLDMASK   0x2000

Definition at line 826 of file dptx_reg.h.

◆ PGEN_TG_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_TG_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 828 of file dptx_reg.h.

◆ PGEN_TG_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_TG_SEL_DP_ENCODER0_P0_FLDMASK_POS   13

Definition at line 827 of file dptx_reg.h.

◆ PGEN_VFDE_ACTIVE_WIDTH_DP_ENCODER0_P0_FLDMASK

#define PGEN_VFDE_ACTIVE_WIDTH_DP_ENCODER0_P0_FLDMASK   0x1fff

Definition at line 904 of file dptx_reg.h.

◆ PGEN_VFDE_ACTIVE_WIDTH_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_VFDE_ACTIVE_WIDTH_DP_ENCODER0_P0_FLDMASK_LEN   13

Definition at line 906 of file dptx_reg.h.

◆ PGEN_VFDE_ACTIVE_WIDTH_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_VFDE_ACTIVE_WIDTH_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 905 of file dptx_reg.h.

◆ PGEN_VFDE_START_DP_ENCODER0_P0_FLDMASK

#define PGEN_VFDE_START_DP_ENCODER0_P0_FLDMASK   0x1fff

Definition at line 899 of file dptx_reg.h.

◆ PGEN_VFDE_START_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_VFDE_START_DP_ENCODER0_P0_FLDMASK_LEN   13

Definition at line 901 of file dptx_reg.h.

◆ PGEN_VFDE_START_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_VFDE_START_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 900 of file dptx_reg.h.

◆ PGEN_VSYNC_PULSE_WIDTH_DP_ENCODER0_P0_FLDMASK

#define PGEN_VSYNC_PULSE_WIDTH_DP_ENCODER0_P0_FLDMASK   0x1fff

Definition at line 894 of file dptx_reg.h.

◆ PGEN_VSYNC_PULSE_WIDTH_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_VSYNC_PULSE_WIDTH_DP_ENCODER0_P0_FLDMASK_LEN   13

Definition at line 896 of file dptx_reg.h.

◆ PGEN_VSYNC_PULSE_WIDTH_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_VSYNC_PULSE_WIDTH_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 895 of file dptx_reg.h.

◆ PGEN_VSYNC_RISING_DP_ENCODER0_P0_FLDMASK

#define PGEN_VSYNC_RISING_DP_ENCODER0_P0_FLDMASK   0x1fff

Definition at line 889 of file dptx_reg.h.

◆ PGEN_VSYNC_RISING_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_VSYNC_RISING_DP_ENCODER0_P0_FLDMASK_LEN   13

Definition at line 891 of file dptx_reg.h.

◆ PGEN_VSYNC_RISING_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_VSYNC_RISING_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 890 of file dptx_reg.h.

◆ PGEN_VTOTAL_DP_ENCODER0_P0_FLDMASK

#define PGEN_VTOTAL_DP_ENCODER0_P0_FLDMASK   0x1fff

Definition at line 884 of file dptx_reg.h.

◆ PGEN_VTOTAL_DP_ENCODER0_P0_FLDMASK_LEN

#define PGEN_VTOTAL_DP_ENCODER0_P0_FLDMASK_LEN   13

Definition at line 886 of file dptx_reg.h.

◆ PGEN_VTOTAL_DP_ENCODER0_P0_FLDMASK_POS

#define PGEN_VTOTAL_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 885 of file dptx_reg.h.

◆ PGM_PAT_EN_DP_TRANS_P0_FLDMASK

#define PGM_PAT_EN_DP_TRANS_P0_FLDMASK   0xf

Definition at line 2549 of file dptx_reg.h.

◆ PGM_PAT_EN_DP_TRANS_P0_FLDMASK_LEN

#define PGM_PAT_EN_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2551 of file dptx_reg.h.

◆ PGM_PAT_EN_DP_TRANS_P0_FLDMASK_POS

#define PGM_PAT_EN_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2550 of file dptx_reg.h.

◆ PGM_PAT_L0_0_DP_TRANS_P0_FLDMASK

#define PGM_PAT_L0_0_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2575 of file dptx_reg.h.

◆ PGM_PAT_L0_0_DP_TRANS_P0_FLDMASK_LEN

#define PGM_PAT_L0_0_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2577 of file dptx_reg.h.

◆ PGM_PAT_L0_0_DP_TRANS_P0_FLDMASK_POS

#define PGM_PAT_L0_0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2576 of file dptx_reg.h.

◆ PGM_PAT_L0_1_DP_TRANS_P0_FLDMASK

#define PGM_PAT_L0_1_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2580 of file dptx_reg.h.

◆ PGM_PAT_L0_1_DP_TRANS_P0_FLDMASK_LEN

#define PGM_PAT_L0_1_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2582 of file dptx_reg.h.

◆ PGM_PAT_L0_1_DP_TRANS_P0_FLDMASK_POS

#define PGM_PAT_L0_1_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2581 of file dptx_reg.h.

◆ PGM_PAT_L0_2_DP_TRANS_P0_FLDMASK

#define PGM_PAT_L0_2_DP_TRANS_P0_FLDMASK   0xff

Definition at line 2585 of file dptx_reg.h.

◆ PGM_PAT_L0_2_DP_TRANS_P0_FLDMASK_LEN

#define PGM_PAT_L0_2_DP_TRANS_P0_FLDMASK_LEN   8

Definition at line 2587 of file dptx_reg.h.

◆ PGM_PAT_L0_2_DP_TRANS_P0_FLDMASK_POS

#define PGM_PAT_L0_2_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2586 of file dptx_reg.h.

◆ PGM_PAT_L1_0_DP_TRANS_P0_FLDMASK

#define PGM_PAT_L1_0_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2590 of file dptx_reg.h.

◆ PGM_PAT_L1_0_DP_TRANS_P0_FLDMASK_LEN

#define PGM_PAT_L1_0_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2592 of file dptx_reg.h.

◆ PGM_PAT_L1_0_DP_TRANS_P0_FLDMASK_POS

#define PGM_PAT_L1_0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2591 of file dptx_reg.h.

◆ PGM_PAT_L1_1_DP_TRANS_P0_FLDMASK

#define PGM_PAT_L1_1_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2595 of file dptx_reg.h.

◆ PGM_PAT_L1_1_DP_TRANS_P0_FLDMASK_LEN

#define PGM_PAT_L1_1_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2597 of file dptx_reg.h.

◆ PGM_PAT_L1_1_DP_TRANS_P0_FLDMASK_POS

#define PGM_PAT_L1_1_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2596 of file dptx_reg.h.

◆ PGM_PAT_L1_2_DP_TRANS_P0_FLDMASK

#define PGM_PAT_L1_2_DP_TRANS_P0_FLDMASK   0xff

Definition at line 2600 of file dptx_reg.h.

◆ PGM_PAT_L1_2_DP_TRANS_P0_FLDMASK_LEN

#define PGM_PAT_L1_2_DP_TRANS_P0_FLDMASK_LEN   8

Definition at line 2602 of file dptx_reg.h.

◆ PGM_PAT_L1_2_DP_TRANS_P0_FLDMASK_POS

#define PGM_PAT_L1_2_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2601 of file dptx_reg.h.

◆ PGM_PAT_L2_0_DP_TRANS_P0_FLDMASK

#define PGM_PAT_L2_0_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2605 of file dptx_reg.h.

◆ PGM_PAT_L2_0_DP_TRANS_P0_FLDMASK_LEN

#define PGM_PAT_L2_0_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2607 of file dptx_reg.h.

◆ PGM_PAT_L2_0_DP_TRANS_P0_FLDMASK_POS

#define PGM_PAT_L2_0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2606 of file dptx_reg.h.

◆ PGM_PAT_L2_1_DP_TRANS_P0_FLDMASK

#define PGM_PAT_L2_1_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2610 of file dptx_reg.h.

◆ PGM_PAT_L2_1_DP_TRANS_P0_FLDMASK_LEN

#define PGM_PAT_L2_1_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2612 of file dptx_reg.h.

◆ PGM_PAT_L2_1_DP_TRANS_P0_FLDMASK_POS

#define PGM_PAT_L2_1_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2611 of file dptx_reg.h.

◆ PGM_PAT_L2_2_DP_TRANS_P0_FLDMASK

#define PGM_PAT_L2_2_DP_TRANS_P0_FLDMASK   0xff

Definition at line 2615 of file dptx_reg.h.

◆ PGM_PAT_L2_2_DP_TRANS_P0_FLDMASK_LEN

#define PGM_PAT_L2_2_DP_TRANS_P0_FLDMASK_LEN   8

Definition at line 2617 of file dptx_reg.h.

◆ PGM_PAT_L2_2_DP_TRANS_P0_FLDMASK_POS

#define PGM_PAT_L2_2_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2616 of file dptx_reg.h.

◆ PGM_PAT_L3_0_DP_TRANS_P0_FLDMASK

#define PGM_PAT_L3_0_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2620 of file dptx_reg.h.

◆ PGM_PAT_L3_0_DP_TRANS_P0_FLDMASK_LEN

#define PGM_PAT_L3_0_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2622 of file dptx_reg.h.

◆ PGM_PAT_L3_0_DP_TRANS_P0_FLDMASK_POS

#define PGM_PAT_L3_0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2621 of file dptx_reg.h.

◆ PGM_PAT_L3_1_DP_TRANS_P0_FLDMASK

#define PGM_PAT_L3_1_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 2625 of file dptx_reg.h.

◆ PGM_PAT_L3_1_DP_TRANS_P0_FLDMASK_LEN

#define PGM_PAT_L3_1_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 2627 of file dptx_reg.h.

◆ PGM_PAT_L3_1_DP_TRANS_P0_FLDMASK_POS

#define PGM_PAT_L3_1_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2626 of file dptx_reg.h.

◆ PGM_PAT_L3_2_DP_TRANS_P0_FLDMASK

#define PGM_PAT_L3_2_DP_TRANS_P0_FLDMASK   0xff

Definition at line 2630 of file dptx_reg.h.

◆ PGM_PAT_L3_2_DP_TRANS_P0_FLDMASK_LEN

#define PGM_PAT_L3_2_DP_TRANS_P0_FLDMASK_LEN   8

Definition at line 2632 of file dptx_reg.h.

◆ PGM_PAT_L3_2_DP_TRANS_P0_FLDMASK_POS

#define PGM_PAT_L3_2_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2631 of file dptx_reg.h.

◆ PGM_PAT_SEL_L0_DP_TRANS_P0_FLDMASK

#define PGM_PAT_SEL_L0_DP_TRANS_P0_FLDMASK   0x70

Definition at line 2553 of file dptx_reg.h.

◆ PGM_PAT_SEL_L0_DP_TRANS_P0_FLDMASK_LEN

#define PGM_PAT_SEL_L0_DP_TRANS_P0_FLDMASK_LEN   3

Definition at line 2555 of file dptx_reg.h.

◆ PGM_PAT_SEL_L0_DP_TRANS_P0_FLDMASK_POS

#define PGM_PAT_SEL_L0_DP_TRANS_P0_FLDMASK_POS   4

Definition at line 2554 of file dptx_reg.h.

◆ PGM_PAT_SEL_L1_DP_TRANS_P0_FLDMASK

#define PGM_PAT_SEL_L1_DP_TRANS_P0_FLDMASK   0x700

Definition at line 2557 of file dptx_reg.h.

◆ PGM_PAT_SEL_L1_DP_TRANS_P0_FLDMASK_LEN

#define PGM_PAT_SEL_L1_DP_TRANS_P0_FLDMASK_LEN   3

Definition at line 2559 of file dptx_reg.h.

◆ PGM_PAT_SEL_L1_DP_TRANS_P0_FLDMASK_POS

#define PGM_PAT_SEL_L1_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 2558 of file dptx_reg.h.

◆ PGM_PAT_SEL_L2_DP_TRANS_P0_FLDMASK

#define PGM_PAT_SEL_L2_DP_TRANS_P0_FLDMASK   0x7000

Definition at line 2561 of file dptx_reg.h.

◆ PGM_PAT_SEL_L2_DP_TRANS_P0_FLDMASK_LEN

#define PGM_PAT_SEL_L2_DP_TRANS_P0_FLDMASK_LEN   3

Definition at line 2563 of file dptx_reg.h.

◆ PGM_PAT_SEL_L2_DP_TRANS_P0_FLDMASK_POS

#define PGM_PAT_SEL_L2_DP_TRANS_P0_FLDMASK_POS   12

Definition at line 2562 of file dptx_reg.h.

◆ PGM_PAT_SEL_L3_DP_TRANS_P0_FLDMASK

#define PGM_PAT_SEL_L3_DP_TRANS_P0_FLDMASK   0x7

Definition at line 2566 of file dptx_reg.h.

◆ PGM_PAT_SEL_L3_DP_TRANS_P0_FLDMASK_LEN

#define PGM_PAT_SEL_L3_DP_TRANS_P0_FLDMASK_LEN   3

Definition at line 2568 of file dptx_reg.h.

◆ PGM_PAT_SEL_L3_DP_TRANS_P0_FLDMASK_POS

#define PGM_PAT_SEL_L3_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2567 of file dptx_reg.h.

◆ PHY_FIFO_RST_AUX_TX_P0_FLDMASK

#define PHY_FIFO_RST_AUX_TX_P0_FLDMASK   0x200

Definition at line 3497 of file dptx_reg.h.

◆ PHY_FIFO_RST_AUX_TX_P0_FLDMASK_LEN

#define PHY_FIFO_RST_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3499 of file dptx_reg.h.

◆ PHY_FIFO_RST_AUX_TX_P0_FLDMASK_POS

#define PHY_FIFO_RST_AUX_TX_P0_FLDMASK_POS   9

Definition at line 3498 of file dptx_reg.h.

◆ PHYWAKE_PRE_NUM_AUX_TX_P0_FLDMASK

#define PHYWAKE_PRE_NUM_AUX_TX_P0_FLDMASK   0x70

Definition at line 3883 of file dptx_reg.h.

◆ PHYWAKE_PRE_NUM_AUX_TX_P0_FLDMASK_LEN

#define PHYWAKE_PRE_NUM_AUX_TX_P0_FLDMASK_LEN   3

Definition at line 3885 of file dptx_reg.h.

◆ PHYWAKE_PRE_NUM_AUX_TX_P0_FLDMASK_POS

#define PHYWAKE_PRE_NUM_AUX_TX_P0_FLDMASK_POS   4

Definition at line 3884 of file dptx_reg.h.

◆ PIPE_DELAY_DP_TRANS_P0_FLDMASK

#define PIPE_DELAY_DP_TRANS_P0_FLDMASK   0xf000

Definition at line 2840 of file dptx_reg.h.

◆ PIPE_DELAY_DP_TRANS_P0_FLDMASK_LEN

#define PIPE_DELAY_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2842 of file dptx_reg.h.

◆ PIPE_DELAY_DP_TRANS_P0_FLDMASK_POS

#define PIPE_DELAY_DP_TRANS_P0_FLDMASK_POS   12

Definition at line 2841 of file dptx_reg.h.

◆ PIPE_DELAY_EN_CNT_DP_TRANS_P0_FLDMASK

#define PIPE_DELAY_EN_CNT_DP_TRANS_P0_FLDMASK   0xf00

Definition at line 2836 of file dptx_reg.h.

◆ PIPE_DELAY_EN_CNT_DP_TRANS_P0_FLDMASK_LEN

#define PIPE_DELAY_EN_CNT_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2838 of file dptx_reg.h.

◆ PIPE_DELAY_EN_CNT_DP_TRANS_P0_FLDMASK_POS

#define PIPE_DELAY_EN_CNT_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 2837 of file dptx_reg.h.

◆ PIPE_OV_ENABLE_DP_TRANS_P0_FLDMASK

#define PIPE_OV_ENABLE_DP_TRANS_P0_FLDMASK   0x1000

Definition at line 2893 of file dptx_reg.h.

◆ PIPE_OV_ENABLE_DP_TRANS_P0_FLDMASK_LEN

#define PIPE_OV_ENABLE_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2895 of file dptx_reg.h.

◆ PIPE_OV_ENABLE_DP_TRANS_P0_FLDMASK_POS

#define PIPE_OV_ENABLE_DP_TRANS_P0_FLDMASK_POS   12

Definition at line 2894 of file dptx_reg.h.

◆ PIPE_OV_VALUE_DP_TRANS_P0_FLDMASK

#define PIPE_OV_VALUE_DP_TRANS_P0_FLDMASK   0xf00

Definition at line 2889 of file dptx_reg.h.

◆ PIPE_OV_VALUE_DP_TRANS_P0_FLDMASK_LEN

#define PIPE_OV_VALUE_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2891 of file dptx_reg.h.

◆ PIPE_OV_VALUE_DP_TRANS_P0_FLDMASK_POS

#define PIPE_OV_VALUE_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 2890 of file dptx_reg.h.

◆ PIXEL_ENCODE_FORMAT_DP_ENCODER0_P0_FLDMASK

#define PIXEL_ENCODE_FORMAT_DP_ENCODER0_P0_FLDMASK   0x7000

Definition at line 277 of file dptx_reg.h.

◆ PIXEL_ENCODE_FORMAT_DP_ENCODER0_P0_FLDMASK_LEN

#define PIXEL_ENCODE_FORMAT_DP_ENCODER0_P0_FLDMASK_LEN   3

Definition at line 279 of file dptx_reg.h.

◆ PIXEL_ENCODE_FORMAT_DP_ENCODER0_P0_FLDMASK_POS

#define PIXEL_ENCODE_FORMAT_DP_ENCODER0_P0_FLDMASK_POS   12

Definition at line 278 of file dptx_reg.h.

◆ POST_MISC_BIT_REVERSE_EN_LANE0_DP_TRANS_P0_FLDMASK

#define POST_MISC_BIT_REVERSE_EN_LANE0_DP_TRANS_P0_FLDMASK   0x1

Definition at line 2490 of file dptx_reg.h.

◆ POST_MISC_BIT_REVERSE_EN_LANE0_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_BIT_REVERSE_EN_LANE0_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2492 of file dptx_reg.h.

◆ POST_MISC_BIT_REVERSE_EN_LANE0_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_BIT_REVERSE_EN_LANE0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2491 of file dptx_reg.h.

◆ POST_MISC_BIT_REVERSE_EN_LANE1_DP_TRANS_P0_FLDMASK

#define POST_MISC_BIT_REVERSE_EN_LANE1_DP_TRANS_P0_FLDMASK   0x2

Definition at line 2494 of file dptx_reg.h.

◆ POST_MISC_BIT_REVERSE_EN_LANE1_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_BIT_REVERSE_EN_LANE1_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2496 of file dptx_reg.h.

◆ POST_MISC_BIT_REVERSE_EN_LANE1_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_BIT_REVERSE_EN_LANE1_DP_TRANS_P0_FLDMASK_POS   1

Definition at line 2495 of file dptx_reg.h.

◆ POST_MISC_BIT_REVERSE_EN_LANE2_DP_TRANS_P0_FLDMASK

#define POST_MISC_BIT_REVERSE_EN_LANE2_DP_TRANS_P0_FLDMASK   0x4

Definition at line 2498 of file dptx_reg.h.

◆ POST_MISC_BIT_REVERSE_EN_LANE2_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_BIT_REVERSE_EN_LANE2_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2500 of file dptx_reg.h.

◆ POST_MISC_BIT_REVERSE_EN_LANE2_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_BIT_REVERSE_EN_LANE2_DP_TRANS_P0_FLDMASK_POS   2

Definition at line 2499 of file dptx_reg.h.

◆ POST_MISC_BIT_REVERSE_EN_LANE3_DP_TRANS_P0_FLDMASK

#define POST_MISC_BIT_REVERSE_EN_LANE3_DP_TRANS_P0_FLDMASK   0x8

Definition at line 2502 of file dptx_reg.h.

◆ POST_MISC_BIT_REVERSE_EN_LANE3_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_BIT_REVERSE_EN_LANE3_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2504 of file dptx_reg.h.

◆ POST_MISC_BIT_REVERSE_EN_LANE3_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_BIT_REVERSE_EN_LANE3_DP_TRANS_P0_FLDMASK_POS   3

Definition at line 2503 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE0_0_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_LANE0_0_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3110 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE0_0_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_LANE0_0_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3112 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE0_0_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_LANE0_0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3111 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE0_1_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_LANE0_1_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3115 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE0_1_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_LANE0_1_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3117 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE0_1_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_LANE0_1_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3116 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE0_2_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_LANE0_2_DP_TRANS_P0_FLDMASK   0xff

Definition at line 3120 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE0_2_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_LANE0_2_DP_TRANS_P0_FLDMASK_LEN   8

Definition at line 3122 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE0_2_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_LANE0_2_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3121 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE0_OV_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_LANE0_OV_DP_TRANS_P0_FLDMASK   0x100

Definition at line 3093 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE0_OV_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_LANE0_OV_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 3095 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE0_OV_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_LANE0_OV_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 3094 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE1_0_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_LANE1_0_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3125 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE1_0_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_LANE1_0_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3127 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE1_0_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_LANE1_0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3126 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE1_1_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_LANE1_1_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3130 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE1_1_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_LANE1_1_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3132 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE1_1_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_LANE1_1_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3131 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE1_2_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_LANE1_2_DP_TRANS_P0_FLDMASK   0xff

Definition at line 3135 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE1_2_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_LANE1_2_DP_TRANS_P0_FLDMASK_LEN   8

Definition at line 3137 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE1_2_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_LANE1_2_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3136 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE1_OV_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_LANE1_OV_DP_TRANS_P0_FLDMASK   0x200

Definition at line 3097 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE1_OV_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_LANE1_OV_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 3099 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE1_OV_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_LANE1_OV_DP_TRANS_P0_FLDMASK_POS   9

Definition at line 3098 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE2_0_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_LANE2_0_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3140 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE2_0_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_LANE2_0_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3142 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE2_0_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_LANE2_0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3141 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE2_1_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_LANE2_1_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3145 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE2_1_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_LANE2_1_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3147 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE2_1_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_LANE2_1_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3146 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE2_2_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_LANE2_2_DP_TRANS_P0_FLDMASK   0xff

Definition at line 3150 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE2_2_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_LANE2_2_DP_TRANS_P0_FLDMASK_LEN   8

Definition at line 3152 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE2_2_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_LANE2_2_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3151 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE2_OV_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_LANE2_OV_DP_TRANS_P0_FLDMASK   0x400

Definition at line 3101 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE2_OV_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_LANE2_OV_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 3103 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE2_OV_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_LANE2_OV_DP_TRANS_P0_FLDMASK_POS   10

Definition at line 3102 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE3_0_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_LANE3_0_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3155 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE3_0_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_LANE3_0_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3157 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE3_0_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_LANE3_0_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3156 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE3_1_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_LANE3_1_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3160 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE3_1_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_LANE3_1_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3162 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE3_1_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_LANE3_1_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3161 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE3_2_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_LANE3_2_DP_TRANS_P0_FLDMASK   0xff

Definition at line 3165 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE3_2_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_LANE3_2_DP_TRANS_P0_FLDMASK_LEN   8

Definition at line 3167 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE3_2_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_LANE3_2_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3166 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE3_OV_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_LANE3_OV_DP_TRANS_P0_FLDMASK   0x800

Definition at line 3105 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE3_OV_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_LANE3_OV_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 3107 of file dptx_reg.h.

◆ POST_MISC_DATA_LANE3_OV_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_LANE3_OV_DP_TRANS_P0_FLDMASK_POS   11

Definition at line 3106 of file dptx_reg.h.

◆ POST_MISC_DATA_SWAP_EN_LANE0_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_SWAP_EN_LANE0_DP_TRANS_P0_FLDMASK   0x100

Definition at line 2522 of file dptx_reg.h.

◆ POST_MISC_DATA_SWAP_EN_LANE0_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_SWAP_EN_LANE0_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2524 of file dptx_reg.h.

◆ POST_MISC_DATA_SWAP_EN_LANE0_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_SWAP_EN_LANE0_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 2523 of file dptx_reg.h.

◆ POST_MISC_DATA_SWAP_EN_LANE1_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_SWAP_EN_LANE1_DP_TRANS_P0_FLDMASK   0x200

Definition at line 2526 of file dptx_reg.h.

◆ POST_MISC_DATA_SWAP_EN_LANE1_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_SWAP_EN_LANE1_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2528 of file dptx_reg.h.

◆ POST_MISC_DATA_SWAP_EN_LANE1_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_SWAP_EN_LANE1_DP_TRANS_P0_FLDMASK_POS   9

Definition at line 2527 of file dptx_reg.h.

◆ POST_MISC_DATA_SWAP_EN_LANE2_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_SWAP_EN_LANE2_DP_TRANS_P0_FLDMASK   0x400

Definition at line 2530 of file dptx_reg.h.

◆ POST_MISC_DATA_SWAP_EN_LANE2_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_SWAP_EN_LANE2_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2532 of file dptx_reg.h.

◆ POST_MISC_DATA_SWAP_EN_LANE2_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_SWAP_EN_LANE2_DP_TRANS_P0_FLDMASK_POS   10

Definition at line 2531 of file dptx_reg.h.

◆ POST_MISC_DATA_SWAP_EN_LANE3_DP_TRANS_P0_FLDMASK

#define POST_MISC_DATA_SWAP_EN_LANE3_DP_TRANS_P0_FLDMASK   0x800

Definition at line 2534 of file dptx_reg.h.

◆ POST_MISC_DATA_SWAP_EN_LANE3_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_DATA_SWAP_EN_LANE3_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2536 of file dptx_reg.h.

◆ POST_MISC_DATA_SWAP_EN_LANE3_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_DATA_SWAP_EN_LANE3_DP_TRANS_P0_FLDMASK_POS   11

Definition at line 2535 of file dptx_reg.h.

◆ POST_MISC_LANE0_MUX_DP_TRANS_P0_FLDMASK

#define POST_MISC_LANE0_MUX_DP_TRANS_P0_FLDMASK   0x300

Definition at line 2371 of file dptx_reg.h.

◆ POST_MISC_LANE0_MUX_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_LANE0_MUX_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 2373 of file dptx_reg.h.

◆ POST_MISC_LANE0_MUX_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_LANE0_MUX_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 2372 of file dptx_reg.h.

◆ POST_MISC_LANE1_MUX_DP_TRANS_P0_FLDMASK

#define POST_MISC_LANE1_MUX_DP_TRANS_P0_FLDMASK   0xc00

Definition at line 2375 of file dptx_reg.h.

◆ POST_MISC_LANE1_MUX_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_LANE1_MUX_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 2377 of file dptx_reg.h.

◆ POST_MISC_LANE1_MUX_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_LANE1_MUX_DP_TRANS_P0_FLDMASK_POS   10

Definition at line 2376 of file dptx_reg.h.

◆ POST_MISC_LANE2_MUX_DP_TRANS_P0_FLDMASK

#define POST_MISC_LANE2_MUX_DP_TRANS_P0_FLDMASK   0x3000

Definition at line 2379 of file dptx_reg.h.

◆ POST_MISC_LANE2_MUX_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_LANE2_MUX_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 2381 of file dptx_reg.h.

◆ POST_MISC_LANE2_MUX_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_LANE2_MUX_DP_TRANS_P0_FLDMASK_POS   12

Definition at line 2380 of file dptx_reg.h.

◆ POST_MISC_LANE3_MUX_DP_TRANS_P0_FLDMASK

#define POST_MISC_LANE3_MUX_DP_TRANS_P0_FLDMASK   0xc000

Definition at line 2383 of file dptx_reg.h.

◆ POST_MISC_LANE3_MUX_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_LANE3_MUX_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 2385 of file dptx_reg.h.

◆ POST_MISC_LANE3_MUX_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_LANE3_MUX_DP_TRANS_P0_FLDMASK_POS   14

Definition at line 2384 of file dptx_reg.h.

◆ POST_MISC_PN_SWAP_EN_LANE0_DP_TRANS_P0_FLDMASK

#define POST_MISC_PN_SWAP_EN_LANE0_DP_TRANS_P0_FLDMASK   0x10

Definition at line 2506 of file dptx_reg.h.

◆ POST_MISC_PN_SWAP_EN_LANE0_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_PN_SWAP_EN_LANE0_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2508 of file dptx_reg.h.

◆ POST_MISC_PN_SWAP_EN_LANE0_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_PN_SWAP_EN_LANE0_DP_TRANS_P0_FLDMASK_POS   4

Definition at line 2507 of file dptx_reg.h.

◆ POST_MISC_PN_SWAP_EN_LANE1_DP_TRANS_P0_FLDMASK

#define POST_MISC_PN_SWAP_EN_LANE1_DP_TRANS_P0_FLDMASK   0x20

Definition at line 2510 of file dptx_reg.h.

◆ POST_MISC_PN_SWAP_EN_LANE1_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_PN_SWAP_EN_LANE1_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2512 of file dptx_reg.h.

◆ POST_MISC_PN_SWAP_EN_LANE1_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_PN_SWAP_EN_LANE1_DP_TRANS_P0_FLDMASK_POS   5

Definition at line 2511 of file dptx_reg.h.

◆ POST_MISC_PN_SWAP_EN_LANE2_DP_TRANS_P0_FLDMASK

#define POST_MISC_PN_SWAP_EN_LANE2_DP_TRANS_P0_FLDMASK   0x40

Definition at line 2514 of file dptx_reg.h.

◆ POST_MISC_PN_SWAP_EN_LANE2_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_PN_SWAP_EN_LANE2_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2516 of file dptx_reg.h.

◆ POST_MISC_PN_SWAP_EN_LANE2_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_PN_SWAP_EN_LANE2_DP_TRANS_P0_FLDMASK_POS   6

Definition at line 2515 of file dptx_reg.h.

◆ POST_MISC_PN_SWAP_EN_LANE3_DP_TRANS_P0_FLDMASK

#define POST_MISC_PN_SWAP_EN_LANE3_DP_TRANS_P0_FLDMASK   0x80

Definition at line 2518 of file dptx_reg.h.

◆ POST_MISC_PN_SWAP_EN_LANE3_DP_TRANS_P0_FLDMASK_LEN

#define POST_MISC_PN_SWAP_EN_LANE3_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2520 of file dptx_reg.h.

◆ POST_MISC_PN_SWAP_EN_LANE3_DP_TRANS_P0_FLDMASK_POS

#define POST_MISC_PN_SWAP_EN_LANE3_DP_TRANS_P0_FLDMASK_POS   7

Definition at line 2519 of file dptx_reg.h.

◆ PPS_CFG_DP_ENCODER0_P0_FLDMASK

#define PPS_CFG_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 1134 of file dptx_reg.h.

◆ PPS_CFG_DP_ENCODER0_P0_FLDMASK_LEN

#define PPS_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1136 of file dptx_reg.h.

◆ PPS_CFG_DP_ENCODER0_P0_FLDMASK_POS

#define PPS_CFG_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 1135 of file dptx_reg.h.

◆ PPS_CFG_ONE_TIME_DP_ENCODER0_P0_FLDMASK

#define PPS_CFG_ONE_TIME_DP_ENCODER0_P0_FLDMASK   0x100

Definition at line 1138 of file dptx_reg.h.

◆ PPS_CFG_ONE_TIME_DP_ENCODER0_P0_FLDMASK_LEN

#define PPS_CFG_ONE_TIME_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1140 of file dptx_reg.h.

◆ PPS_CFG_ONE_TIME_DP_ENCODER0_P0_FLDMASK_POS

#define PPS_CFG_ONE_TIME_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 1139 of file dptx_reg.h.

◆ PPS_HB0_DP_ENCODER0_P0_FLDMASK

#define PPS_HB0_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 786 of file dptx_reg.h.

◆ PPS_HB0_DP_ENCODER0_P0_FLDMASK_LEN

#define PPS_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 788 of file dptx_reg.h.

◆ PPS_HB0_DP_ENCODER0_P0_FLDMASK_POS

#define PPS_HB0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 787 of file dptx_reg.h.

◆ PPS_HB1_DP_ENCODER0_P0_FLDMASK

#define PPS_HB1_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 790 of file dptx_reg.h.

◆ PPS_HB1_DP_ENCODER0_P0_FLDMASK_LEN

#define PPS_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 792 of file dptx_reg.h.

◆ PPS_HB1_DP_ENCODER0_P0_FLDMASK_POS

#define PPS_HB1_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 791 of file dptx_reg.h.

◆ PPS_HB2_DP_ENCODER0_P0_FLDMASK

#define PPS_HB2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 795 of file dptx_reg.h.

◆ PPS_HB2_DP_ENCODER0_P0_FLDMASK_LEN

#define PPS_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 797 of file dptx_reg.h.

◆ PPS_HB2_DP_ENCODER0_P0_FLDMASK_POS

#define PPS_HB2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 796 of file dptx_reg.h.

◆ PPS_HB3_DP_ENCODER0_P0_FLDMASK

#define PPS_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 799 of file dptx_reg.h.

◆ PPS_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define PPS_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 801 of file dptx_reg.h.

◆ PPS_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define PPS_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 800 of file dptx_reg.h.

◆ PPS_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK

#define PPS_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK   0x800

Definition at line 1041 of file dptx_reg.h.

◆ PPS_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK_LEN

#define PPS_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1043 of file dptx_reg.h.

◆ PPS_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK_POS

#define PPS_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK_POS   11

Definition at line 1042 of file dptx_reg.h.

◆ PRBS_EN_DP_TRANS_P0_FLDMASK

#define PRBS_EN_DP_TRANS_P0_FLDMASK   0x8

Definition at line 2570 of file dptx_reg.h.

◆ PRBS_EN_DP_TRANS_P0_FLDMASK_LEN

#define PRBS_EN_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2572 of file dptx_reg.h.

◆ PRBS_EN_DP_TRANS_P0_FLDMASK_POS

#define PRBS_EN_DP_TRANS_P0_FLDMASK_POS   3

Definition at line 2571 of file dptx_reg.h.

◆ PRE_MISC_LANE0_MUX_DP_TRANS_P0_FLDMASK

#define PRE_MISC_LANE0_MUX_DP_TRANS_P0_FLDMASK   0x3

Definition at line 2285 of file dptx_reg.h.

◆ PRE_MISC_LANE0_MUX_DP_TRANS_P0_FLDMASK_LEN

#define PRE_MISC_LANE0_MUX_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 2287 of file dptx_reg.h.

◆ PRE_MISC_LANE0_MUX_DP_TRANS_P0_FLDMASK_POS

#define PRE_MISC_LANE0_MUX_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2286 of file dptx_reg.h.

◆ PRE_MISC_LANE1_MUX_DP_TRANS_P0_FLDMASK

#define PRE_MISC_LANE1_MUX_DP_TRANS_P0_FLDMASK   0xc

Definition at line 2289 of file dptx_reg.h.

◆ PRE_MISC_LANE1_MUX_DP_TRANS_P0_FLDMASK_LEN

#define PRE_MISC_LANE1_MUX_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 2291 of file dptx_reg.h.

◆ PRE_MISC_LANE1_MUX_DP_TRANS_P0_FLDMASK_POS

#define PRE_MISC_LANE1_MUX_DP_TRANS_P0_FLDMASK_POS   2

Definition at line 2290 of file dptx_reg.h.

◆ PRE_MISC_LANE2_MUX_DP_TRANS_P0_FLDMASK

#define PRE_MISC_LANE2_MUX_DP_TRANS_P0_FLDMASK   0x30

Definition at line 2293 of file dptx_reg.h.

◆ PRE_MISC_LANE2_MUX_DP_TRANS_P0_FLDMASK_LEN

#define PRE_MISC_LANE2_MUX_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 2295 of file dptx_reg.h.

◆ PRE_MISC_LANE2_MUX_DP_TRANS_P0_FLDMASK_POS

#define PRE_MISC_LANE2_MUX_DP_TRANS_P0_FLDMASK_POS   4

Definition at line 2294 of file dptx_reg.h.

◆ PRE_MISC_LANE3_MUX_DP_TRANS_P0_FLDMASK

#define PRE_MISC_LANE3_MUX_DP_TRANS_P0_FLDMASK   0xc0

Definition at line 2297 of file dptx_reg.h.

◆ PRE_MISC_LANE3_MUX_DP_TRANS_P0_FLDMASK_LEN

#define PRE_MISC_LANE3_MUX_DP_TRANS_P0_FLDMASK_LEN   2

Definition at line 2299 of file dptx_reg.h.

◆ PRE_MISC_LANE3_MUX_DP_TRANS_P0_FLDMASK_POS

#define PRE_MISC_LANE3_MUX_DP_TRANS_P0_FLDMASK_POS   6

Definition at line 2298 of file dptx_reg.h.

◆ PRE_MISC_PORT_MUX_DP_TRANS_P0_FLDMASK

#define PRE_MISC_PORT_MUX_DP_TRANS_P0_FLDMASK   0x700

Definition at line 2301 of file dptx_reg.h.

◆ PRE_MISC_PORT_MUX_DP_TRANS_P0_FLDMASK_LEN

#define PRE_MISC_PORT_MUX_DP_TRANS_P0_FLDMASK_LEN   3

Definition at line 2303 of file dptx_reg.h.

◆ PRE_MISC_PORT_MUX_DP_TRANS_P0_FLDMASK_POS

#define PRE_MISC_PORT_MUX_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 2302 of file dptx_reg.h.

◆ PROBE_HIGH_SEL_FLDMASK

#define PROBE_HIGH_SEL_FLDMASK   0x1c0000

Definition at line 4241 of file dptx_reg.h.

◆ PROBE_HIGH_SEL_FLDMASK_LEN

#define PROBE_HIGH_SEL_FLDMASK_LEN   3

Definition at line 4243 of file dptx_reg.h.

◆ PROBE_HIGH_SEL_FLDMASK_POS

#define PROBE_HIGH_SEL_FLDMASK_POS   18

Definition at line 4242 of file dptx_reg.h.

◆ PROBE_LOW_HIGH_SWAP_FLDMASK

#define PROBE_LOW_HIGH_SWAP_FLDMASK   0x200000

Definition at line 4245 of file dptx_reg.h.

◆ PROBE_LOW_HIGH_SWAP_FLDMASK_LEN

#define PROBE_LOW_HIGH_SWAP_FLDMASK_LEN   1

Definition at line 4247 of file dptx_reg.h.

◆ PROBE_LOW_HIGH_SWAP_FLDMASK_POS

#define PROBE_LOW_HIGH_SWAP_FLDMASK_POS   21

Definition at line 4246 of file dptx_reg.h.

◆ PROBE_LOW_SEL_FLDMASK

#define PROBE_LOW_SEL_FLDMASK   0x38000

Definition at line 4237 of file dptx_reg.h.

◆ PROBE_LOW_SEL_FLDMASK_LEN

#define PROBE_LOW_SEL_FLDMASK_LEN   3

Definition at line 4239 of file dptx_reg.h.

◆ PROBE_LOW_SEL_FLDMASK_POS

#define PROBE_LOW_SEL_FLDMASK_POS   15

Definition at line 4238 of file dptx_reg.h.

◆ R0_AVAILABLE_DP_TRANS_P0_FLDMASK

#define R0_AVAILABLE_DP_TRANS_P0_FLDMASK   0x1000

Definition at line 2810 of file dptx_reg.h.

◆ R0_AVAILABLE_DP_TRANS_P0_FLDMASK_LEN

#define R0_AVAILABLE_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2812 of file dptx_reg.h.

◆ R0_AVAILABLE_DP_TRANS_P0_FLDMASK_POS

#define R0_AVAILABLE_DP_TRANS_P0_FLDMASK_POS   12

Definition at line 2811 of file dptx_reg.h.

◆ REG_3000_DP_ENCODER0_P0

#define REG_3000_DP_ENCODER0_P0   0x3000

Definition at line 13 of file dptx_reg.h.

◆ REG_3004_DP_ENCODER0_P0

#define REG_3004_DP_ENCODER0_P0   0x3004

Definition at line 46 of file dptx_reg.h.

◆ REG_3008_DP_ENCODER0_P0

#define REG_3008_DP_ENCODER0_P0   0x3008

Definition at line 83 of file dptx_reg.h.

◆ REG_300C_DP_ENCODER0_P0

#define REG_300C_DP_ENCODER0_P0   0x300C

Definition at line 88 of file dptx_reg.h.

◆ REG_3010_DP_ENCODER0_P0

#define REG_3010_DP_ENCODER0_P0   0x3010

Definition at line 117 of file dptx_reg.h.

◆ REG_3014_DP_ENCODER0_P0

#define REG_3014_DP_ENCODER0_P0   0x3014

Definition at line 122 of file dptx_reg.h.

◆ REG_3018_DP_ENCODER0_P0

#define REG_3018_DP_ENCODER0_P0   0x3018

Definition at line 127 of file dptx_reg.h.

◆ REG_301C_DP_ENCODER0_P0

#define REG_301C_DP_ENCODER0_P0   0x301C

Definition at line 132 of file dptx_reg.h.

◆ REG_3020_DP_ENCODER0_P0

#define REG_3020_DP_ENCODER0_P0   0x3020

Definition at line 137 of file dptx_reg.h.

◆ REG_3024_DP_ENCODER0_P0

#define REG_3024_DP_ENCODER0_P0   0x3024

Definition at line 142 of file dptx_reg.h.

◆ REG_3028_DP_ENCODER0_P0

#define REG_3028_DP_ENCODER0_P0   0x3028

Definition at line 147 of file dptx_reg.h.

◆ REG_302C_DP_ENCODER0_P0

#define REG_302C_DP_ENCODER0_P0   0x302C

Definition at line 156 of file dptx_reg.h.

◆ REG_3030_DP_ENCODER0_P0

#define REG_3030_DP_ENCODER0_P0   0x3030

Definition at line 165 of file dptx_reg.h.

◆ REG_3034_DP_ENCODER0_P0

#define REG_3034_DP_ENCODER0_P0   0x3034

Definition at line 230 of file dptx_reg.h.

◆ REG_3038_DP_ENCODER0_P0

#define REG_3038_DP_ENCODER0_P0   0x3038

Definition at line 239 of file dptx_reg.h.

◆ REG_303C_DP_ENCODER0_P0

#define REG_303C_DP_ENCODER0_P0   0x303C

Definition at line 268 of file dptx_reg.h.

◆ REG_3040_DP_ENCODER0_P0

#define REG_3040_DP_ENCODER0_P0   0x3040

Definition at line 285 of file dptx_reg.h.

◆ REG_3044_DP_ENCODER0_P0

#define REG_3044_DP_ENCODER0_P0   0x3044

Definition at line 306 of file dptx_reg.h.

◆ REG_3048_DP_ENCODER0_P0

#define REG_3048_DP_ENCODER0_P0   0x3048

Definition at line 311 of file dptx_reg.h.

◆ REG_304C_DP_ENCODER0_P0

#define REG_304C_DP_ENCODER0_P0   0x304C

Definition at line 316 of file dptx_reg.h.

◆ REG_3050_DP_ENCODER0_P0

#define REG_3050_DP_ENCODER0_P0   0x3050

Definition at line 341 of file dptx_reg.h.

◆ REG_3054_DP_ENCODER0_P0

#define REG_3054_DP_ENCODER0_P0   0x3054

Definition at line 346 of file dptx_reg.h.

◆ REG_3058_DP_ENCODER0_P0

#define REG_3058_DP_ENCODER0_P0   0x3058

Definition at line 351 of file dptx_reg.h.

◆ REG_305C_DP_ENCODER0_P0

#define REG_305C_DP_ENCODER0_P0   0x305C

Definition at line 356 of file dptx_reg.h.

◆ REG_3060_DP_ENCODER0_P0

#define REG_3060_DP_ENCODER0_P0   0x3060

Definition at line 361 of file dptx_reg.h.

◆ REG_3064_DP_ENCODER0_P0

#define REG_3064_DP_ENCODER0_P0   0x3064

Definition at line 378 of file dptx_reg.h.

◆ REG_3088_DP_ENCODER0_P0

#define REG_3088_DP_ENCODER0_P0   0x3088

Definition at line 383 of file dptx_reg.h.

◆ REG_308C_DP_ENCODER0_P0

#define REG_308C_DP_ENCODER0_P0   0x308C

Definition at line 420 of file dptx_reg.h.

◆ REG_3090_DP_ENCODER0_P0

#define REG_3090_DP_ENCODER0_P0   0x3090

Definition at line 425 of file dptx_reg.h.

◆ REG_3094_DP_ENCODER0_P0

#define REG_3094_DP_ENCODER0_P0   0x3094

Definition at line 430 of file dptx_reg.h.

◆ REG_3098_DP_ENCODER0_P0

#define REG_3098_DP_ENCODER0_P0   0x3098

Definition at line 435 of file dptx_reg.h.

◆ REG_309C_DP_ENCODER0_P0

#define REG_309C_DP_ENCODER0_P0   0x309C

Definition at line 440 of file dptx_reg.h.

◆ REG_30A0_DP_ENCODER0_P0

#define REG_30A0_DP_ENCODER0_P0   0x30A0

Definition at line 445 of file dptx_reg.h.

◆ REG_30A4_DP_ENCODER0_P0

#define REG_30A4_DP_ENCODER0_P0   0x30A4

Definition at line 458 of file dptx_reg.h.

◆ REG_30A8_DP_ENCODER0_P0

#define REG_30A8_DP_ENCODER0_P0   0x30A8

Definition at line 467 of file dptx_reg.h.

◆ REG_30AC_DP_ENCODER0_P0

#define REG_30AC_DP_ENCODER0_P0   0x30AC

Definition at line 476 of file dptx_reg.h.

◆ REG_30B0_DP_ENCODER0_P0

#define REG_30B0_DP_ENCODER0_P0   0x30B0

Definition at line 485 of file dptx_reg.h.

◆ REG_30B4_DP_ENCODER0_P0

#define REG_30B4_DP_ENCODER0_P0   0x30B4

Definition at line 494 of file dptx_reg.h.

◆ REG_30B8_DP_ENCODER0_P0

#define REG_30B8_DP_ENCODER0_P0   0x30B8

Definition at line 503 of file dptx_reg.h.

◆ REG_30BC_DP_ENCODER0_P0

#define REG_30BC_DP_ENCODER0_P0   0x30BC

Definition at line 512 of file dptx_reg.h.

◆ REG_30C0_DP_ENCODER0_P0

#define REG_30C0_DP_ENCODER0_P0   0x30C0

Definition at line 549 of file dptx_reg.h.

◆ REG_30C4_DP_ENCODER0_P0

#define REG_30C4_DP_ENCODER0_P0   0x30C4

Definition at line 558 of file dptx_reg.h.

◆ REG_30C8_DP_ENCODER0_P0

#define REG_30C8_DP_ENCODER0_P0   0x30C8

Definition at line 567 of file dptx_reg.h.

◆ REG_30CC_DP_ENCODER0_P0

#define REG_30CC_DP_ENCODER0_P0   0x30CC

Definition at line 572 of file dptx_reg.h.

◆ REG_30D0_DP_ENCODER0_P0

#define REG_30D0_DP_ENCODER0_P0   0x30D0

Definition at line 577 of file dptx_reg.h.

◆ REG_30D4_DP_ENCODER0_P0

#define REG_30D4_DP_ENCODER0_P0   0x30D4

Definition at line 582 of file dptx_reg.h.

◆ REG_30D8_DP_ENCODER0_P0

#define REG_30D8_DP_ENCODER0_P0   0x30D8

Definition at line 587 of file dptx_reg.h.

◆ REG_30DC_DP_ENCODER0_P0

#define REG_30DC_DP_ENCODER0_P0   0x30DC

Definition at line 596 of file dptx_reg.h.

◆ REG_30E0_DP_ENCODER0_P0

#define REG_30E0_DP_ENCODER0_P0   0x30E0

Definition at line 605 of file dptx_reg.h.

◆ REG_30E4_DP_ENCODER0_P0

#define REG_30E4_DP_ENCODER0_P0   0x30E4

Definition at line 614 of file dptx_reg.h.

◆ REG_30E8_DP_ENCODER0_P0

#define REG_30E8_DP_ENCODER0_P0   0x30E8

Definition at line 623 of file dptx_reg.h.

◆ REG_30EC_DP_ENCODER0_P0

#define REG_30EC_DP_ENCODER0_P0   0x30EC

Definition at line 632 of file dptx_reg.h.

◆ REG_30F0_DP_ENCODER0_P0

#define REG_30F0_DP_ENCODER0_P0   0x30F0

Definition at line 641 of file dptx_reg.h.

◆ REG_30F4_DP_ENCODER0_P0

#define REG_30F4_DP_ENCODER0_P0   0x30F4

Definition at line 650 of file dptx_reg.h.

◆ REG_30F8_DP_ENCODER0_P0

#define REG_30F8_DP_ENCODER0_P0   0x30F8

Definition at line 659 of file dptx_reg.h.

◆ REG_30FC_DP_ENCODER0_P0

#define REG_30FC_DP_ENCODER0_P0   0x30FC

Definition at line 668 of file dptx_reg.h.

◆ REG_3100_DP_ENCODER0_P0

#define REG_3100_DP_ENCODER0_P0   0x3100

Definition at line 677 of file dptx_reg.h.

◆ REG_3104_DP_ENCODER0_P0

#define REG_3104_DP_ENCODER0_P0   0x3104

Definition at line 686 of file dptx_reg.h.

◆ REG_3108_DP_ENCODER0_P0

#define REG_3108_DP_ENCODER0_P0   0x3108

Definition at line 695 of file dptx_reg.h.

◆ REG_310C_DP_ENCODER0_P0

#define REG_310C_DP_ENCODER0_P0   0x310C

Definition at line 704 of file dptx_reg.h.

◆ REG_3110_DP_ENCODER0_P0

#define REG_3110_DP_ENCODER0_P0   0x3110

Definition at line 713 of file dptx_reg.h.

◆ REG_3114_DP_ENCODER0_P0

#define REG_3114_DP_ENCODER0_P0   0x3114

Definition at line 722 of file dptx_reg.h.

◆ REG_3118_DP_ENCODER0_P0

#define REG_3118_DP_ENCODER0_P0   0x3118

Definition at line 731 of file dptx_reg.h.

◆ REG_311C_DP_ENCODER0_P0

#define REG_311C_DP_ENCODER0_P0   0x311C

Definition at line 740 of file dptx_reg.h.

◆ REG_3120_DP_ENCODER0_P0

#define REG_3120_DP_ENCODER0_P0   0x3120

Definition at line 749 of file dptx_reg.h.

◆ REG_3124_DP_ENCODER0_P0

#define REG_3124_DP_ENCODER0_P0   0x3124

Definition at line 758 of file dptx_reg.h.

◆ REG_3128_DP_ENCODER0_P0

#define REG_3128_DP_ENCODER0_P0   0x3128

Definition at line 767 of file dptx_reg.h.

◆ REG_312C_DP_ENCODER0_P0

#define REG_312C_DP_ENCODER0_P0   0x312C

Definition at line 776 of file dptx_reg.h.

◆ REG_3130_DP_ENCODER0_P0

#define REG_3130_DP_ENCODER0_P0   0x3130

Definition at line 785 of file dptx_reg.h.

◆ REG_3134_DP_ENCODER0_P0

#define REG_3134_DP_ENCODER0_P0   0x3134

Definition at line 794 of file dptx_reg.h.

◆ REG_3138_DP_ENCODER0_P0

#define REG_3138_DP_ENCODER0_P0   0x3138

Definition at line 803 of file dptx_reg.h.

◆ REG_313C_DP_ENCODER0_P0

#define REG_313C_DP_ENCODER0_P0   0x313C

Definition at line 812 of file dptx_reg.h.

◆ REG_3140_DP_ENCODER0_P0

#define REG_3140_DP_ENCODER0_P0   0x3140

Definition at line 821 of file dptx_reg.h.

◆ REG_3144_DP_ENCODER0_P0

#define REG_3144_DP_ENCODER0_P0   0x3144

Definition at line 838 of file dptx_reg.h.

◆ REG_3148_DP_ENCODER0_P0

#define REG_3148_DP_ENCODER0_P0   0x3148

Definition at line 843 of file dptx_reg.h.

◆ REG_314C_DP_ENCODER0_P0

#define REG_314C_DP_ENCODER0_P0   0x314C

Definition at line 848 of file dptx_reg.h.

◆ REG_3150_DP_ENCODER0_P0

#define REG_3150_DP_ENCODER0_P0   0x3150

Definition at line 853 of file dptx_reg.h.

◆ REG_3154_DP_ENCODER0_P0

#define REG_3154_DP_ENCODER0_P0   0x3154

Definition at line 858 of file dptx_reg.h.

◆ REG_3158_DP_ENCODER0_P0

#define REG_3158_DP_ENCODER0_P0   0x3158

Definition at line 863 of file dptx_reg.h.

◆ REG_315C_DP_ENCODER0_P0

#define REG_315C_DP_ENCODER0_P0   0x315C

Definition at line 868 of file dptx_reg.h.

◆ REG_3160_DP_ENCODER0_P0

#define REG_3160_DP_ENCODER0_P0   0x3160

Definition at line 873 of file dptx_reg.h.

◆ REG_3164_DP_ENCODER0_P0

#define REG_3164_DP_ENCODER0_P0   0x3164

Definition at line 878 of file dptx_reg.h.

◆ REG_3168_DP_ENCODER0_P0

#define REG_3168_DP_ENCODER0_P0   0x3168

Definition at line 883 of file dptx_reg.h.

◆ REG_316C_DP_ENCODER0_P0

#define REG_316C_DP_ENCODER0_P0   0x316C

Definition at line 888 of file dptx_reg.h.

◆ REG_3170_DP_ENCODER0_P0

#define REG_3170_DP_ENCODER0_P0   0x3170

Definition at line 893 of file dptx_reg.h.

◆ REG_3174_DP_ENCODER0_P0

#define REG_3174_DP_ENCODER0_P0   0x3174

Definition at line 898 of file dptx_reg.h.

◆ REG_3178_DP_ENCODER0_P0

#define REG_3178_DP_ENCODER0_P0   0x3178

Definition at line 903 of file dptx_reg.h.

◆ REG_317C_DP_ENCODER0_P0

#define REG_317C_DP_ENCODER0_P0   0x317C

Definition at line 908 of file dptx_reg.h.

◆ REG_3180_DP_ENCODER0_P0

#define REG_3180_DP_ENCODER0_P0   0x3180

Definition at line 913 of file dptx_reg.h.

◆ REG_3184_DP_ENCODER0_P0

#define REG_3184_DP_ENCODER0_P0   0x3184

Definition at line 918 of file dptx_reg.h.

◆ REG_3188_DP_ENCODER0_P0

#define REG_3188_DP_ENCODER0_P0   0x3188

Definition at line 923 of file dptx_reg.h.

◆ REG_318C_DP_ENCODER0_P0

#define REG_318C_DP_ENCODER0_P0   0x318C

Definition at line 928 of file dptx_reg.h.

◆ REG_3190_DP_ENCODER0_P0

#define REG_3190_DP_ENCODER0_P0   0x3190

Definition at line 933 of file dptx_reg.h.

◆ REG_3194_DP_ENCODER0_P0

#define REG_3194_DP_ENCODER0_P0   0x3194

Definition at line 962 of file dptx_reg.h.

◆ REG_3198_DP_ENCODER0_P0

#define REG_3198_DP_ENCODER0_P0   0x3198

Definition at line 967 of file dptx_reg.h.

◆ REG_319C_DP_ENCODER0_P0

#define REG_319C_DP_ENCODER0_P0   0x319C

Definition at line 972 of file dptx_reg.h.

◆ REG_31A0_DP_ENCODER0_P0

#define REG_31A0_DP_ENCODER0_P0   0x31A0

Definition at line 977 of file dptx_reg.h.

◆ REG_31A4_DP_ENCODER0_P0

#define REG_31A4_DP_ENCODER0_P0   0x31A4

Definition at line 982 of file dptx_reg.h.

◆ REG_31A8_DP_ENCODER0_P0

#define REG_31A8_DP_ENCODER0_P0   0x31A8

Definition at line 987 of file dptx_reg.h.

◆ REG_31AC_DP_ENCODER0_P0

#define REG_31AC_DP_ENCODER0_P0   0x31AC

Definition at line 992 of file dptx_reg.h.

◆ REG_31B0_DP_ENCODER0_P0

#define REG_31B0_DP_ENCODER0_P0   0x31B0

Definition at line 997 of file dptx_reg.h.

◆ REG_31B4_DP_ENCODER0_P0

#define REG_31B4_DP_ENCODER0_P0   0x31B4

Definition at line 1030 of file dptx_reg.h.

◆ REG_31C0_DP_ENCODER0_P0

#define REG_31C0_DP_ENCODER0_P0   0x31C0

Definition at line 1035 of file dptx_reg.h.

◆ REG_31C4_DP_ENCODER0_P0

#define REG_31C4_DP_ENCODER0_P0   0x31C4

Definition at line 1040 of file dptx_reg.h.

◆ REG_31C8_DP_ENCODER0_P0

#define REG_31C8_DP_ENCODER0_P0   0x31C8

Definition at line 1061 of file dptx_reg.h.

◆ REG_31CC_DP_ENCODER0_P0

#define REG_31CC_DP_ENCODER0_P0   0x31CC

Definition at line 1070 of file dptx_reg.h.

◆ REG_31D0_DP_ENCODER0_P0

#define REG_31D0_DP_ENCODER0_P0   0x31D0

Definition at line 1079 of file dptx_reg.h.

◆ REG_31D4_DP_ENCODER0_P0

#define REG_31D4_DP_ENCODER0_P0   0x31D4

Definition at line 1088 of file dptx_reg.h.

◆ REG_31D8_DP_ENCODER0_P0

#define REG_31D8_DP_ENCODER0_P0   0x31D8

Definition at line 1097 of file dptx_reg.h.

◆ REG_31DC_DP_ENCODER0_P0

#define REG_31DC_DP_ENCODER0_P0   0x31DC

Definition at line 1106 of file dptx_reg.h.

◆ REG_31E0_DP_ENCODER0_P0

#define REG_31E0_DP_ENCODER0_P0   0x31E0

Definition at line 1115 of file dptx_reg.h.

◆ REG_31E4_DP_ENCODER0_P0

#define REG_31E4_DP_ENCODER0_P0   0x31E4

Definition at line 1124 of file dptx_reg.h.

◆ REG_31E8_DP_ENCODER0_P0

#define REG_31E8_DP_ENCODER0_P0   0x31E8

Definition at line 1133 of file dptx_reg.h.

◆ REG_31EC_DP_ENCODER0_P0

#define REG_31EC_DP_ENCODER0_P0   0x31EC

Definition at line 1146 of file dptx_reg.h.

◆ REG_31F0_DP_ENCODER0_P0

#define REG_31F0_DP_ENCODER0_P0   0x31F0

Definition at line 1171 of file dptx_reg.h.

◆ REG_31F8_DP_ENCODER0_P0

#define REG_31F8_DP_ENCODER0_P0   0x31F8

Definition at line 1180 of file dptx_reg.h.

◆ REG_31FC_DP_ENCODER0_P0

#define REG_31FC_DP_ENCODER0_P0   0x31FC

Definition at line 1189 of file dptx_reg.h.

◆ REG_3200_DP_ENCODER1_P0

#define REG_3200_DP_ENCODER1_P0   0x3200

Definition at line 1226 of file dptx_reg.h.

◆ REG_3204_DP_ENCODER1_P0

#define REG_3204_DP_ENCODER1_P0   0x3204

Definition at line 1235 of file dptx_reg.h.

◆ REG_3208_DP_ENCODER1_P0

#define REG_3208_DP_ENCODER1_P0   0x3208

Definition at line 1244 of file dptx_reg.h.

◆ REG_320C_DP_ENCODER1_P0

#define REG_320C_DP_ENCODER1_P0   0x320C

Definition at line 1253 of file dptx_reg.h.

◆ REG_3210_DP_ENCODER1_P0

#define REG_3210_DP_ENCODER1_P0   0x3210

Definition at line 1262 of file dptx_reg.h.

◆ REG_3214_DP_ENCODER1_P0

#define REG_3214_DP_ENCODER1_P0   0x3214

Definition at line 1271 of file dptx_reg.h.

◆ REG_3218_DP_ENCODER1_P0

#define REG_3218_DP_ENCODER1_P0   0x3218

Definition at line 1280 of file dptx_reg.h.

◆ REG_321C_DP_ENCODER1_P0

#define REG_321C_DP_ENCODER1_P0   0x321C

Definition at line 1289 of file dptx_reg.h.

◆ REG_3220_DP_ENCODER1_P0

#define REG_3220_DP_ENCODER1_P0   0x3220

Definition at line 1298 of file dptx_reg.h.

◆ REG_3224_DP_ENCODER1_P0

#define REG_3224_DP_ENCODER1_P0   0x3224

Definition at line 1307 of file dptx_reg.h.

◆ REG_3228_DP_ENCODER1_P0

#define REG_3228_DP_ENCODER1_P0   0x3228

Definition at line 1316 of file dptx_reg.h.

◆ REG_322C_DP_ENCODER1_P0

#define REG_322C_DP_ENCODER1_P0   0x322C

Definition at line 1325 of file dptx_reg.h.

◆ REG_3230_DP_ENCODER1_P0

#define REG_3230_DP_ENCODER1_P0   0x3230

Definition at line 1334 of file dptx_reg.h.

◆ REG_3234_DP_ENCODER1_P0

#define REG_3234_DP_ENCODER1_P0   0x3234

Definition at line 1343 of file dptx_reg.h.

◆ REG_3238_DP_ENCODER1_P0

#define REG_3238_DP_ENCODER1_P0   0x3238

Definition at line 1352 of file dptx_reg.h.

◆ REG_323C_DP_ENCODER1_P0

#define REG_323C_DP_ENCODER1_P0   0x323C

Definition at line 1361 of file dptx_reg.h.

◆ REG_3240_DP_ENCODER1_P0

#define REG_3240_DP_ENCODER1_P0   0x3240

Definition at line 1370 of file dptx_reg.h.

◆ REG_3244_DP_ENCODER1_P0

#define REG_3244_DP_ENCODER1_P0   0x3244

Definition at line 1379 of file dptx_reg.h.

◆ REG_3248_DP_ENCODER1_P0

#define REG_3248_DP_ENCODER1_P0   0x3248

Definition at line 1388 of file dptx_reg.h.

◆ REG_324C_DP_ENCODER1_P0

#define REG_324C_DP_ENCODER1_P0   0x324C

Definition at line 1397 of file dptx_reg.h.

◆ REG_3250_DP_ENCODER1_P0

#define REG_3250_DP_ENCODER1_P0   0x3250

Definition at line 1406 of file dptx_reg.h.

◆ REG_3254_DP_ENCODER1_P0

#define REG_3254_DP_ENCODER1_P0   0x3254

Definition at line 1415 of file dptx_reg.h.

◆ REG_3258_DP_ENCODER1_P0

#define REG_3258_DP_ENCODER1_P0   0x3258

Definition at line 1424 of file dptx_reg.h.

◆ REG_325C_DP_ENCODER1_P0

#define REG_325C_DP_ENCODER1_P0   0x325C

Definition at line 1433 of file dptx_reg.h.

◆ REG_3260_DP_ENCODER1_P0

#define REG_3260_DP_ENCODER1_P0   0x3260

Definition at line 1442 of file dptx_reg.h.

◆ REG_3264_DP_ENCODER1_P0

#define REG_3264_DP_ENCODER1_P0   0x3264

Definition at line 1451 of file dptx_reg.h.

◆ REG_3268_DP_ENCODER1_P0

#define REG_3268_DP_ENCODER1_P0   0x3268

Definition at line 1460 of file dptx_reg.h.

◆ REG_326C_DP_ENCODER1_P0

#define REG_326C_DP_ENCODER1_P0   0x326C

Definition at line 1469 of file dptx_reg.h.

◆ REG_3270_DP_ENCODER1_P0

#define REG_3270_DP_ENCODER1_P0   0x3270

Definition at line 1478 of file dptx_reg.h.

◆ REG_3274_DP_ENCODER1_P0

#define REG_3274_DP_ENCODER1_P0   0x3274

Definition at line 1487 of file dptx_reg.h.

◆ REG_3278_DP_ENCODER1_P0

#define REG_3278_DP_ENCODER1_P0   0x3278

Definition at line 1496 of file dptx_reg.h.

◆ REG_327C_DP_ENCODER1_P0

#define REG_327C_DP_ENCODER1_P0   0x327C

Definition at line 1505 of file dptx_reg.h.

◆ REG_3280_DP_ENCODER1_P0

#define REG_3280_DP_ENCODER1_P0   0x3280

Definition at line 1514 of file dptx_reg.h.

◆ REG_328C_DP_ENCODER1_P0

#define REG_328C_DP_ENCODER1_P0   0x328C

Definition at line 1527 of file dptx_reg.h.

◆ REG_3290_DP_ENCODER1_P0

#define REG_3290_DP_ENCODER1_P0   0x3290

Definition at line 1564 of file dptx_reg.h.

◆ REG_3294_DP_ENCODER1_P0

#define REG_3294_DP_ENCODER1_P0   0x3294

Definition at line 1573 of file dptx_reg.h.

◆ REG_3298_DP_ENCODER1_P0

#define REG_3298_DP_ENCODER1_P0   0x3298

Definition at line 1582 of file dptx_reg.h.

◆ REG_329C_DP_ENCODER1_P0

#define REG_329C_DP_ENCODER1_P0   0x329C

Definition at line 1591 of file dptx_reg.h.

◆ REG_32A0_DP_ENCODER1_P0

#define REG_32A0_DP_ENCODER1_P0   0x32A0

Definition at line 1600 of file dptx_reg.h.

◆ REG_32A4_DP_ENCODER1_P0

#define REG_32A4_DP_ENCODER1_P0   0x32A4

Definition at line 1637 of file dptx_reg.h.

◆ REG_32A8_DP_ENCODER1_P0

#define REG_32A8_DP_ENCODER1_P0   0x32A8

Definition at line 1646 of file dptx_reg.h.

◆ REG_32AC_DP_ENCODER1_P0

#define REG_32AC_DP_ENCODER1_P0   0x32AC

Definition at line 1655 of file dptx_reg.h.

◆ REG_32B0_DP_ENCODER1_P0

#define REG_32B0_DP_ENCODER1_P0   0x32B0

Definition at line 1664 of file dptx_reg.h.

◆ REG_32B4_DP_ENCODER1_P0

#define REG_32B4_DP_ENCODER1_P0   0x32B4

Definition at line 1673 of file dptx_reg.h.

◆ REG_32C0_DP_ENCODER1_P0

#define REG_32C0_DP_ENCODER1_P0   0x32C0

Definition at line 1690 of file dptx_reg.h.

◆ REG_32C4_DP_ENCODER1_P0

#define REG_32C4_DP_ENCODER1_P0   0x32C4

Definition at line 1695 of file dptx_reg.h.

◆ REG_32C8_DP_ENCODER1_P0

#define REG_32C8_DP_ENCODER1_P0   0x32C8

Definition at line 1700 of file dptx_reg.h.

◆ REG_32CC_DP_ENCODER1_P0

#define REG_32CC_DP_ENCODER1_P0   0x32CC

Definition at line 1705 of file dptx_reg.h.

◆ REG_32D0_DP_ENCODER1_P0

#define REG_32D0_DP_ENCODER1_P0   0x32D0

Definition at line 1710 of file dptx_reg.h.

◆ REG_32D4_DP_ENCODER1_P0

#define REG_32D4_DP_ENCODER1_P0   0x32D4

Definition at line 1715 of file dptx_reg.h.

◆ REG_32D8_DP_ENCODER1_P0

#define REG_32D8_DP_ENCODER1_P0   0x32D8

Definition at line 1720 of file dptx_reg.h.

◆ REG_32DC_DP_ENCODER1_P0

#define REG_32DC_DP_ENCODER1_P0   0x32DC

Definition at line 1725 of file dptx_reg.h.

◆ REG_32E0_DP_ENCODER1_P0

#define REG_32E0_DP_ENCODER1_P0   0x32E0

Definition at line 1730 of file dptx_reg.h.

◆ REG_32E4_DP_ENCODER1_P0

#define REG_32E4_DP_ENCODER1_P0   0x32E4

Definition at line 1735 of file dptx_reg.h.

◆ REG_32E8_DP_ENCODER1_P0

#define REG_32E8_DP_ENCODER1_P0   0x32E8

Definition at line 1740 of file dptx_reg.h.

◆ REG_32EC_DP_ENCODER1_P0

#define REG_32EC_DP_ENCODER1_P0   0x32EC

Definition at line 1749 of file dptx_reg.h.

◆ REG_32F0_DP_ENCODER1_P0

#define REG_32F0_DP_ENCODER1_P0   0x32F0

Definition at line 1758 of file dptx_reg.h.

◆ REG_32F4_DP_ENCODER1_P0

#define REG_32F4_DP_ENCODER1_P0   0x32F4

Definition at line 1763 of file dptx_reg.h.

◆ REG_32F8_DP_ENCODER1_P0

#define REG_32F8_DP_ENCODER1_P0   0x32F8

Definition at line 1768 of file dptx_reg.h.

◆ REG_3300_DP_ENCODER1_P0

#define REG_3300_DP_ENCODER1_P0   0x3300

Definition at line 1789 of file dptx_reg.h.

◆ REG_3304_DP_ENCODER1_P0

#define REG_3304_DP_ENCODER1_P0   0x3304

Definition at line 1806 of file dptx_reg.h.

◆ REG_3320_DP_ENCODER1_P0

#define REG_3320_DP_ENCODER1_P0   0x3320

Definition at line 1831 of file dptx_reg.h.

◆ REG_3324_DP_ENCODER1_P0

#define REG_3324_DP_ENCODER1_P0   0x3324

Definition at line 1836 of file dptx_reg.h.

◆ REG_3328_DP_ENCODER1_P0

#define REG_3328_DP_ENCODER1_P0   0x3328

Definition at line 1849 of file dptx_reg.h.

◆ REG_332C_DP_ENCODER1_P0

#define REG_332C_DP_ENCODER1_P0   0x332C

Definition at line 1866 of file dptx_reg.h.

◆ REG_3330_DP_ENCODER1_P0

#define REG_3330_DP_ENCODER1_P0   0x3330

Definition at line 1871 of file dptx_reg.h.

◆ REG_3334_DP_ENCODER1_P0

#define REG_3334_DP_ENCODER1_P0   0x3334

Definition at line 1876 of file dptx_reg.h.

◆ REG_3338_DP_ENCODER1_P0

#define REG_3338_DP_ENCODER1_P0   0x3338

Definition at line 1881 of file dptx_reg.h.

◆ REG_3340_DP_ENCODER1_P0

#define REG_3340_DP_ENCODER1_P0   0x3340

Definition at line 1886 of file dptx_reg.h.

◆ REG_3344_DP_ENCODER1_P0

#define REG_3344_DP_ENCODER1_P0   0x3344

Definition at line 1939 of file dptx_reg.h.

◆ REG_3348_DP_ENCODER1_P0

#define REG_3348_DP_ENCODER1_P0   0x3348

Definition at line 1948 of file dptx_reg.h.

◆ REG_334C_DP_ENCODER1_P0

#define REG_334C_DP_ENCODER1_P0   0x334C

Definition at line 1957 of file dptx_reg.h.

◆ REG_3350_DP_ENCODER1_P0

#define REG_3350_DP_ENCODER1_P0   0x3350

Definition at line 1966 of file dptx_reg.h.

◆ REG_3354_DP_ENCODER1_P0

#define REG_3354_DP_ENCODER1_P0   0x3354

Definition at line 1975 of file dptx_reg.h.

◆ REG_3358_DP_ENCODER1_P0

#define REG_3358_DP_ENCODER1_P0   0x3358

Definition at line 1988 of file dptx_reg.h.

◆ REG_335C_DP_ENCODER1_P0

#define REG_335C_DP_ENCODER1_P0   0x335C

Definition at line 1997 of file dptx_reg.h.

◆ REG_3360_DP_ENCODER1_P0

#define REG_3360_DP_ENCODER1_P0   0x3360

Definition at line 2002 of file dptx_reg.h.

◆ REG_3364_DP_ENCODER1_P0

#define REG_3364_DP_ENCODER1_P0   0x3364

Definition at line 2007 of file dptx_reg.h.

◆ REG_3368_DP_ENCODER1_P0

#define REG_3368_DP_ENCODER1_P0   0x3368

Definition at line 2016 of file dptx_reg.h.

◆ REG_336C_DP_ENCODER1_P0

#define REG_336C_DP_ENCODER1_P0   0x336C

Definition at line 2041 of file dptx_reg.h.

◆ REG_3370_DP_ENCODER1_P0

#define REG_3370_DP_ENCODER1_P0   0x3370

Definition at line 2058 of file dptx_reg.h.

◆ REG_33AC_DP_ENCODER1_P0

#define REG_33AC_DP_ENCODER1_P0   0x33AC

Definition at line 2063 of file dptx_reg.h.

◆ REG_33B0_DP_ENCODER1_P0

#define REG_33B0_DP_ENCODER1_P0   0x33B0

Definition at line 2068 of file dptx_reg.h.

◆ REG_33B4_DP_ENCODER1_P0

#define REG_33B4_DP_ENCODER1_P0   0x33B4

Definition at line 2073 of file dptx_reg.h.

◆ REG_33B8_DP_ENCODER1_P0

#define REG_33B8_DP_ENCODER1_P0   0x33B8

Definition at line 2078 of file dptx_reg.h.

◆ REG_33BC_DP_ENCODER1_P0

#define REG_33BC_DP_ENCODER1_P0   0x33BC

Definition at line 2091 of file dptx_reg.h.

◆ REG_33C0_DP_ENCODER1_P0

#define REG_33C0_DP_ENCODER1_P0   0x33C0

Definition at line 2096 of file dptx_reg.h.

◆ REG_33C4_DP_ENCODER1_P0

#define REG_33C4_DP_ENCODER1_P0   0x33C4

Definition at line 2109 of file dptx_reg.h.

◆ REG_33C8_DP_ENCODER1_P0

#define REG_33C8_DP_ENCODER1_P0   0x33C8

Definition at line 2118 of file dptx_reg.h.

◆ REG_33CC_DP_ENCODER1_P0

#define REG_33CC_DP_ENCODER1_P0   0x33CC

Definition at line 2123 of file dptx_reg.h.

◆ REG_33D0_DP_ENCODER1_P0

#define REG_33D0_DP_ENCODER1_P0   0x33D0

Definition at line 2128 of file dptx_reg.h.

◆ REG_33D4_DP_ENCODER1_P0

#define REG_33D4_DP_ENCODER1_P0   0x33D4

Definition at line 2133 of file dptx_reg.h.

◆ REG_33D8_DP_ENCODER1_P0

#define REG_33D8_DP_ENCODER1_P0   0x33D8

Definition at line 2138 of file dptx_reg.h.

◆ REG_33DC_DP_ENCODER1_P0

#define REG_33DC_DP_ENCODER1_P0   0x33DC

Definition at line 2159 of file dptx_reg.h.

◆ REG_33E0_DP_ENCODER1_P0

#define REG_33E0_DP_ENCODER1_P0   0x33E0

Definition at line 2224 of file dptx_reg.h.

◆ REG_33E4_DP_ENCODER1_P0

#define REG_33E4_DP_ENCODER1_P0   0x33E4

Definition at line 2229 of file dptx_reg.h.

◆ REG_33E8_DP_ENCODER1_P0

#define REG_33E8_DP_ENCODER1_P0   0x33E8

Definition at line 2234 of file dptx_reg.h.

◆ REG_33EC_DP_ENCODER1_P0

#define REG_33EC_DP_ENCODER1_P0   0x33EC

Definition at line 2239 of file dptx_reg.h.

◆ REG_33F0_DP_ENCODER1_P0

#define REG_33F0_DP_ENCODER1_P0   0x33F0

Definition at line 2264 of file dptx_reg.h.

◆ REG_33F4_DP_ENCODER1_P0

#define REG_33F4_DP_ENCODER1_P0   0x33F4

Definition at line 2269 of file dptx_reg.h.

◆ REG_33F8_DP_ENCODER1_P0

#define REG_33F8_DP_ENCODER1_P0   0x33F8

Definition at line 2274 of file dptx_reg.h.

◆ REG_33FC_DP_ENCODER1_P0

#define REG_33FC_DP_ENCODER1_P0   0x33FC

Definition at line 2279 of file dptx_reg.h.

◆ REG_3400_DP_TRANS_P0

#define REG_3400_DP_TRANS_P0   0x3400

Definition at line 2284 of file dptx_reg.h.

◆ REG_3404_DP_TRANS_P0

#define REG_3404_DP_TRANS_P0   0x3404

Definition at line 2325 of file dptx_reg.h.

◆ REG_3408_DP_TRANS_P0

#define REG_3408_DP_TRANS_P0   0x3408

Definition at line 2354 of file dptx_reg.h.

◆ REG_340C_DP_TRANS_P0

#define REG_340C_DP_TRANS_P0   0x340C

Definition at line 2387 of file dptx_reg.h.

◆ REG_3410_DP_TRANS_P0

#define REG_3410_DP_TRANS_P0   0x3410

Definition at line 2420 of file dptx_reg.h.

◆ REG_3414_DP_TRANS_P0

#define REG_3414_DP_TRANS_P0   0x3414

Definition at line 2437 of file dptx_reg.h.

◆ REG_3418_DP_TRANS_P0

#define REG_3418_DP_TRANS_P0   0x3418

Definition at line 2450 of file dptx_reg.h.

◆ REG_341C_DP_TRANS_P0

#define REG_341C_DP_TRANS_P0   0x341C

Definition at line 2467 of file dptx_reg.h.

◆ REG_3420_DP_TRANS_P0

#define REG_3420_DP_TRANS_P0   0x3420

Definition at line 2484 of file dptx_reg.h.

◆ REG_3428_DP_TRANS_P0

#define REG_3428_DP_TRANS_P0   0x3428

Definition at line 2489 of file dptx_reg.h.

◆ REG_342C_DP_TRANS_P0

#define REG_342C_DP_TRANS_P0   0x342C

Definition at line 2538 of file dptx_reg.h.

◆ REG_3430_DP_TRANS_P0

#define REG_3430_DP_TRANS_P0   0x3430

Definition at line 2543 of file dptx_reg.h.

◆ REG_3440_DP_TRANS_P0

#define REG_3440_DP_TRANS_P0   0x3440

Definition at line 2548 of file dptx_reg.h.

◆ REG_3444_DP_TRANS_P0

#define REG_3444_DP_TRANS_P0   0x3444

Definition at line 2565 of file dptx_reg.h.

◆ REG_3448_DP_TRANS_P0

#define REG_3448_DP_TRANS_P0   0x3448

Definition at line 2574 of file dptx_reg.h.

◆ REG_344C_DP_TRANS_P0

#define REG_344C_DP_TRANS_P0   0x344C

Definition at line 2579 of file dptx_reg.h.

◆ REG_3450_DP_TRANS_P0

#define REG_3450_DP_TRANS_P0   0x3450

Definition at line 2584 of file dptx_reg.h.

◆ REG_3454_DP_TRANS_P0

#define REG_3454_DP_TRANS_P0   0x3454

Definition at line 2589 of file dptx_reg.h.

◆ REG_3458_DP_TRANS_P0

#define REG_3458_DP_TRANS_P0   0x3458

Definition at line 2594 of file dptx_reg.h.

◆ REG_345C_DP_TRANS_P0

#define REG_345C_DP_TRANS_P0   0x345C

Definition at line 2599 of file dptx_reg.h.

◆ REG_3460_DP_TRANS_P0

#define REG_3460_DP_TRANS_P0   0x3460

Definition at line 2604 of file dptx_reg.h.

◆ REG_3464_DP_TRANS_P0

#define REG_3464_DP_TRANS_P0   0x3464

Definition at line 2609 of file dptx_reg.h.

◆ REG_3468_DP_TRANS_P0

#define REG_3468_DP_TRANS_P0   0x3468

Definition at line 2614 of file dptx_reg.h.

◆ REG_346C_DP_TRANS_P0

#define REG_346C_DP_TRANS_P0   0x346C

Definition at line 2619 of file dptx_reg.h.

◆ REG_3470_DP_TRANS_P0

#define REG_3470_DP_TRANS_P0   0x3470

Definition at line 2624 of file dptx_reg.h.

◆ REG_3474_DP_TRANS_P0

#define REG_3474_DP_TRANS_P0   0x3474

Definition at line 2629 of file dptx_reg.h.

◆ REG_3478_DP_TRANS_P0

#define REG_3478_DP_TRANS_P0   0x3478

Definition at line 2634 of file dptx_reg.h.

◆ REG_347C_DP_TRANS_P0

#define REG_347C_DP_TRANS_P0   0x347C

Definition at line 2675 of file dptx_reg.h.

◆ REG_3480_DP_TRANS_P0

#define REG_3480_DP_TRANS_P0   0x3480

Definition at line 2740 of file dptx_reg.h.

◆ REG_34A4_DP_TRANS_P0

#define REG_34A4_DP_TRANS_P0   0x34A4

Definition at line 2777 of file dptx_reg.h.

◆ REG_34A8_DP_TRANS_P0

#define REG_34A8_DP_TRANS_P0   0x34A8

Definition at line 2826 of file dptx_reg.h.

◆ REG_34D0_DP_TRANS_P0

#define REG_34D0_DP_TRANS_P0   0x34D0

Definition at line 2831 of file dptx_reg.h.

◆ REG_34D4_DP_TRANS_P0

#define REG_34D4_DP_TRANS_P0   0x34D4

Definition at line 2844 of file dptx_reg.h.

◆ REG_34D8_DP_TRANS_P0

#define REG_34D8_DP_TRANS_P0   0x34D8

Definition at line 2849 of file dptx_reg.h.

◆ REG_34DC_DP_TRANS_P0

#define REG_34DC_DP_TRANS_P0   0x34DC

Definition at line 2854 of file dptx_reg.h.

◆ REG_34E0_DP_TRANS_P0

#define REG_34E0_DP_TRANS_P0   0x34E0

Definition at line 2859 of file dptx_reg.h.

◆ REG_34E4_DP_TRANS_P0

#define REG_34E4_DP_TRANS_P0   0x34E4

Definition at line 2864 of file dptx_reg.h.

◆ REG_34E8_DP_TRANS_P0

#define REG_34E8_DP_TRANS_P0   0x34E8

Definition at line 2869 of file dptx_reg.h.

◆ REG_34EC_DP_TRANS_P0

#define REG_34EC_DP_TRANS_P0   0x34EC

Definition at line 2874 of file dptx_reg.h.

◆ REG_34F0_DP_TRANS_P0

#define REG_34F0_DP_TRANS_P0   0x34F0

Definition at line 2879 of file dptx_reg.h.

◆ REG_34F4_DP_TRANS_P0

#define REG_34F4_DP_TRANS_P0   0x34F4

Definition at line 2884 of file dptx_reg.h.

◆ REG_34F8_DP_TRANS_P0

#define REG_34F8_DP_TRANS_P0   0x34F8

Definition at line 2897 of file dptx_reg.h.

◆ REG_34FC_DP_TRANS_P0

#define REG_34FC_DP_TRANS_P0   0x34FC

Definition at line 2902 of file dptx_reg.h.

◆ REG_3500_DP_TRANS_P0

#define REG_3500_DP_TRANS_P0   0x3500

Definition at line 2911 of file dptx_reg.h.

◆ REG_3504_DP_TRANS_P0

#define REG_3504_DP_TRANS_P0   0x3504

Definition at line 2916 of file dptx_reg.h.

◆ REG_3508_DP_TRANS_P0

#define REG_3508_DP_TRANS_P0   0x3508

Definition at line 2921 of file dptx_reg.h.

◆ REG_350C_DP_TRANS_P0

#define REG_350C_DP_TRANS_P0   0x350C

Definition at line 2926 of file dptx_reg.h.

◆ REG_3510_DP_TRANS_P0

#define REG_3510_DP_TRANS_P0   0x3510

Definition at line 2931 of file dptx_reg.h.

◆ REG_3540_DP_TRANS_P0

#define REG_3540_DP_TRANS_P0   0x3540

Definition at line 2936 of file dptx_reg.h.

◆ REG_3544_DP_TRANS_P0

#define REG_3544_DP_TRANS_P0   0x3544

Definition at line 2961 of file dptx_reg.h.

◆ REG_3548_DP_TRANS_P0

#define REG_3548_DP_TRANS_P0   0x3548

Definition at line 3002 of file dptx_reg.h.

◆ REG_354C_DP_TRANS_P0

#define REG_354C_DP_TRANS_P0   0x354C

Definition at line 3035 of file dptx_reg.h.

◆ REG_3550_DP_TRANS_P0

#define REG_3550_DP_TRANS_P0   0x3550

Definition at line 3064 of file dptx_reg.h.

◆ REG_3554_DP_TRANS_P0

#define REG_3554_DP_TRANS_P0   0x3554

Definition at line 3073 of file dptx_reg.h.

◆ REG_3558_DP_TRANS_P0

#define REG_3558_DP_TRANS_P0   0x3558

Definition at line 3078 of file dptx_reg.h.

◆ REG_355C_DP_TRANS_P0

#define REG_355C_DP_TRANS_P0   0x355C

Definition at line 3083 of file dptx_reg.h.

◆ REG_3580_DP_TRANS_P0

#define REG_3580_DP_TRANS_P0   0x3580

Definition at line 3088 of file dptx_reg.h.

◆ REG_3584_DP_TRANS_P0

#define REG_3584_DP_TRANS_P0   0x3584

Definition at line 3109 of file dptx_reg.h.

◆ REG_3588_DP_TRANS_P0

#define REG_3588_DP_TRANS_P0   0x3588

Definition at line 3114 of file dptx_reg.h.

◆ REG_358C_DP_TRANS_P0

#define REG_358C_DP_TRANS_P0   0x358C

Definition at line 3119 of file dptx_reg.h.

◆ REG_3590_DP_TRANS_P0

#define REG_3590_DP_TRANS_P0   0x3590

Definition at line 3124 of file dptx_reg.h.

◆ REG_3594_DP_TRANS_P0

#define REG_3594_DP_TRANS_P0   0x3594

Definition at line 3129 of file dptx_reg.h.

◆ REG_3598_DP_TRANS_P0

#define REG_3598_DP_TRANS_P0   0x3598

Definition at line 3134 of file dptx_reg.h.

◆ REG_359C_DP_TRANS_P0

#define REG_359C_DP_TRANS_P0   0x359C

Definition at line 3139 of file dptx_reg.h.

◆ REG_35A0_DP_TRANS_P0

#define REG_35A0_DP_TRANS_P0   0x35A0

Definition at line 3144 of file dptx_reg.h.

◆ REG_35A4_DP_TRANS_P0

#define REG_35A4_DP_TRANS_P0   0x35A4

Definition at line 3149 of file dptx_reg.h.

◆ REG_35A8_DP_TRANS_P0

#define REG_35A8_DP_TRANS_P0   0x35A8

Definition at line 3154 of file dptx_reg.h.

◆ REG_35AC_DP_TRANS_P0

#define REG_35AC_DP_TRANS_P0   0x35AC

Definition at line 3159 of file dptx_reg.h.

◆ REG_35B0_DP_TRANS_P0

#define REG_35B0_DP_TRANS_P0   0x35B0

Definition at line 3164 of file dptx_reg.h.

◆ REG_35C0_DP_TRANS_P0

#define REG_35C0_DP_TRANS_P0   0x35C0

Definition at line 3169 of file dptx_reg.h.

◆ REG_35C4_DP_TRANS_P0

#define REG_35C4_DP_TRANS_P0   0x35C4

Definition at line 3174 of file dptx_reg.h.

◆ REG_35C8_DP_TRANS_P0

#define REG_35C8_DP_TRANS_P0   0x35C8

Definition at line 3179 of file dptx_reg.h.

◆ REG_35CC_DP_TRANS_P0

#define REG_35CC_DP_TRANS_P0   0x35CC

Definition at line 3184 of file dptx_reg.h.

◆ REG_35D0_DP_TRANS_P0

#define REG_35D0_DP_TRANS_P0   0x35D0

Definition at line 3189 of file dptx_reg.h.

◆ REG_35D4_DP_TRANS_P0

#define REG_35D4_DP_TRANS_P0   0x35D4

Definition at line 3194 of file dptx_reg.h.

◆ REG_35D8_DP_TRANS_P0

#define REG_35D8_DP_TRANS_P0   0x35D8

Definition at line 3199 of file dptx_reg.h.

◆ REG_35F0_DP_TRANS_P0

#define REG_35F0_DP_TRANS_P0   0x35F0

Definition at line 3204 of file dptx_reg.h.

◆ REG_35F4_DP_TRANS_P0

#define REG_35F4_DP_TRANS_P0   0x35F4

Definition at line 3209 of file dptx_reg.h.

◆ REG_35F8_DP_TRANS_P0

#define REG_35F8_DP_TRANS_P0   0x35F8

Definition at line 3214 of file dptx_reg.h.

◆ REG_35FC_DP_TRANS_P0

#define REG_35FC_DP_TRANS_P0   0x35FC

Definition at line 3219 of file dptx_reg.h.

◆ REG_3600_AUX_TX_P0

#define REG_3600_AUX_TX_P0   0x3600

Definition at line 3224 of file dptx_reg.h.

◆ REG_3604_AUX_TX_P0

#define REG_3604_AUX_TX_P0   0x3604

Definition at line 3249 of file dptx_reg.h.

◆ REG_3608_AUX_TX_P0

#define REG_3608_AUX_TX_P0   0x3608

Definition at line 3270 of file dptx_reg.h.

◆ REG_360C_AUX_TX_P0

#define REG_360C_AUX_TX_P0   0x360C

Definition at line 3275 of file dptx_reg.h.

◆ REG_3610_AUX_TX_P0

#define REG_3610_AUX_TX_P0   0x3610

Definition at line 3292 of file dptx_reg.h.

◆ REG_3614_AUX_TX_P0

#define REG_3614_AUX_TX_P0   0x3614

Definition at line 3309 of file dptx_reg.h.

◆ REG_3618_AUX_TX_P0

#define REG_3618_AUX_TX_P0   0x3618

Definition at line 3330 of file dptx_reg.h.

◆ REG_361C_AUX_TX_P0

#define REG_361C_AUX_TX_P0   0x361C

Definition at line 3351 of file dptx_reg.h.

◆ REG_3620_AUX_TX_P0

#define REG_3620_AUX_TX_P0   0x3620

Definition at line 3360 of file dptx_reg.h.

◆ REG_3624_AUX_TX_P0

#define REG_3624_AUX_TX_P0   0x3624

Definition at line 3373 of file dptx_reg.h.

◆ REG_3628_AUX_TX_P0

#define REG_3628_AUX_TX_P0   0x3628

Definition at line 3382 of file dptx_reg.h.

◆ REG_362C_AUX_TX_P0

#define REG_362C_AUX_TX_P0   0x362C

Definition at line 3391 of file dptx_reg.h.

◆ REG_3630_AUX_TX_P0

#define REG_3630_AUX_TX_P0   0x3630

Definition at line 3404 of file dptx_reg.h.

◆ REG_3634_AUX_TX_P0

#define REG_3634_AUX_TX_P0   0x3634

Definition at line 3413 of file dptx_reg.h.

◆ REG_3638_AUX_TX_P0

#define REG_3638_AUX_TX_P0   0x3638

Definition at line 3422 of file dptx_reg.h.

◆ REG_363C_AUX_TX_P0

#define REG_363C_AUX_TX_P0   0x363C

Definition at line 3431 of file dptx_reg.h.

◆ REG_3640_AUX_TX_P0

#define REG_3640_AUX_TX_P0   0x3640

Definition at line 3444 of file dptx_reg.h.

◆ REG_3644_AUX_TX_P0

#define REG_3644_AUX_TX_P0   0x3644

Definition at line 3473 of file dptx_reg.h.

◆ REG_3648_AUX_TX_P0

#define REG_3648_AUX_TX_P0   0x3648

Definition at line 3482 of file dptx_reg.h.

◆ REG_364C_AUX_TX_P0

#define REG_364C_AUX_TX_P0   0x364C

Definition at line 3487 of file dptx_reg.h.

◆ REG_3650_AUX_TX_P0

#define REG_3650_AUX_TX_P0   0x3650

Definition at line 3492 of file dptx_reg.h.

◆ REG_3654_AUX_TX_P0

#define REG_3654_AUX_TX_P0   0x3654

Definition at line 3509 of file dptx_reg.h.

◆ REG_3658_AUX_TX_P0

#define REG_3658_AUX_TX_P0   0x3658

Definition at line 3514 of file dptx_reg.h.

◆ REG_365C_AUX_TX_P0

#define REG_365C_AUX_TX_P0   0x365C

Definition at line 3547 of file dptx_reg.h.

◆ REG_3660_AUX_TX_P0

#define REG_3660_AUX_TX_P0   0x3660

Definition at line 3576 of file dptx_reg.h.

◆ REG_3664_AUX_TX_P0

#define REG_3664_AUX_TX_P0   0x3664

Definition at line 3581 of file dptx_reg.h.

◆ REG_3668_AUX_TX_P0

#define REG_3668_AUX_TX_P0   0x3668

Definition at line 3586 of file dptx_reg.h.

◆ REG_366C_AUX_TX_P0

#define REG_366C_AUX_TX_P0   0x366C

Definition at line 3591 of file dptx_reg.h.

◆ REG_3670_AUX_TX_P0

#define REG_3670_AUX_TX_P0   0x3670

Definition at line 3596 of file dptx_reg.h.

◆ REG_3674_AUX_TX_P0

#define REG_3674_AUX_TX_P0   0x3674

Definition at line 3621 of file dptx_reg.h.

◆ REG_3678_AUX_TX_P0

#define REG_3678_AUX_TX_P0   0x3678

Definition at line 3646 of file dptx_reg.h.

◆ REG_367C_AUX_TX_P0

#define REG_367C_AUX_TX_P0   0x367C

Definition at line 3651 of file dptx_reg.h.

◆ REG_3680_AUX_TX_P0

#define REG_3680_AUX_TX_P0   0x3680

Definition at line 3692 of file dptx_reg.h.

◆ REG_3684_AUX_TX_P0

#define REG_3684_AUX_TX_P0   0x3684

Definition at line 3697 of file dptx_reg.h.

◆ REG_3688_AUX_TX_P0

#define REG_3688_AUX_TX_P0   0x3688

Definition at line 3714 of file dptx_reg.h.

◆ REG_368C_AUX_TX_P0

#define REG_368C_AUX_TX_P0   0x368C

Definition at line 3719 of file dptx_reg.h.

◆ REG_3690_AUX_TX_P0

#define REG_3690_AUX_TX_P0   0x3690

Definition at line 3736 of file dptx_reg.h.

◆ REG_36C0_AUX_TX_P0

#define REG_36C0_AUX_TX_P0   0x36C0

Definition at line 3745 of file dptx_reg.h.

◆ REG_36C4_AUX_TX_P0

#define REG_36C4_AUX_TX_P0   0x36C4

Definition at line 3750 of file dptx_reg.h.

◆ REG_36C8_AUX_TX_P0

#define REG_36C8_AUX_TX_P0   0x36C8

Definition at line 3755 of file dptx_reg.h.

◆ REG_36CC_AUX_TX_P0

#define REG_36CC_AUX_TX_P0   0x36CC

Definition at line 3768 of file dptx_reg.h.

◆ REG_36D0_AUX_TX_P0

#define REG_36D0_AUX_TX_P0   0x36D0

Definition at line 3773 of file dptx_reg.h.

◆ REG_36D4_AUX_TX_P0

#define REG_36D4_AUX_TX_P0   0x36D4

Definition at line 3778 of file dptx_reg.h.

◆ REG_36D8_AUX_TX_P0

#define REG_36D8_AUX_TX_P0   0x36D8

Definition at line 3783 of file dptx_reg.h.

◆ REG_36DC_AUX_TX_P0

#define REG_36DC_AUX_TX_P0   0x36DC

Definition at line 3796 of file dptx_reg.h.

◆ REG_36E0_AUX_TX_P0

#define REG_36E0_AUX_TX_P0   0x36E0

Definition at line 3801 of file dptx_reg.h.

◆ REG_36E4_AUX_TX_P0

#define REG_36E4_AUX_TX_P0   0x36E4

Definition at line 3814 of file dptx_reg.h.

◆ REG_36E8_AUX_TX_P0

#define REG_36E8_AUX_TX_P0   0x36E8

Definition at line 3823 of file dptx_reg.h.

◆ REG_36EC_AUX_TX_P0

#define REG_36EC_AUX_TX_P0   0x36EC

Definition at line 3856 of file dptx_reg.h.

◆ REG_36F0_AUX_TX_P0

#define REG_36F0_AUX_TX_P0   0x36F0

Definition at line 3869 of file dptx_reg.h.

◆ REG_3700_AUX_TX_P0

#define REG_3700_AUX_TX_P0   0x3700

Definition at line 3874 of file dptx_reg.h.

◆ REG_3704_AUX_TX_P0

#define REG_3704_AUX_TX_P0   0x3704

Definition at line 3887 of file dptx_reg.h.

◆ REG_3708_AUX_TX_P0

#define REG_3708_AUX_TX_P0   0x3708

Definition at line 3900 of file dptx_reg.h.

◆ REG_370C_AUX_TX_P0

#define REG_370C_AUX_TX_P0   0x370C

Definition at line 3909 of file dptx_reg.h.

◆ REG_3710_AUX_TX_P0

#define REG_3710_AUX_TX_P0   0x3710

Definition at line 3918 of file dptx_reg.h.

◆ REG_3714_AUX_TX_P0

#define REG_3714_AUX_TX_P0   0x3714

Definition at line 3927 of file dptx_reg.h.

◆ REG_3718_AUX_TX_P0

#define REG_3718_AUX_TX_P0   0x3718

Definition at line 3936 of file dptx_reg.h.

◆ REG_371C_AUX_TX_P0

#define REG_371C_AUX_TX_P0   0x371C

Definition at line 3945 of file dptx_reg.h.

◆ REG_3720_AUX_TX_P0

#define REG_3720_AUX_TX_P0   0x3720

Definition at line 3954 of file dptx_reg.h.

◆ REG_3724_AUX_TX_P0

#define REG_3724_AUX_TX_P0   0x3724

Definition at line 3963 of file dptx_reg.h.

◆ REG_3740_AUX_TX_P0

#define REG_3740_AUX_TX_P0   0x3740

Definition at line 3972 of file dptx_reg.h.

◆ REG_3744_AUX_TX_P0

#define REG_3744_AUX_TX_P0   0x3744

Definition at line 3981 of file dptx_reg.h.

◆ REG_3748_AUX_TX_P0

#define REG_3748_AUX_TX_P0   0x3748

Definition at line 3986 of file dptx_reg.h.

◆ REG_374C_AUX_TX_P0

#define REG_374C_AUX_TX_P0   0x374C

Definition at line 4031 of file dptx_reg.h.

◆ REG_3780_AUX_TX_P0

#define REG_3780_AUX_TX_P0   0x3780

Definition at line 4060 of file dptx_reg.h.

◆ REG_3784_AUX_TX_P0

#define REG_3784_AUX_TX_P0   0x3784

Definition at line 4069 of file dptx_reg.h.

◆ REG_3788_AUX_TX_P0

#define REG_3788_AUX_TX_P0   0x3788

Definition at line 4078 of file dptx_reg.h.

◆ REG_378C_AUX_TX_P0

#define REG_378C_AUX_TX_P0   0x378C

Definition at line 4087 of file dptx_reg.h.

◆ REG_3790_AUX_TX_P0

#define REG_3790_AUX_TX_P0   0x3790

Definition at line 4096 of file dptx_reg.h.

◆ REG_3794_AUX_TX_P0

#define REG_3794_AUX_TX_P0   0x3794

Definition at line 4105 of file dptx_reg.h.

◆ REG_3798_AUX_TX_P0

#define REG_3798_AUX_TX_P0   0x3798

Definition at line 4114 of file dptx_reg.h.

◆ REG_379C_AUX_TX_P0

#define REG_379C_AUX_TX_P0   0x379C

Definition at line 4123 of file dptx_reg.h.

◆ REG_37C0_AUX_TX_P0

#define REG_37C0_AUX_TX_P0   0x37C0

Definition at line 4132 of file dptx_reg.h.

◆ REG_37C4_AUX_TX_P0

#define REG_37C4_AUX_TX_P0   0x37C4

Definition at line 4141 of file dptx_reg.h.

◆ REG_37C8_AUX_TX_P0

#define REG_37C8_AUX_TX_P0   0x37C8

Definition at line 4150 of file dptx_reg.h.

◆ REPEATER_I_DP_TRANS_P0_FLDMASK

#define REPEATER_I_DP_TRANS_P0_FLDMASK   0x8000

Definition at line 2822 of file dptx_reg.h.

◆ REPEATER_I_DP_TRANS_P0_FLDMASK_LEN

#define REPEATER_I_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2824 of file dptx_reg.h.

◆ REPEATER_I_DP_TRANS_P0_FLDMASK_POS

#define REPEATER_I_DP_TRANS_P0_FLDMASK_POS   15

Definition at line 2823 of file dptx_reg.h.

◆ REQ_BLOCK_CIPHER_AUTH_DP_TRANS_P0_FLDMASK

#define REQ_BLOCK_CIPHER_AUTH_DP_TRANS_P0_FLDMASK   0x1000

Definition at line 2761 of file dptx_reg.h.

◆ REQ_BLOCK_CIPHER_AUTH_DP_TRANS_P0_FLDMASK_LEN

#define REQ_BLOCK_CIPHER_AUTH_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2763 of file dptx_reg.h.

◆ REQ_BLOCK_CIPHER_AUTH_DP_TRANS_P0_FLDMASK_POS

#define REQ_BLOCK_CIPHER_AUTH_DP_TRANS_P0_FLDMASK_POS   12

Definition at line 2762 of file dptx_reg.h.

◆ RESERVED_CFG_DP_ENCODER0_P0_FLDMASK

#define RESERVED_CFG_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 1111 of file dptx_reg.h.

◆ RESERVED_CFG_DP_ENCODER0_P0_FLDMASK_LEN

#define RESERVED_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1113 of file dptx_reg.h.

◆ RESERVED_CFG_DP_ENCODER0_P0_FLDMASK_POS

#define RESERVED_CFG_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 1112 of file dptx_reg.h.

◆ RESERVED_FLDMASK

#define RESERVED_FLDMASK   0xffffffffL

Definition at line 4228 of file dptx_reg.h.

◆ RESERVED_FLDMASK_LEN

#define RESERVED_FLDMASK_LEN   32

Definition at line 4230 of file dptx_reg.h.

◆ RESERVED_FLDMASK_POS

#define RESERVED_FLDMASK_POS   0

Definition at line 4229 of file dptx_reg.h.

◆ RESERVED_HB0_DP_ENCODER0_P0_FLDMASK

#define RESERVED_HB0_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 1116 of file dptx_reg.h.

◆ RESERVED_HB0_DP_ENCODER0_P0_FLDMASK_LEN

#define RESERVED_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1118 of file dptx_reg.h.

◆ RESERVED_HB0_DP_ENCODER0_P0_FLDMASK_POS

#define RESERVED_HB0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 1117 of file dptx_reg.h.

◆ RESERVED_HB1_DP_ENCODER0_P0_FLDMASK

#define RESERVED_HB1_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 1120 of file dptx_reg.h.

◆ RESERVED_HB1_DP_ENCODER0_P0_FLDMASK_LEN

#define RESERVED_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1122 of file dptx_reg.h.

◆ RESERVED_HB1_DP_ENCODER0_P0_FLDMASK_POS

#define RESERVED_HB1_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 1121 of file dptx_reg.h.

◆ RESERVED_HB2_DP_ENCODER0_P0_FLDMASK

#define RESERVED_HB2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 1125 of file dptx_reg.h.

◆ RESERVED_HB2_DP_ENCODER0_P0_FLDMASK_LEN

#define RESERVED_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1127 of file dptx_reg.h.

◆ RESERVED_HB2_DP_ENCODER0_P0_FLDMASK_POS

#define RESERVED_HB2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 1126 of file dptx_reg.h.

◆ RESERVED_HB3_DP_ENCODER0_P0_FLDMASK

#define RESERVED_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 1129 of file dptx_reg.h.

◆ RESERVED_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define RESERVED_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1131 of file dptx_reg.h.

◆ RESERVED_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define RESERVED_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 1130 of file dptx_reg.h.

◆ RGS_DP_TX_HDCP13_HDCP_AN_0_FLDMASK

#define RGS_DP_TX_HDCP13_HDCP_AN_0_FLDMASK   0xffffffffL

Definition at line 4594 of file dptx_reg.h.

◆ RGS_DP_TX_HDCP13_HDCP_AN_0_FLDMASK_LEN

#define RGS_DP_TX_HDCP13_HDCP_AN_0_FLDMASK_LEN   32

Definition at line 4596 of file dptx_reg.h.

◆ RGS_DP_TX_HDCP13_HDCP_AN_0_FLDMASK_POS

#define RGS_DP_TX_HDCP13_HDCP_AN_0_FLDMASK_POS   0

Definition at line 4595 of file dptx_reg.h.

◆ RGS_DP_TX_HDCP13_HDCP_AN_1_FLDMASK

#define RGS_DP_TX_HDCP13_HDCP_AN_1_FLDMASK   0xffffffffL

Definition at line 4599 of file dptx_reg.h.

◆ RGS_DP_TX_HDCP13_HDCP_AN_1_FLDMASK_LEN

#define RGS_DP_TX_HDCP13_HDCP_AN_1_FLDMASK_LEN   32

Definition at line 4601 of file dptx_reg.h.

◆ RGS_DP_TX_HDCP13_HDCP_AN_1_FLDMASK_POS

#define RGS_DP_TX_HDCP13_HDCP_AN_1_FLDMASK_POS   0

Definition at line 4600 of file dptx_reg.h.

◆ RGS_DP_TX_HDCP13_HDCP_M0_0_FLDMASK

#define RGS_DP_TX_HDCP13_HDCP_M0_0_FLDMASK   0xffffffffL

Definition at line 4609 of file dptx_reg.h.

◆ RGS_DP_TX_HDCP13_HDCP_M0_0_FLDMASK_LEN

#define RGS_DP_TX_HDCP13_HDCP_M0_0_FLDMASK_LEN   32

Definition at line 4611 of file dptx_reg.h.

◆ RGS_DP_TX_HDCP13_HDCP_M0_0_FLDMASK_POS

#define RGS_DP_TX_HDCP13_HDCP_M0_0_FLDMASK_POS   0

Definition at line 4610 of file dptx_reg.h.

◆ RGS_DP_TX_HDCP13_HDCP_M0_1_FLDMASK

#define RGS_DP_TX_HDCP13_HDCP_M0_1_FLDMASK   0xffffffffL

Definition at line 4614 of file dptx_reg.h.

◆ RGS_DP_TX_HDCP13_HDCP_M0_1_FLDMASK_LEN

#define RGS_DP_TX_HDCP13_HDCP_M0_1_FLDMASK_LEN   32

Definition at line 4616 of file dptx_reg.h.

◆ RGS_DP_TX_HDCP13_HDCP_M0_1_FLDMASK_POS

#define RGS_DP_TX_HDCP13_HDCP_M0_1_FLDMASK_POS   0

Definition at line 4615 of file dptx_reg.h.

◆ RGS_DP_TX_HDCP13_HDCP_R0_FLDMASK

#define RGS_DP_TX_HDCP13_HDCP_R0_FLDMASK   0xffff

Definition at line 4604 of file dptx_reg.h.

◆ RGS_DP_TX_HDCP13_HDCP_R0_FLDMASK_LEN

#define RGS_DP_TX_HDCP13_HDCP_R0_FLDMASK_LEN   16

Definition at line 4606 of file dptx_reg.h.

◆ RGS_DP_TX_HDCP13_HDCP_R0_FLDMASK_POS

#define RGS_DP_TX_HDCP13_HDCP_R0_FLDMASK_POS   0

Definition at line 4605 of file dptx_reg.h.

◆ RGS_DP_TX_PWR_ACK_2ND_FLDMASK

#define RGS_DP_TX_PWR_ACK_2ND_FLDMASK   0x2

Definition at line 4417 of file dptx_reg.h.

◆ RGS_DP_TX_PWR_ACK_2ND_FLDMASK_LEN

#define RGS_DP_TX_PWR_ACK_2ND_FLDMASK_LEN   1

Definition at line 4419 of file dptx_reg.h.

◆ RGS_DP_TX_PWR_ACK_2ND_FLDMASK_POS

#define RGS_DP_TX_PWR_ACK_2ND_FLDMASK_POS   1

Definition at line 4418 of file dptx_reg.h.

◆ RGS_DP_TX_PWR_ACK_FLDMASK

#define RGS_DP_TX_PWR_ACK_FLDMASK   0x1

Definition at line 4413 of file dptx_reg.h.

◆ RGS_DP_TX_PWR_ACK_FLDMASK_LEN

#define RGS_DP_TX_PWR_ACK_FLDMASK_LEN   1

Definition at line 4415 of file dptx_reg.h.

◆ RGS_DP_TX_PWR_ACK_FLDMASK_POS

#define RGS_DP_TX_PWR_ACK_FLDMASK_POS   0

Definition at line 4414 of file dptx_reg.h.

◆ RGS_IRQ_STATUS_FLDMASK

#define RGS_IRQ_STATUS_FLDMASK   0x7

Definition at line 4255 of file dptx_reg.h.

◆ RGS_IRQ_STATUS_FLDMASK_LEN

#define RGS_IRQ_STATUS_FLDMASK_LEN   3

Definition at line 4257 of file dptx_reg.h.

◆ RGS_IRQ_STATUS_FLDMASK_POS

#define RGS_IRQ_STATUS_FLDMASK_POS   0

Definition at line 4256 of file dptx_reg.h.

◆ RGS_PREFUSE_FLDMASK

#define RGS_PREFUSE_FLDMASK   0xffff

Definition at line 4291 of file dptx_reg.h.

◆ RGS_PREFUSE_FLDMASK_LEN

#define RGS_PREFUSE_FLDMASK_LEN   16

Definition at line 4293 of file dptx_reg.h.

◆ RGS_PREFUSE_FLDMASK_POS

#define RGS_PREFUSE_FLDMASK_POS   0

Definition at line 4292 of file dptx_reg.h.

◆ RO_IO_LOOPBKT_AUX_TX_P0_FLDMASK

#define RO_IO_LOOPBKT_AUX_TX_P0_FLDMASK   0x300

Definition at line 3702 of file dptx_reg.h.

◆ RO_IO_LOOPBKT_AUX_TX_P0_FLDMASK_LEN

#define RO_IO_LOOPBKT_AUX_TX_P0_FLDMASK_LEN   2

Definition at line 3704 of file dptx_reg.h.

◆ RO_IO_LOOPBKT_AUX_TX_P0_FLDMASK_POS

#define RO_IO_LOOPBKT_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3703 of file dptx_reg.h.

◆ RX_FIFO_DONE_AUX_TX_P0_FLDMASK

#define RX_FIFO_DONE_AUX_TX_P0_FLDMASK   0x1

Definition at line 3720 of file dptx_reg.h.

◆ RX_FIFO_DONE_AUX_TX_P0_FLDMASK_LEN

#define RX_FIFO_DONE_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3722 of file dptx_reg.h.

◆ RX_FIFO_DONE_AUX_TX_P0_FLDMASK_POS

#define RX_FIFO_DONE_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3721 of file dptx_reg.h.

◆ RX_FIFO_DONE_CLR_AUX_TX_P0_FLDMASK

#define RX_FIFO_DONE_CLR_AUX_TX_P0_FLDMASK   0x2

Definition at line 3724 of file dptx_reg.h.

◆ RX_FIFO_DONE_CLR_AUX_TX_P0_FLDMASK_LEN

#define RX_FIFO_DONE_CLR_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3726 of file dptx_reg.h.

◆ RX_FIFO_DONE_CLR_AUX_TX_P0_FLDMASK_POS

#define RX_FIFO_DONE_CLR_AUX_TX_P0_FLDMASK_POS   1

Definition at line 3725 of file dptx_reg.h.

◆ RX_GTC_FREQ_LOCK_DONE_AUX_TX_P0_FLDMASK

#define RX_GTC_FREQ_LOCK_DONE_AUX_TX_P0_FLDMASK   0x4

Definition at line 3764 of file dptx_reg.h.

◆ RX_GTC_FREQ_LOCK_DONE_AUX_TX_P0_FLDMASK_LEN

#define RX_GTC_FREQ_LOCK_DONE_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3766 of file dptx_reg.h.

◆ RX_GTC_FREQ_LOCK_DONE_AUX_TX_P0_FLDMASK_POS

#define RX_GTC_FREQ_LOCK_DONE_AUX_TX_P0_FLDMASK_POS   2

Definition at line 3765 of file dptx_reg.h.

◆ RX_GTC_MASTER_REQ_AUX_TX_P0_FLDMASK

#define RX_GTC_MASTER_REQ_AUX_TX_P0_FLDMASK   0x1

Definition at line 3756 of file dptx_reg.h.

◆ RX_GTC_MASTER_REQ_AUX_TX_P0_FLDMASK_LEN

#define RX_GTC_MASTER_REQ_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3758 of file dptx_reg.h.

◆ RX_GTC_MASTER_REQ_AUX_TX_P0_FLDMASK_POS

#define RX_GTC_MASTER_REQ_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3757 of file dptx_reg.h.

◆ RX_GTC_PHASE_SKEW_OFFSET_AUX_TX_P0_FLDMASK

#define RX_GTC_PHASE_SKEW_OFFSET_AUX_TX_P0_FLDMASK   0xffff

Definition at line 3769 of file dptx_reg.h.

◆ RX_GTC_PHASE_SKEW_OFFSET_AUX_TX_P0_FLDMASK_LEN

#define RX_GTC_PHASE_SKEW_OFFSET_AUX_TX_P0_FLDMASK_LEN   16

Definition at line 3771 of file dptx_reg.h.

◆ RX_GTC_PHASE_SKEW_OFFSET_AUX_TX_P0_FLDMASK_POS

#define RX_GTC_PHASE_SKEW_OFFSET_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3770 of file dptx_reg.h.

◆ RX_GTC_VALUE_0_AUX_TX_P0_FLDMASK

#define RX_GTC_VALUE_0_AUX_TX_P0_FLDMASK   0xffff

Definition at line 3746 of file dptx_reg.h.

◆ RX_GTC_VALUE_0_AUX_TX_P0_FLDMASK_LEN

#define RX_GTC_VALUE_0_AUX_TX_P0_FLDMASK_LEN   16

Definition at line 3748 of file dptx_reg.h.

◆ RX_GTC_VALUE_0_AUX_TX_P0_FLDMASK_POS

#define RX_GTC_VALUE_0_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3747 of file dptx_reg.h.

◆ RX_GTC_VALUE_1_AUX_TX_P0_FLDMASK

#define RX_GTC_VALUE_1_AUX_TX_P0_FLDMASK   0xffff

Definition at line 3751 of file dptx_reg.h.

◆ RX_GTC_VALUE_1_AUX_TX_P0_FLDMASK_LEN

#define RX_GTC_VALUE_1_AUX_TX_P0_FLDMASK_LEN   16

Definition at line 3753 of file dptx_reg.h.

◆ RX_GTC_VALUE_1_AUX_TX_P0_FLDMASK_POS

#define RX_GTC_VALUE_1_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3752 of file dptx_reg.h.

◆ RX_GTC_VALUE_PHASE_SKEW_EN_AUX_TX_P0_FLDMASK

#define RX_GTC_VALUE_PHASE_SKEW_EN_AUX_TX_P0_FLDMASK   0x1

Definition at line 3784 of file dptx_reg.h.

◆ RX_GTC_VALUE_PHASE_SKEW_EN_AUX_TX_P0_FLDMASK_LEN

#define RX_GTC_VALUE_PHASE_SKEW_EN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3786 of file dptx_reg.h.

◆ RX_GTC_VALUE_PHASE_SKEW_EN_AUX_TX_P0_FLDMASK_POS

#define RX_GTC_VALUE_PHASE_SKEW_EN_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3785 of file dptx_reg.h.

◆ RX_MASTER_LOCK_ACCQUI_CHKTIME_AUX_TX_P0_FLDMASK

#define RX_MASTER_LOCK_ACCQUI_CHKTIME_AUX_TX_P0_FLDMASK   0xf0

Definition at line 3806 of file dptx_reg.h.

◆ RX_MASTER_LOCK_ACCQUI_CHKTIME_AUX_TX_P0_FLDMASK_LEN

#define RX_MASTER_LOCK_ACCQUI_CHKTIME_AUX_TX_P0_FLDMASK_LEN   4

Definition at line 3808 of file dptx_reg.h.

◆ RX_MASTER_LOCK_ACCQUI_CHKTIME_AUX_TX_P0_FLDMASK_POS

#define RX_MASTER_LOCK_ACCQUI_CHKTIME_AUX_TX_P0_FLDMASK_POS   4

Definition at line 3807 of file dptx_reg.h.

◆ RX_REPLY_COMPLETE_MODE_AUX_TX_P0_FLDMASK

#define RX_REPLY_COMPLETE_MODE_AUX_TX_P0_FLDMASK   0x100

Definition at line 3741 of file dptx_reg.h.

◆ RX_REPLY_COMPLETE_MODE_AUX_TX_P0_FLDMASK_LEN

#define RX_REPLY_COMPLETE_MODE_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3743 of file dptx_reg.h.

◆ RX_REPLY_COMPLETE_MODE_AUX_TX_P0_FLDMASK_POS

#define RX_REPLY_COMPLETE_MODE_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3742 of file dptx_reg.h.

◆ SCRAMB_BYPASS_IN_EN_DP_TRANS_P0_FLDMASK

#define SCRAMB_BYPASS_IN_EN_DP_TRANS_P0_FLDMASK   0x4

Definition at line 2334 of file dptx_reg.h.

◆ SCRAMB_BYPASS_IN_EN_DP_TRANS_P0_FLDMASK_LEN

#define SCRAMB_BYPASS_IN_EN_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2336 of file dptx_reg.h.

◆ SCRAMB_BYPASS_IN_EN_DP_TRANS_P0_FLDMASK_POS

#define SCRAMB_BYPASS_IN_EN_DP_TRANS_P0_FLDMASK_POS   2

Definition at line 2335 of file dptx_reg.h.

◆ SCRAMB_BYPASS_MASK_DP_TRANS_P0_FLDMASK

#define SCRAMB_BYPASS_MASK_DP_TRANS_P0_FLDMASK   0x8

Definition at line 2338 of file dptx_reg.h.

◆ SCRAMB_BYPASS_MASK_DP_TRANS_P0_FLDMASK_LEN

#define SCRAMB_BYPASS_MASK_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2340 of file dptx_reg.h.

◆ SCRAMB_BYPASS_MASK_DP_TRANS_P0_FLDMASK_POS

#define SCRAMB_BYPASS_MASK_DP_TRANS_P0_FLDMASK_POS   3

Definition at line 2339 of file dptx_reg.h.

◆ SDP_AUDIO_ONE_SAMPLE_MODE_DP_ENCODER0_P0_FLDMASK

#define SDP_AUDIO_ONE_SAMPLE_MODE_DP_ENCODER0_P0_FLDMASK   0x8000

Definition at line 113 of file dptx_reg.h.

◆ SDP_AUDIO_ONE_SAMPLE_MODE_DP_ENCODER0_P0_FLDMASK_LEN

#define SDP_AUDIO_ONE_SAMPLE_MODE_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 115 of file dptx_reg.h.

◆ SDP_AUDIO_ONE_SAMPLE_MODE_DP_ENCODER0_P0_FLDMASK_POS

#define SDP_AUDIO_ONE_SAMPLE_MODE_DP_ENCODER0_P0_FLDMASK_POS   15

Definition at line 114 of file dptx_reg.h.

◆ SDP_DB0_DP_ENCODER1_P0_FLDMASK

#define SDP_DB0_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1227 of file dptx_reg.h.

◆ SDP_DB0_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB0_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1229 of file dptx_reg.h.

◆ SDP_DB0_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB0_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1228 of file dptx_reg.h.

◆ SDP_DB0_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB0_R_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1371 of file dptx_reg.h.

◆ SDP_DB0_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB0_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1373 of file dptx_reg.h.

◆ SDP_DB0_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB0_R_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1372 of file dptx_reg.h.

◆ SDP_DB10_DP_ENCODER1_P0_FLDMASK

#define SDP_DB10_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1272 of file dptx_reg.h.

◆ SDP_DB10_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB10_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1274 of file dptx_reg.h.

◆ SDP_DB10_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB10_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1273 of file dptx_reg.h.

◆ SDP_DB10_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB10_R_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1416 of file dptx_reg.h.

◆ SDP_DB10_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB10_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1418 of file dptx_reg.h.

◆ SDP_DB10_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB10_R_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1417 of file dptx_reg.h.

◆ SDP_DB11_DP_ENCODER1_P0_FLDMASK

#define SDP_DB11_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1276 of file dptx_reg.h.

◆ SDP_DB11_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB11_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1278 of file dptx_reg.h.

◆ SDP_DB11_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB11_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1277 of file dptx_reg.h.

◆ SDP_DB11_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB11_R_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1420 of file dptx_reg.h.

◆ SDP_DB11_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB11_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1422 of file dptx_reg.h.

◆ SDP_DB11_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB11_R_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1421 of file dptx_reg.h.

◆ SDP_DB12_DP_ENCODER1_P0_FLDMASK

#define SDP_DB12_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1281 of file dptx_reg.h.

◆ SDP_DB12_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB12_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1283 of file dptx_reg.h.

◆ SDP_DB12_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB12_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1282 of file dptx_reg.h.

◆ SDP_DB12_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB12_R_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1425 of file dptx_reg.h.

◆ SDP_DB12_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB12_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1427 of file dptx_reg.h.

◆ SDP_DB12_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB12_R_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1426 of file dptx_reg.h.

◆ SDP_DB13_DP_ENCODER1_P0_FLDMASK

#define SDP_DB13_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1285 of file dptx_reg.h.

◆ SDP_DB13_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB13_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1287 of file dptx_reg.h.

◆ SDP_DB13_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB13_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1286 of file dptx_reg.h.

◆ SDP_DB13_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB13_R_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1429 of file dptx_reg.h.

◆ SDP_DB13_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB13_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1431 of file dptx_reg.h.

◆ SDP_DB13_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB13_R_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1430 of file dptx_reg.h.

◆ SDP_DB14_DP_ENCODER1_P0_FLDMASK

#define SDP_DB14_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1290 of file dptx_reg.h.

◆ SDP_DB14_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB14_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1292 of file dptx_reg.h.

◆ SDP_DB14_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB14_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1291 of file dptx_reg.h.

◆ SDP_DB14_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB14_R_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1434 of file dptx_reg.h.

◆ SDP_DB14_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB14_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1436 of file dptx_reg.h.

◆ SDP_DB14_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB14_R_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1435 of file dptx_reg.h.

◆ SDP_DB15_DP_ENCODER1_P0_FLDMASK

#define SDP_DB15_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1294 of file dptx_reg.h.

◆ SDP_DB15_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB15_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1296 of file dptx_reg.h.

◆ SDP_DB15_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB15_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1295 of file dptx_reg.h.

◆ SDP_DB15_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB15_R_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1438 of file dptx_reg.h.

◆ SDP_DB15_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB15_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1440 of file dptx_reg.h.

◆ SDP_DB15_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB15_R_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1439 of file dptx_reg.h.

◆ SDP_DB16_DP_ENCODER1_P0_FLDMASK

#define SDP_DB16_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1299 of file dptx_reg.h.

◆ SDP_DB16_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB16_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1301 of file dptx_reg.h.

◆ SDP_DB16_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB16_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1300 of file dptx_reg.h.

◆ SDP_DB16_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB16_R_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1443 of file dptx_reg.h.

◆ SDP_DB16_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB16_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1445 of file dptx_reg.h.

◆ SDP_DB16_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB16_R_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1444 of file dptx_reg.h.

◆ SDP_DB17_DP_ENCODER1_P0_FLDMASK

#define SDP_DB17_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1303 of file dptx_reg.h.

◆ SDP_DB17_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB17_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1305 of file dptx_reg.h.

◆ SDP_DB17_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB17_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1304 of file dptx_reg.h.

◆ SDP_DB17_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB17_R_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1447 of file dptx_reg.h.

◆ SDP_DB17_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB17_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1449 of file dptx_reg.h.

◆ SDP_DB17_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB17_R_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1448 of file dptx_reg.h.

◆ SDP_DB18_DP_ENCODER1_P0_FLDMASK

#define SDP_DB18_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1308 of file dptx_reg.h.

◆ SDP_DB18_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB18_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1310 of file dptx_reg.h.

◆ SDP_DB18_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB18_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1309 of file dptx_reg.h.

◆ SDP_DB18_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB18_R_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1452 of file dptx_reg.h.

◆ SDP_DB18_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB18_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1454 of file dptx_reg.h.

◆ SDP_DB18_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB18_R_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1453 of file dptx_reg.h.

◆ SDP_DB19_DP_ENCODER1_P0_FLDMASK

#define SDP_DB19_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1312 of file dptx_reg.h.

◆ SDP_DB19_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB19_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1314 of file dptx_reg.h.

◆ SDP_DB19_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB19_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1313 of file dptx_reg.h.

◆ SDP_DB19_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB19_R_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1456 of file dptx_reg.h.

◆ SDP_DB19_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB19_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1458 of file dptx_reg.h.

◆ SDP_DB19_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB19_R_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1457 of file dptx_reg.h.

◆ SDP_DB1_DP_ENCODER1_P0_FLDMASK

#define SDP_DB1_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1231 of file dptx_reg.h.

◆ SDP_DB1_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB1_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1233 of file dptx_reg.h.

◆ SDP_DB1_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB1_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1232 of file dptx_reg.h.

◆ SDP_DB1_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB1_R_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1375 of file dptx_reg.h.

◆ SDP_DB1_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB1_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1377 of file dptx_reg.h.

◆ SDP_DB1_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB1_R_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1376 of file dptx_reg.h.

◆ SDP_DB20_DP_ENCODER1_P0_FLDMASK

#define SDP_DB20_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1317 of file dptx_reg.h.

◆ SDP_DB20_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB20_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1319 of file dptx_reg.h.

◆ SDP_DB20_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB20_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1318 of file dptx_reg.h.

◆ SDP_DB20_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB20_R_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1461 of file dptx_reg.h.

◆ SDP_DB20_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB20_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1463 of file dptx_reg.h.

◆ SDP_DB20_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB20_R_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1462 of file dptx_reg.h.

◆ SDP_DB21_DP_ENCODER1_P0_FLDMASK

#define SDP_DB21_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1321 of file dptx_reg.h.

◆ SDP_DB21_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB21_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1323 of file dptx_reg.h.

◆ SDP_DB21_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB21_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1322 of file dptx_reg.h.

◆ SDP_DB21_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB21_R_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1465 of file dptx_reg.h.

◆ SDP_DB21_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB21_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1467 of file dptx_reg.h.

◆ SDP_DB21_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB21_R_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1466 of file dptx_reg.h.

◆ SDP_DB22_DP_ENCODER1_P0_FLDMASK

#define SDP_DB22_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1326 of file dptx_reg.h.

◆ SDP_DB22_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB22_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1328 of file dptx_reg.h.

◆ SDP_DB22_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB22_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1327 of file dptx_reg.h.

◆ SDP_DB22_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB22_R_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1470 of file dptx_reg.h.

◆ SDP_DB22_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB22_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1472 of file dptx_reg.h.

◆ SDP_DB22_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB22_R_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1471 of file dptx_reg.h.

◆ SDP_DB23_DP_ENCODER1_P0_FLDMASK

#define SDP_DB23_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1330 of file dptx_reg.h.

◆ SDP_DB23_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB23_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1332 of file dptx_reg.h.

◆ SDP_DB23_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB23_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1331 of file dptx_reg.h.

◆ SDP_DB23_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB23_R_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1474 of file dptx_reg.h.

◆ SDP_DB23_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB23_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1476 of file dptx_reg.h.

◆ SDP_DB23_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB23_R_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1475 of file dptx_reg.h.

◆ SDP_DB24_DP_ENCODER1_P0_FLDMASK

#define SDP_DB24_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1335 of file dptx_reg.h.

◆ SDP_DB24_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB24_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1337 of file dptx_reg.h.

◆ SDP_DB24_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB24_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1336 of file dptx_reg.h.

◆ SDP_DB24_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB24_R_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1479 of file dptx_reg.h.

◆ SDP_DB24_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB24_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1481 of file dptx_reg.h.

◆ SDP_DB24_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB24_R_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1480 of file dptx_reg.h.

◆ SDP_DB25_DP_ENCODER1_P0_FLDMASK

#define SDP_DB25_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1339 of file dptx_reg.h.

◆ SDP_DB25_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB25_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1341 of file dptx_reg.h.

◆ SDP_DB25_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB25_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1340 of file dptx_reg.h.

◆ SDP_DB25_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB25_R_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1483 of file dptx_reg.h.

◆ SDP_DB25_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB25_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1485 of file dptx_reg.h.

◆ SDP_DB25_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB25_R_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1484 of file dptx_reg.h.

◆ SDP_DB26_DP_ENCODER1_P0_FLDMASK

#define SDP_DB26_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1344 of file dptx_reg.h.

◆ SDP_DB26_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB26_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1346 of file dptx_reg.h.

◆ SDP_DB26_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB26_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1345 of file dptx_reg.h.

◆ SDP_DB26_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB26_R_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1488 of file dptx_reg.h.

◆ SDP_DB26_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB26_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1490 of file dptx_reg.h.

◆ SDP_DB26_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB26_R_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1489 of file dptx_reg.h.

◆ SDP_DB27_DP_ENCODER1_P0_FLDMASK

#define SDP_DB27_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1348 of file dptx_reg.h.

◆ SDP_DB27_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB27_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1350 of file dptx_reg.h.

◆ SDP_DB27_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB27_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1349 of file dptx_reg.h.

◆ SDP_DB27_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB27_R_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1492 of file dptx_reg.h.

◆ SDP_DB27_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB27_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1494 of file dptx_reg.h.

◆ SDP_DB27_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB27_R_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1493 of file dptx_reg.h.

◆ SDP_DB28_DP_ENCODER1_P0_FLDMASK

#define SDP_DB28_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1353 of file dptx_reg.h.

◆ SDP_DB28_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB28_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1355 of file dptx_reg.h.

◆ SDP_DB28_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB28_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1354 of file dptx_reg.h.

◆ SDP_DB28_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB28_R_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1497 of file dptx_reg.h.

◆ SDP_DB28_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB28_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1499 of file dptx_reg.h.

◆ SDP_DB28_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB28_R_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1498 of file dptx_reg.h.

◆ SDP_DB29_DP_ENCODER1_P0_FLDMASK

#define SDP_DB29_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1357 of file dptx_reg.h.

◆ SDP_DB29_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB29_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1359 of file dptx_reg.h.

◆ SDP_DB29_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB29_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1358 of file dptx_reg.h.

◆ SDP_DB29_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB29_R_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1501 of file dptx_reg.h.

◆ SDP_DB29_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB29_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1503 of file dptx_reg.h.

◆ SDP_DB29_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB29_R_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1502 of file dptx_reg.h.

◆ SDP_DB2_DP_ENCODER1_P0_FLDMASK

#define SDP_DB2_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1236 of file dptx_reg.h.

◆ SDP_DB2_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB2_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1238 of file dptx_reg.h.

◆ SDP_DB2_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB2_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1237 of file dptx_reg.h.

◆ SDP_DB2_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB2_R_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1380 of file dptx_reg.h.

◆ SDP_DB2_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB2_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1382 of file dptx_reg.h.

◆ SDP_DB2_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB2_R_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1381 of file dptx_reg.h.

◆ SDP_DB30_DP_ENCODER1_P0_FLDMASK

#define SDP_DB30_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1362 of file dptx_reg.h.

◆ SDP_DB30_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB30_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1364 of file dptx_reg.h.

◆ SDP_DB30_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB30_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1363 of file dptx_reg.h.

◆ SDP_DB30_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB30_R_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1506 of file dptx_reg.h.

◆ SDP_DB30_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB30_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1508 of file dptx_reg.h.

◆ SDP_DB30_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB30_R_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1507 of file dptx_reg.h.

◆ SDP_DB31_DP_ENCODER1_P0_FLDMASK

#define SDP_DB31_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1366 of file dptx_reg.h.

◆ SDP_DB31_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB31_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1368 of file dptx_reg.h.

◆ SDP_DB31_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB31_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1367 of file dptx_reg.h.

◆ SDP_DB31_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB31_R_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1510 of file dptx_reg.h.

◆ SDP_DB31_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB31_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1512 of file dptx_reg.h.

◆ SDP_DB31_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB31_R_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1511 of file dptx_reg.h.

◆ SDP_DB3_DP_ENCODER1_P0_FLDMASK

#define SDP_DB3_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1240 of file dptx_reg.h.

◆ SDP_DB3_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB3_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1242 of file dptx_reg.h.

◆ SDP_DB3_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB3_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1241 of file dptx_reg.h.

◆ SDP_DB3_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB3_R_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1384 of file dptx_reg.h.

◆ SDP_DB3_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB3_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1386 of file dptx_reg.h.

◆ SDP_DB3_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB3_R_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1385 of file dptx_reg.h.

◆ SDP_DB4_DP_ENCODER1_P0_FLDMASK

#define SDP_DB4_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1245 of file dptx_reg.h.

◆ SDP_DB4_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB4_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1247 of file dptx_reg.h.

◆ SDP_DB4_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB4_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1246 of file dptx_reg.h.

◆ SDP_DB4_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB4_R_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1389 of file dptx_reg.h.

◆ SDP_DB4_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB4_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1391 of file dptx_reg.h.

◆ SDP_DB4_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB4_R_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1390 of file dptx_reg.h.

◆ SDP_DB5_DP_ENCODER1_P0_FLDMASK

#define SDP_DB5_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1249 of file dptx_reg.h.

◆ SDP_DB5_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB5_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1251 of file dptx_reg.h.

◆ SDP_DB5_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB5_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1250 of file dptx_reg.h.

◆ SDP_DB5_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB5_R_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1393 of file dptx_reg.h.

◆ SDP_DB5_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB5_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1395 of file dptx_reg.h.

◆ SDP_DB5_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB5_R_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1394 of file dptx_reg.h.

◆ SDP_DB6_DP_ENCODER1_P0_FLDMASK

#define SDP_DB6_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1254 of file dptx_reg.h.

◆ SDP_DB6_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB6_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1256 of file dptx_reg.h.

◆ SDP_DB6_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB6_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1255 of file dptx_reg.h.

◆ SDP_DB6_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB6_R_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1398 of file dptx_reg.h.

◆ SDP_DB6_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB6_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1400 of file dptx_reg.h.

◆ SDP_DB6_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB6_R_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1399 of file dptx_reg.h.

◆ SDP_DB7_DP_ENCODER1_P0_FLDMASK

#define SDP_DB7_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1258 of file dptx_reg.h.

◆ SDP_DB7_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB7_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1260 of file dptx_reg.h.

◆ SDP_DB7_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB7_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1259 of file dptx_reg.h.

◆ SDP_DB7_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB7_R_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1402 of file dptx_reg.h.

◆ SDP_DB7_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB7_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1404 of file dptx_reg.h.

◆ SDP_DB7_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB7_R_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1403 of file dptx_reg.h.

◆ SDP_DB8_DP_ENCODER1_P0_FLDMASK

#define SDP_DB8_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1263 of file dptx_reg.h.

◆ SDP_DB8_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB8_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1265 of file dptx_reg.h.

◆ SDP_DB8_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB8_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1264 of file dptx_reg.h.

◆ SDP_DB8_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB8_R_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1407 of file dptx_reg.h.

◆ SDP_DB8_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB8_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1409 of file dptx_reg.h.

◆ SDP_DB8_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB8_R_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1408 of file dptx_reg.h.

◆ SDP_DB9_DP_ENCODER1_P0_FLDMASK

#define SDP_DB9_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1267 of file dptx_reg.h.

◆ SDP_DB9_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB9_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1269 of file dptx_reg.h.

◆ SDP_DB9_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB9_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1268 of file dptx_reg.h.

◆ SDP_DB9_R_DP_ENCODER1_P0_FLDMASK

#define SDP_DB9_R_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1411 of file dptx_reg.h.

◆ SDP_DB9_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DB9_R_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1413 of file dptx_reg.h.

◆ SDP_DB9_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DB9_R_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1412 of file dptx_reg.h.

◆ SDP_DOWN_CNT_INIT_DP_ENCODER0_P0_FLDMASK

#define SDP_DOWN_CNT_INIT_DP_ENCODER0_P0_FLDMASK   0xfff

Definition at line 286 of file dptx_reg.h.

◆ SDP_DOWN_CNT_INIT_DP_ENCODER0_P0_FLDMASK_LEN

#define SDP_DOWN_CNT_INIT_DP_ENCODER0_P0_FLDMASK_LEN   12

Definition at line 288 of file dptx_reg.h.

◆ SDP_DOWN_CNT_INIT_DP_ENCODER0_P0_FLDMASK_POS

#define SDP_DOWN_CNT_INIT_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 287 of file dptx_reg.h.

◆ SDP_DOWN_CNT_INIT_IN_HBLANK_DP_ENCODER1_P0_FLDMASK

#define SDP_DOWN_CNT_INIT_IN_HBLANK_DP_ENCODER1_P0_FLDMASK   0xfff

Definition at line 2008 of file dptx_reg.h.

◆ SDP_DOWN_CNT_INIT_IN_HBLANK_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DOWN_CNT_INIT_IN_HBLANK_DP_ENCODER1_P0_FLDMASK_LEN   12

Definition at line 2010 of file dptx_reg.h.

◆ SDP_DOWN_CNT_INIT_IN_HBLANK_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DOWN_CNT_INIT_IN_HBLANK_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2009 of file dptx_reg.h.

◆ SDP_DP13_EN_DP_ENCODER1_P0_FLDMASK

#define SDP_DP13_EN_DP_ENCODER1_P0_FLDMASK   0x100

Definition at line 2029 of file dptx_reg.h.

◆ SDP_DP13_EN_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_DP13_EN_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2031 of file dptx_reg.h.

◆ SDP_DP13_EN_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_DP13_EN_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 2030 of file dptx_reg.h.

◆ SDP_EN_DP_ENCODER0_P0_FLDMASK

#define SDP_EN_DP_ENCODER0_P0_FLDMASK   0x4

Definition at line 521 of file dptx_reg.h.

◆ SDP_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define SDP_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 523 of file dptx_reg.h.

◆ SDP_EN_DP_ENCODER0_P0_FLDMASK_POS

#define SDP_EN_DP_ENCODER0_P0_FLDMASK_POS   2

Definition at line 522 of file dptx_reg.h.

◆ SDP_PACKET_R_DP_ENCODER1_P0_FLDMASK

#define SDP_PACKET_R_DP_ENCODER1_P0_FLDMASK   0x40

Definition at line 1523 of file dptx_reg.h.

◆ SDP_PACKET_R_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_PACKET_R_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1525 of file dptx_reg.h.

◆ SDP_PACKET_R_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_PACKET_R_DP_ENCODER1_P0_FLDMASK_POS   6

Definition at line 1524 of file dptx_reg.h.

◆ SDP_PACKET_TYPE_DP_ENCODER1_P0_FLDMASK

#define SDP_PACKET_TYPE_DP_ENCODER1_P0_FLDMASK   0x1f

Definition at line 1515 of file dptx_reg.h.

◆ SDP_PACKET_TYPE_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_PACKET_TYPE_DP_ENCODER1_P0_FLDMASK_LEN   5

Definition at line 1517 of file dptx_reg.h.

◆ SDP_PACKET_TYPE_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_PACKET_TYPE_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1516 of file dptx_reg.h.

◆ SDP_PACKET_W_DP_ENCODER1_P0_FLDMASK

#define SDP_PACKET_W_DP_ENCODER1_P0_FLDMASK   0x20

Definition at line 1519 of file dptx_reg.h.

◆ SDP_PACKET_W_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_PACKET_W_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1521 of file dptx_reg.h.

◆ SDP_PACKET_W_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_PACKET_W_DP_ENCODER1_P0_FLDMASK_POS   5

Definition at line 1520 of file dptx_reg.h.

◆ SDP_RESET_SW_DP_ENCODER0_P0_FLDMASK

#define SDP_RESET_SW_DP_ENCODER0_P0_FLDMASK   0x2000

Definition at line 71 of file dptx_reg.h.

◆ SDP_RESET_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define SDP_RESET_SW_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 73 of file dptx_reg.h.

◆ SDP_RESET_SW_DP_ENCODER0_P0_FLDMASK_POS

#define SDP_RESET_SW_DP_ENCODER0_P0_FLDMASK_POS   13

Definition at line 72 of file dptx_reg.h.

◆ SDP_SPLIT_BUG_FIX_DP_ENCODER1_P0_FLDMASK

#define SDP_SPLIT_BUG_FIX_DP_ENCODER1_P0_FLDMASK   0x200

Definition at line 1773 of file dptx_reg.h.

◆ SDP_SPLIT_BUG_FIX_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_SPLIT_BUG_FIX_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1775 of file dptx_reg.h.

◆ SDP_SPLIT_BUG_FIX_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_SPLIT_BUG_FIX_DP_ENCODER1_P0_FLDMASK_POS   9

Definition at line 1774 of file dptx_reg.h.

◆ SDP_SPLIT_EN_DP_ENCODER0_P0_FLDMASK

#define SDP_SPLIT_EN_DP_ENCODER0_P0_FLDMASK   0x400

Definition at line 101 of file dptx_reg.h.

◆ SDP_SPLIT_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define SDP_SPLIT_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 103 of file dptx_reg.h.

◆ SDP_SPLIT_EN_DP_ENCODER0_P0_FLDMASK_POS

#define SDP_SPLIT_EN_DP_ENCODER0_P0_FLDMASK_POS   10

Definition at line 102 of file dptx_reg.h.

◆ SDP_SPLIT_FIFO_EMPTY_DP_ENCODER1_P0_FLDMASK

#define SDP_SPLIT_FIFO_EMPTY_DP_ENCODER1_P0_FLDMASK   0x100

Definition at line 2143 of file dptx_reg.h.

◆ SDP_SPLIT_FIFO_EMPTY_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_SPLIT_FIFO_EMPTY_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2145 of file dptx_reg.h.

◆ SDP_SPLIT_FIFO_EMPTY_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_SPLIT_FIFO_EMPTY_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 2144 of file dptx_reg.h.

◆ SDP_SPLIT_FIFO_FULL_CLR_DP_ENCODER1_P0_FLDMASK

#define SDP_SPLIT_FIFO_FULL_CLR_DP_ENCODER1_P0_FLDMASK   0x400

Definition at line 2151 of file dptx_reg.h.

◆ SDP_SPLIT_FIFO_FULL_CLR_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_SPLIT_FIFO_FULL_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2153 of file dptx_reg.h.

◆ SDP_SPLIT_FIFO_FULL_CLR_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_SPLIT_FIFO_FULL_CLR_DP_ENCODER1_P0_FLDMASK_POS   10

Definition at line 2152 of file dptx_reg.h.

◆ SDP_SPLIT_FIFO_FULL_DP_ENCODER1_P0_FLDMASK

#define SDP_SPLIT_FIFO_FULL_DP_ENCODER1_P0_FLDMASK   0x200

Definition at line 2147 of file dptx_reg.h.

◆ SDP_SPLIT_FIFO_FULL_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_SPLIT_FIFO_FULL_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2149 of file dptx_reg.h.

◆ SDP_SPLIT_FIFO_FULL_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_SPLIT_FIFO_FULL_DP_ENCODER1_P0_FLDMASK_POS   9

Definition at line 2148 of file dptx_reg.h.

◆ SDP_SPLIT_FIFO_READ_START_POINT_DP_ENCODER0_P0_FLDMASK

#define SDP_SPLIT_FIFO_READ_START_POINT_DP_ENCODER0_P0_FLDMASK   0xf000

Definition at line 1142 of file dptx_reg.h.

◆ SDP_SPLIT_FIFO_READ_START_POINT_DP_ENCODER0_P0_FLDMASK_LEN

#define SDP_SPLIT_FIFO_READ_START_POINT_DP_ENCODER0_P0_FLDMASK_LEN   4

Definition at line 1144 of file dptx_reg.h.

◆ SDP_SPLIT_FIFO_READ_START_POINT_DP_ENCODER0_P0_FLDMASK_POS

#define SDP_SPLIT_FIFO_READ_START_POINT_DP_ENCODER0_P0_FLDMASK_POS   12

Definition at line 1143 of file dptx_reg.h.

◆ SDP_SPLIT_FIFO_RST_DP_ENCODER0_P0_FLDMASK

#define SDP_SPLIT_FIFO_RST_DP_ENCODER0_P0_FLDMASK   0x800

Definition at line 105 of file dptx_reg.h.

◆ SDP_SPLIT_FIFO_RST_DP_ENCODER0_P0_FLDMASK_LEN

#define SDP_SPLIT_FIFO_RST_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 107 of file dptx_reg.h.

◆ SDP_SPLIT_FIFO_RST_DP_ENCODER0_P0_FLDMASK_POS

#define SDP_SPLIT_FIFO_RST_DP_ENCODER0_P0_FLDMASK_POS   11

Definition at line 106 of file dptx_reg.h.

◆ SDP_SPLIT_INSERT_INVALID_CNT_THRD_DP_ENCODER1_P0_FLDMASK

#define SDP_SPLIT_INSERT_INVALID_CNT_THRD_DP_ENCODER1_P0_FLDMASK   0xf000

Definition at line 2155 of file dptx_reg.h.

◆ SDP_SPLIT_INSERT_INVALID_CNT_THRD_DP_ENCODER1_P0_FLDMASK_LEN

#define SDP_SPLIT_INSERT_INVALID_CNT_THRD_DP_ENCODER1_P0_FLDMASK_LEN   4

Definition at line 2157 of file dptx_reg.h.

◆ SDP_SPLIT_INSERT_INVALID_CNT_THRD_DP_ENCODER1_P0_FLDMASK_POS

#define SDP_SPLIT_INSERT_INVALID_CNT_THRD_DP_ENCODER1_P0_FLDMASK_POS   12

Definition at line 2156 of file dptx_reg.h.

◆ SDP_VSYNC_RISING_MASK_DP_ENCODER0_P0_FLDMASK

#define SDP_VSYNC_RISING_MASK_DP_ENCODER0_P0_FLDMASK   0x100

Definition at line 337 of file dptx_reg.h.

◆ SDP_VSYNC_RISING_MASK_DP_ENCODER0_P0_FLDMASK_LEN

#define SDP_VSYNC_RISING_MASK_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 339 of file dptx_reg.h.

◆ SDP_VSYNC_RISING_MASK_DP_ENCODER0_P0_FLDMASK_POS

#define SDP_VSYNC_RISING_MASK_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 338 of file dptx_reg.h.

◆ SEC_OFFSET

#define SEC_OFFSET   0x4000

Definition at line 11 of file dptx_reg.h.

◆ SEL_FTMUX_AUX_TX_P0_FLDMASK

#define SEL_FTMUX_AUX_TX_P0_FLDMASK   0x300

Definition at line 4019 of file dptx_reg.h.

◆ SEL_FTMUX_AUX_TX_P0_FLDMASK_LEN

#define SEL_FTMUX_AUX_TX_P0_FLDMASK_LEN   2

Definition at line 4021 of file dptx_reg.h.

◆ SEL_FTMUX_AUX_TX_P0_FLDMASK_POS

#define SEL_FTMUX_AUX_TX_P0_FLDMASK_POS   8

Definition at line 4020 of file dptx_reg.h.

◆ SEL_TCLK_AUX_TX_P0_FLDMASK

#define SEL_TCLK_AUX_TX_P0_FLDMASK   0x3000

Definition at line 3706 of file dptx_reg.h.

◆ SEL_TCLK_AUX_TX_P0_FLDMASK_LEN

#define SEL_TCLK_AUX_TX_P0_FLDMASK_LEN   2

Definition at line 3708 of file dptx_reg.h.

◆ SEL_TCLK_AUX_TX_P0_FLDMASK_POS

#define SEL_TCLK_AUX_TX_P0_FLDMASK_POS   12

Definition at line 3707 of file dptx_reg.h.

◆ SELECT_INTERNAL_AN_DP_TRANS_P0_FLDMASK

#define SELECT_INTERNAL_AN_DP_TRANS_P0_FLDMASK   0x4

Definition at line 2749 of file dptx_reg.h.

◆ SELECT_INTERNAL_AN_DP_TRANS_P0_FLDMASK_LEN

#define SELECT_INTERNAL_AN_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2751 of file dptx_reg.h.

◆ SELECT_INTERNAL_AN_DP_TRANS_P0_FLDMASK_POS

#define SELECT_INTERNAL_AN_DP_TRANS_P0_FLDMASK_POS   2

Definition at line 2750 of file dptx_reg.h.

◆ SOFTWARE_RESET_RESERVED_AUX_TX_P0_FLDMASK

#define SOFTWARE_RESET_RESERVED_AUX_TX_P0_FLDMASK   0x1c

Definition at line 3233 of file dptx_reg.h.

◆ SOFTWARE_RESET_RESERVED_AUX_TX_P0_FLDMASK_LEN

#define SOFTWARE_RESET_RESERVED_AUX_TX_P0_FLDMASK_LEN   3

Definition at line 3235 of file dptx_reg.h.

◆ SOFTWARE_RESET_RESERVED_AUX_TX_P0_FLDMASK_POS

#define SOFTWARE_RESET_RESERVED_AUX_TX_P0_FLDMASK_POS   2

Definition at line 3234 of file dptx_reg.h.

◆ SPD_CFG_DP_ENCODER0_P0_FLDMASK

#define SPD_CFG_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 472 of file dptx_reg.h.

◆ SPD_CFG_DP_ENCODER0_P0_FLDMASK_LEN

#define SPD_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 474 of file dptx_reg.h.

◆ SPD_CFG_DP_ENCODER0_P0_FLDMASK_POS

#define SPD_CFG_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 473 of file dptx_reg.h.

◆ SPD_HB0_DP_ENCODER0_P0_FLDMASK

#define SPD_HB0_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 660 of file dptx_reg.h.

◆ SPD_HB0_DP_ENCODER0_P0_FLDMASK_LEN

#define SPD_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 662 of file dptx_reg.h.

◆ SPD_HB0_DP_ENCODER0_P0_FLDMASK_POS

#define SPD_HB0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 661 of file dptx_reg.h.

◆ SPD_HB1_DP_ENCODER0_P0_FLDMASK

#define SPD_HB1_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 664 of file dptx_reg.h.

◆ SPD_HB1_DP_ENCODER0_P0_FLDMASK_LEN

#define SPD_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 666 of file dptx_reg.h.

◆ SPD_HB1_DP_ENCODER0_P0_FLDMASK_POS

#define SPD_HB1_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 665 of file dptx_reg.h.

◆ SPD_HB2_DP_ENCODER0_P0_FLDMASK

#define SPD_HB2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 669 of file dptx_reg.h.

◆ SPD_HB2_DP_ENCODER0_P0_FLDMASK_LEN

#define SPD_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 671 of file dptx_reg.h.

◆ SPD_HB2_DP_ENCODER0_P0_FLDMASK_POS

#define SPD_HB2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 670 of file dptx_reg.h.

◆ SPD_HB3_DP_ENCODER0_P0_FLDMASK

#define SPD_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 673 of file dptx_reg.h.

◆ SPD_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define SPD_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 675 of file dptx_reg.h.

◆ SPD_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define SPD_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 674 of file dptx_reg.h.

◆ SRAM_START_READ_THRD_DP_ENCODER0_P0_FLDMASK

#define SRAM_START_READ_THRD_DP_ENCODER0_P0_FLDMASK   0x3f

Definition at line 269 of file dptx_reg.h.

◆ SRAM_START_READ_THRD_DP_ENCODER0_P0_FLDMASK_LEN

#define SRAM_START_READ_THRD_DP_ENCODER0_P0_FLDMASK_LEN   6

Definition at line 271 of file dptx_reg.h.

◆ SRAM_START_READ_THRD_DP_ENCODER0_P0_FLDMASK_POS

#define SRAM_START_READ_THRD_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 270 of file dptx_reg.h.

◆ SST_HDCP_TYPE_TX_DP_TRANS_P0_FLDMASK

#define SST_HDCP_TYPE_TX_DP_TRANS_P0_FLDMASK   0xff

Definition at line 2885 of file dptx_reg.h.

◆ SST_HDCP_TYPE_TX_DP_TRANS_P0_FLDMASK_LEN

#define SST_HDCP_TYPE_TX_DP_TRANS_P0_FLDMASK_LEN   8

Definition at line 2887 of file dptx_reg.h.

◆ SST_HDCP_TYPE_TX_DP_TRANS_P0_FLDMASK_POS

#define SST_HDCP_TYPE_TX_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2886 of file dptx_reg.h.

◆ SW_IRQ_CLR_DP_TRANS_P0_FLDMASK

#define SW_IRQ_CLR_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3180 of file dptx_reg.h.

◆ SW_IRQ_CLR_DP_TRANS_P0_FLDMASK_LEN

#define SW_IRQ_CLR_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3182 of file dptx_reg.h.

◆ SW_IRQ_CLR_DP_TRANS_P0_FLDMASK_POS

#define SW_IRQ_CLR_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3181 of file dptx_reg.h.

◆ SW_IRQ_FINAL_STATUS_DP_TRANS_P0_FLDMASK

#define SW_IRQ_FINAL_STATUS_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3190 of file dptx_reg.h.

◆ SW_IRQ_FINAL_STATUS_DP_TRANS_P0_FLDMASK_LEN

#define SW_IRQ_FINAL_STATUS_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3192 of file dptx_reg.h.

◆ SW_IRQ_FINAL_STATUS_DP_TRANS_P0_FLDMASK_POS

#define SW_IRQ_FINAL_STATUS_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3191 of file dptx_reg.h.

◆ SW_IRQ_FORCE_DP_TRANS_P0_FLDMASK

#define SW_IRQ_FORCE_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3200 of file dptx_reg.h.

◆ SW_IRQ_FORCE_DP_TRANS_P0_FLDMASK_LEN

#define SW_IRQ_FORCE_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3202 of file dptx_reg.h.

◆ SW_IRQ_FORCE_DP_TRANS_P0_FLDMASK_POS

#define SW_IRQ_FORCE_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3201 of file dptx_reg.h.

◆ SW_IRQ_MASK_DP_TRANS_P0_FLDMASK

#define SW_IRQ_MASK_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3175 of file dptx_reg.h.

◆ SW_IRQ_MASK_DP_TRANS_P0_FLDMASK_LEN

#define SW_IRQ_MASK_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3177 of file dptx_reg.h.

◆ SW_IRQ_MASK_DP_TRANS_P0_FLDMASK_POS

#define SW_IRQ_MASK_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3176 of file dptx_reg.h.

◆ SW_IRQ_RAW_STATUS_DP_TRANS_P0_FLDMASK

#define SW_IRQ_RAW_STATUS_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3195 of file dptx_reg.h.

◆ SW_IRQ_RAW_STATUS_DP_TRANS_P0_FLDMASK_LEN

#define SW_IRQ_RAW_STATUS_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3197 of file dptx_reg.h.

◆ SW_IRQ_RAW_STATUS_DP_TRANS_P0_FLDMASK_POS

#define SW_IRQ_RAW_STATUS_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3196 of file dptx_reg.h.

◆ SW_IRQ_SRC_DP_TRANS_P0_FLDMASK

#define SW_IRQ_SRC_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3170 of file dptx_reg.h.

◆ SW_IRQ_SRC_DP_TRANS_P0_FLDMASK_LEN

#define SW_IRQ_SRC_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3172 of file dptx_reg.h.

◆ SW_IRQ_SRC_DP_TRANS_P0_FLDMASK_POS

#define SW_IRQ_SRC_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3171 of file dptx_reg.h.

◆ SW_IRQ_STATUS_DP_TRANS_P0_FLDMASK

#define SW_IRQ_STATUS_DP_TRANS_P0_FLDMASK   0xffff

Definition at line 3185 of file dptx_reg.h.

◆ SW_IRQ_STATUS_DP_TRANS_P0_FLDMASK_LEN

#define SW_IRQ_STATUS_DP_TRANS_P0_FLDMASK_LEN   16

Definition at line 3187 of file dptx_reg.h.

◆ SW_IRQ_STATUS_DP_TRANS_P0_FLDMASK_POS

#define SW_IRQ_STATUS_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 3186 of file dptx_reg.h.

◆ SW_PROBE_VALUE_FLDMASK

#define SW_PROBE_VALUE_FLDMASK   0xffffffffL

Definition at line 4250 of file dptx_reg.h.

◆ SW_PROBE_VALUE_FLDMASK_LEN

#define SW_PROBE_VALUE_FLDMASK_LEN   32

Definition at line 4252 of file dptx_reg.h.

◆ SW_PROBE_VALUE_FLDMASK_POS

#define SW_PROBE_VALUE_FLDMASK_POS   0

Definition at line 4251 of file dptx_reg.h.

◆ SW_RST_B_FLDMASK

#define SW_RST_B_FLDMASK   0x1f

Definition at line 4233 of file dptx_reg.h.

◆ SW_RST_B_FLDMASK_LEN

#define SW_RST_B_FLDMASK_LEN   5

Definition at line 4235 of file dptx_reg.h.

◆ SW_RST_B_FLDMASK_POS

#define SW_RST_B_FLDMASK_POS   0

Definition at line 4234 of file dptx_reg.h.

◆ SYMBOL_DATA_PER_TU_SW_0_DP_ENCODER1_P0_FLDMASK

#define SYMBOL_DATA_PER_TU_SW_0_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 1998 of file dptx_reg.h.

◆ SYMBOL_DATA_PER_TU_SW_0_DP_ENCODER1_P0_FLDMASK_LEN

#define SYMBOL_DATA_PER_TU_SW_0_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 2000 of file dptx_reg.h.

◆ SYMBOL_DATA_PER_TU_SW_0_DP_ENCODER1_P0_FLDMASK_POS

#define SYMBOL_DATA_PER_TU_SW_0_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1999 of file dptx_reg.h.

◆ SYMBOL_DATA_PER_TU_SW_1_DP_ENCODER1_P0_FLDMASK

#define SYMBOL_DATA_PER_TU_SW_1_DP_ENCODER1_P0_FLDMASK   0x7fff

Definition at line 2003 of file dptx_reg.h.

◆ SYMBOL_DATA_PER_TU_SW_1_DP_ENCODER1_P0_FLDMASK_LEN

#define SYMBOL_DATA_PER_TU_SW_1_DP_ENCODER1_P0_FLDMASK_LEN   15

Definition at line 2005 of file dptx_reg.h.

◆ SYMBOL_DATA_PER_TU_SW_1_DP_ENCODER1_P0_FLDMASK_POS

#define SYMBOL_DATA_PER_TU_SW_1_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2004 of file dptx_reg.h.

◆ TEST_AUXRX_AUX_TX_P0_FLDMASK

#define TEST_AUXRX_AUX_TX_P0_FLDMASK   0xffff

Definition at line 3982 of file dptx_reg.h.

◆ TEST_AUXRX_AUX_TX_P0_FLDMASK_LEN

#define TEST_AUXRX_AUX_TX_P0_FLDMASK_LEN   16

Definition at line 3984 of file dptx_reg.h.

◆ TEST_AUXRX_AUX_TX_P0_FLDMASK_POS

#define TEST_AUXRX_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3983 of file dptx_reg.h.

◆ TEST_AUXRX_VTH_AUX_TX_P0_FLDMASK

#define TEST_AUXRX_VTH_AUX_TX_P0_FLDMASK   0x7

Definition at line 3715 of file dptx_reg.h.

◆ TEST_AUXRX_VTH_AUX_TX_P0_FLDMASK_LEN

#define TEST_AUXRX_VTH_AUX_TX_P0_FLDMASK_LEN   3

Definition at line 3717 of file dptx_reg.h.

◆ TEST_AUXRX_VTH_AUX_TX_P0_FLDMASK_POS

#define TEST_AUXRX_VTH_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3716 of file dptx_reg.h.

◆ TEST_AUXTX_AUX_TX_P0_FLDMASK

#define TEST_AUXTX_AUX_TX_P0_FLDMASK   0xff00

Definition at line 3647 of file dptx_reg.h.

◆ TEST_AUXTX_AUX_TX_P0_FLDMASK_LEN

#define TEST_AUXTX_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3649 of file dptx_reg.h.

◆ TEST_AUXTX_AUX_TX_P0_FLDMASK_POS

#define TEST_AUXTX_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3648 of file dptx_reg.h.

◆ TEST_CONFIG_HDCP13_DP_TRANS_P0_FLDMASK

#define TEST_CONFIG_HDCP13_DP_TRANS_P0_FLDMASK   0xff00

Definition at line 2827 of file dptx_reg.h.

◆ TEST_CONFIG_HDCP13_DP_TRANS_P0_FLDMASK_LEN

#define TEST_CONFIG_HDCP13_DP_TRANS_P0_FLDMASK_LEN   8

Definition at line 2829 of file dptx_reg.h.

◆ TEST_CONFIG_HDCP13_DP_TRANS_P0_FLDMASK_POS

#define TEST_CONFIG_HDCP13_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 2828 of file dptx_reg.h.

◆ TEST_CONFIG_HDCP22_DP_TRANS_P0_FLDMASK

#define TEST_CONFIG_HDCP22_DP_TRANS_P0_FLDMASK   0xf00

Definition at line 2806 of file dptx_reg.h.

◆ TEST_CONFIG_HDCP22_DP_TRANS_P0_FLDMASK_LEN

#define TEST_CONFIG_HDCP22_DP_TRANS_P0_FLDMASK_LEN   4

Definition at line 2808 of file dptx_reg.h.

◆ TEST_CONFIG_HDCP22_DP_TRANS_P0_FLDMASK_POS

#define TEST_CONFIG_HDCP22_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 2807 of file dptx_reg.h.

◆ TEST_CRC_B_CB_DP_ENCODER1_P0_FLDMASK

#define TEST_CRC_B_CB_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 2074 of file dptx_reg.h.

◆ TEST_CRC_B_CB_DP_ENCODER1_P0_FLDMASK_LEN

#define TEST_CRC_B_CB_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 2076 of file dptx_reg.h.

◆ TEST_CRC_B_CB_DP_ENCODER1_P0_FLDMASK_POS

#define TEST_CRC_B_CB_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2075 of file dptx_reg.h.

◆ TEST_CRC_G_Y_DP_ENCODER1_P0_FLDMASK

#define TEST_CRC_G_Y_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 2069 of file dptx_reg.h.

◆ TEST_CRC_G_Y_DP_ENCODER1_P0_FLDMASK_LEN

#define TEST_CRC_G_Y_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 2071 of file dptx_reg.h.

◆ TEST_CRC_G_Y_DP_ENCODER1_P0_FLDMASK_POS

#define TEST_CRC_G_Y_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2070 of file dptx_reg.h.

◆ TEST_CRC_R_CR_DP_ENCODER1_P0_FLDMASK

#define TEST_CRC_R_CR_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 2064 of file dptx_reg.h.

◆ TEST_CRC_R_CR_DP_ENCODER1_P0_FLDMASK_LEN

#define TEST_CRC_R_CR_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 2066 of file dptx_reg.h.

◆ TEST_CRC_R_CR_DP_ENCODER1_P0_FLDMASK_POS

#define TEST_CRC_R_CR_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2065 of file dptx_reg.h.

◆ TEST_CRC_WRAP_CNT_DP_ENCODER1_P0_FLDMASK

#define TEST_CRC_WRAP_CNT_DP_ENCODER1_P0_FLDMASK   0xf

Definition at line 2079 of file dptx_reg.h.

◆ TEST_CRC_WRAP_CNT_DP_ENCODER1_P0_FLDMASK_LEN

#define TEST_CRC_WRAP_CNT_DP_ENCODER1_P0_FLDMASK_LEN   4

Definition at line 2081 of file dptx_reg.h.

◆ TEST_CRC_WRAP_CNT_DP_ENCODER1_P0_FLDMASK_POS

#define TEST_CRC_WRAP_CNT_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2080 of file dptx_reg.h.

◆ TEST_IO_LOOPBK_AUX_TX_P0_FLDMASK

#define TEST_IO_LOOPBK_AUX_TX_P0_FLDMASK   0x1f

Definition at line 3698 of file dptx_reg.h.

◆ TEST_IO_LOOPBK_AUX_TX_P0_FLDMASK_LEN

#define TEST_IO_LOOPBK_AUX_TX_P0_FLDMASK_LEN   5

Definition at line 3700 of file dptx_reg.h.

◆ TEST_IO_LOOPBK_AUX_TX_P0_FLDMASK_POS

#define TEST_IO_LOOPBK_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3699 of file dptx_reg.h.

◆ TESTEN_ASIO_AUX_TX_P0_FLDMASK

#define TESTEN_ASIO_AUX_TX_P0_FLDMASK   0x4000

Definition at line 3710 of file dptx_reg.h.

◆ TESTEN_ASIO_AUX_TX_P0_FLDMASK_LEN

#define TESTEN_ASIO_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3712 of file dptx_reg.h.

◆ TESTEN_ASIO_AUX_TX_P0_FLDMASK_POS

#define TESTEN_ASIO_AUX_TX_P0_FLDMASK_POS   14

Definition at line 3711 of file dptx_reg.h.

◆ TOP_OFFSET

#define TOP_OFFSET   0x2000

Definition at line 6 of file dptx_reg.h.

◆ TOP_RESET_SW_DP_TRANS_P0_FLDMASK

#define TOP_RESET_SW_DP_TRANS_P0_FLDMASK   0x100

Definition at line 2388 of file dptx_reg.h.

◆ TOP_RESET_SW_DP_TRANS_P0_FLDMASK_LEN

#define TOP_RESET_SW_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2390 of file dptx_reg.h.

◆ TOP_RESET_SW_DP_TRANS_P0_FLDMASK_POS

#define TOP_RESET_SW_DP_TRANS_P0_FLDMASK_POS   8

Definition at line 2389 of file dptx_reg.h.

◆ TPS_DISPARITY_RESET_DP_TRANS_P0_FLDMASK

#define TPS_DISPARITY_RESET_DP_TRANS_P0_FLDMASK   0x80

Definition at line 2350 of file dptx_reg.h.

◆ TPS_DISPARITY_RESET_DP_TRANS_P0_FLDMASK_LEN

#define TPS_DISPARITY_RESET_DP_TRANS_P0_FLDMASK_LEN   1

Definition at line 2352 of file dptx_reg.h.

◆ TPS_DISPARITY_RESET_DP_TRANS_P0_FLDMASK_POS

#define TPS_DISPARITY_RESET_DP_TRANS_P0_FLDMASK_POS   7

Definition at line 2351 of file dptx_reg.h.

◆ TRANS_OFFSET

#define TRANS_OFFSET   0x3400

Definition at line 9 of file dptx_reg.h.

◆ TST_AUXRX_AUX_TX_P0_FLDMASK

#define TST_AUXRX_AUX_TX_P0_FLDMASK   0xff

Definition at line 3510 of file dptx_reg.h.

◆ TST_AUXRX_AUX_TX_P0_FLDMASK_LEN

#define TST_AUXRX_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3512 of file dptx_reg.h.

◆ TST_AUXRX_AUX_TX_P0_FLDMASK_POS

#define TST_AUXRX_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3511 of file dptx_reg.h.

◆ TU_CALC_SW_DP_ENCODER1_P0_FLDMASK

#define TU_CALC_SW_DP_ENCODER1_P0_FLDMASK   0x80

Definition at line 1993 of file dptx_reg.h.

◆ TU_CALC_SW_DP_ENCODER1_P0_FLDMASK_LEN

#define TU_CALC_SW_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1995 of file dptx_reg.h.

◆ TU_CALC_SW_DP_ENCODER1_P0_FLDMASK_POS

#define TU_CALC_SW_DP_ENCODER1_P0_FLDMASK_POS   7

Definition at line 1994 of file dptx_reg.h.

◆ TU_SIZE_DP_ENCODER1_P0_FLDMASK

#define TU_SIZE_DP_ENCODER1_P0_FLDMASK   0x7f

Definition at line 1989 of file dptx_reg.h.

◆ TU_SIZE_DP_ENCODER1_P0_FLDMASK_LEN

#define TU_SIZE_DP_ENCODER1_P0_FLDMASK_LEN   7

Definition at line 1991 of file dptx_reg.h.

◆ TU_SIZE_DP_ENCODER1_P0_FLDMASK_POS

#define TU_SIZE_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1990 of file dptx_reg.h.

◆ TX_FIFO_DONE_AUX_TX_P0_FLDMASK

#define TX_FIFO_DONE_AUX_TX_P0_FLDMASK   0x4

Definition at line 3728 of file dptx_reg.h.

◆ TX_FIFO_DONE_AUX_TX_P0_FLDMASK_LEN

#define TX_FIFO_DONE_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3730 of file dptx_reg.h.

◆ TX_FIFO_DONE_AUX_TX_P0_FLDMASK_POS

#define TX_FIFO_DONE_AUX_TX_P0_FLDMASK_POS   2

Definition at line 3729 of file dptx_reg.h.

◆ TX_FIFO_DONE_CLR_AUX_TX_P0_FLDMASK

#define TX_FIFO_DONE_CLR_AUX_TX_P0_FLDMASK   0x8

Definition at line 3732 of file dptx_reg.h.

◆ TX_FIFO_DONE_CLR_AUX_TX_P0_FLDMASK_LEN

#define TX_FIFO_DONE_CLR_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3734 of file dptx_reg.h.

◆ TX_FIFO_DONE_CLR_AUX_TX_P0_FLDMASK_POS

#define TX_FIFO_DONE_CLR_AUX_TX_P0_FLDMASK_POS   3

Definition at line 3733 of file dptx_reg.h.

◆ TX_GTC_FREQ_LOCK_DONE_AUX_TX_P0_FLDMASK

#define TX_GTC_FREQ_LOCK_DONE_AUX_TX_P0_FLDMASK   0x2

Definition at line 3788 of file dptx_reg.h.

◆ TX_GTC_FREQ_LOCK_DONE_AUX_TX_P0_FLDMASK_LEN

#define TX_GTC_FREQ_LOCK_DONE_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3790 of file dptx_reg.h.

◆ TX_GTC_FREQ_LOCK_DONE_AUX_TX_P0_FLDMASK_POS

#define TX_GTC_FREQ_LOCK_DONE_AUX_TX_P0_FLDMASK_POS   1

Definition at line 3789 of file dptx_reg.h.

◆ TX_GTC_PHASE_SKEW_OFFSET_AUX_TX_P0_FLDMASK

#define TX_GTC_PHASE_SKEW_OFFSET_AUX_TX_P0_FLDMASK   0xffff

Definition at line 3797 of file dptx_reg.h.

◆ TX_GTC_PHASE_SKEW_OFFSET_AUX_TX_P0_FLDMASK_LEN

#define TX_GTC_PHASE_SKEW_OFFSET_AUX_TX_P0_FLDMASK_LEN   16

Definition at line 3799 of file dptx_reg.h.

◆ TX_GTC_PHASE_SKEW_OFFSET_AUX_TX_P0_FLDMASK_POS

#define TX_GTC_PHASE_SKEW_OFFSET_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3798 of file dptx_reg.h.

◆ TX_GTC_VALUE_0_AUX_TX_P0_FLDMASK

#define TX_GTC_VALUE_0_AUX_TX_P0_FLDMASK   0xffff

Definition at line 3774 of file dptx_reg.h.

◆ TX_GTC_VALUE_0_AUX_TX_P0_FLDMASK_LEN

#define TX_GTC_VALUE_0_AUX_TX_P0_FLDMASK_LEN   16

Definition at line 3776 of file dptx_reg.h.

◆ TX_GTC_VALUE_0_AUX_TX_P0_FLDMASK_POS

#define TX_GTC_VALUE_0_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3775 of file dptx_reg.h.

◆ TX_GTC_VALUE_1_AUX_TX_P0_FLDMASK

#define TX_GTC_VALUE_1_AUX_TX_P0_FLDMASK   0xffff

Definition at line 3779 of file dptx_reg.h.

◆ TX_GTC_VALUE_1_AUX_TX_P0_FLDMASK_LEN

#define TX_GTC_VALUE_1_AUX_TX_P0_FLDMASK_LEN   16

Definition at line 3781 of file dptx_reg.h.

◆ TX_GTC_VALUE_1_AUX_TX_P0_FLDMASK_POS

#define TX_GTC_VALUE_1_AUX_TX_P0_FLDMASK_POS   0

Definition at line 3780 of file dptx_reg.h.

◆ TX_GTC_VALUE_PHASE_ADJUST_EN_AUX_TX_P0_FLDMASK

#define TX_GTC_VALUE_PHASE_ADJUST_EN_AUX_TX_P0_FLDMASK   0x4

Definition at line 3792 of file dptx_reg.h.

◆ TX_GTC_VALUE_PHASE_ADJUST_EN_AUX_TX_P0_FLDMASK_LEN

#define TX_GTC_VALUE_PHASE_ADJUST_EN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3794 of file dptx_reg.h.

◆ TX_GTC_VALUE_PHASE_ADJUST_EN_AUX_TX_P0_FLDMASK_POS

#define TX_GTC_VALUE_PHASE_ADJUST_EN_AUX_TX_P0_FLDMASK_POS   2

Definition at line 3793 of file dptx_reg.h.

◆ TX_GTC_VALUE_PHASE_SKEW_EN_AUX_TX_P0_FLDMASK

#define TX_GTC_VALUE_PHASE_SKEW_EN_AUX_TX_P0_FLDMASK   0x2

Definition at line 3760 of file dptx_reg.h.

◆ TX_GTC_VALUE_PHASE_SKEW_EN_AUX_TX_P0_FLDMASK_LEN

#define TX_GTC_VALUE_PHASE_SKEW_EN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3762 of file dptx_reg.h.

◆ TX_GTC_VALUE_PHASE_SKEW_EN_AUX_TX_P0_FLDMASK_POS

#define TX_GTC_VALUE_PHASE_SKEW_EN_AUX_TX_P0_FLDMASK_POS   1

Definition at line 3761 of file dptx_reg.h.

◆ TX_HDCP22_TYPE_DP_TRANS_P0_FLDMASK

#define TX_HDCP22_TYPE_DP_TRANS_P0_FLDMASK   0xff

Definition at line 2832 of file dptx_reg.h.

◆ TX_HDCP22_TYPE_DP_TRANS_P0_FLDMASK_LEN

#define TX_HDCP22_TYPE_DP_TRANS_P0_FLDMASK_LEN   8

Definition at line 2834 of file dptx_reg.h.

◆ TX_HDCP22_TYPE_DP_TRANS_P0_FLDMASK_POS

#define TX_HDCP22_TYPE_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2833 of file dptx_reg.h.

◆ TX_SLAVE_CHK_RX_LCK_EN_AUX_TX_P0_FLDMASK

#define TX_SLAVE_CHK_RX_LCK_EN_AUX_TX_P0_FLDMASK   0x8

Definition at line 3861 of file dptx_reg.h.

◆ TX_SLAVE_CHK_RX_LCK_EN_AUX_TX_P0_FLDMASK_LEN

#define TX_SLAVE_CHK_RX_LCK_EN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3863 of file dptx_reg.h.

◆ TX_SLAVE_CHK_RX_LCK_EN_AUX_TX_P0_FLDMASK_POS

#define TX_SLAVE_CHK_RX_LCK_EN_AUX_TX_P0_FLDMASK_POS   3

Definition at line 3862 of file dptx_reg.h.

◆ TX_SLAVE_WAIT_SKEW_EN_AUX_TX_P0_FLDMASK

#define TX_SLAVE_WAIT_SKEW_EN_AUX_TX_P0_FLDMASK   0x2

Definition at line 3828 of file dptx_reg.h.

◆ TX_SLAVE_WAIT_SKEW_EN_AUX_TX_P0_FLDMASK_LEN

#define TX_SLAVE_WAIT_SKEW_EN_AUX_TX_P0_FLDMASK_LEN   1

Definition at line 3830 of file dptx_reg.h.

◆ TX_SLAVE_WAIT_SKEW_EN_AUX_TX_P0_FLDMASK_POS

#define TX_SLAVE_WAIT_SKEW_EN_AUX_TX_P0_FLDMASK_POS   1

Definition at line 3829 of file dptx_reg.h.

◆ TX_VBID_SW_DP_ENCODER0_P0_FLDMASK

#define TX_VBID_SW_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 240 of file dptx_reg.h.

◆ TX_VBID_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define TX_VBID_SW_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 242 of file dptx_reg.h.

◆ TX_VBID_SW_DP_ENCODER0_P0_FLDMASK_POS

#define TX_VBID_SW_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 241 of file dptx_reg.h.

◆ TX_VBID_SW_EN_DP_ENCODER0_P0_FLDMASK

#define TX_VBID_SW_EN_DP_ENCODER0_P0_FLDMASK   0x400

Definition at line 206 of file dptx_reg.h.

◆ TX_VBID_SW_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define TX_VBID_SW_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 208 of file dptx_reg.h.

◆ TX_VBID_SW_EN_DP_ENCODER0_P0_FLDMASK_POS

#define TX_VBID_SW_EN_DP_ENCODER0_P0_FLDMASK_POS   10

Definition at line 207 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_0_FLDMASK

#define USE_DEFAULT_DELSEL_0_FLDMASK   0x100000

Definition at line 4300 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_0_FLDMASK_LEN

#define USE_DEFAULT_DELSEL_0_FLDMASK_LEN   1

Definition at line 4302 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_0_FLDMASK_POS

#define USE_DEFAULT_DELSEL_0_FLDMASK_POS   20

Definition at line 4301 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_10_FLDMASK

#define USE_DEFAULT_DELSEL_10_FLDMASK   0x100000

Definition at line 4390 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_10_FLDMASK_LEN

#define USE_DEFAULT_DELSEL_10_FLDMASK_LEN   1

Definition at line 4392 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_10_FLDMASK_POS

#define USE_DEFAULT_DELSEL_10_FLDMASK_POS   20

Definition at line 4391 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_11_FLDMASK

#define USE_DEFAULT_DELSEL_11_FLDMASK   0x100000

Definition at line 4399 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_11_FLDMASK_LEN

#define USE_DEFAULT_DELSEL_11_FLDMASK_LEN   1

Definition at line 4401 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_11_FLDMASK_POS

#define USE_DEFAULT_DELSEL_11_FLDMASK_POS   20

Definition at line 4400 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_12_FLDMASK

#define USE_DEFAULT_DELSEL_12_FLDMASK   0x100000

Definition at line 4408 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_12_FLDMASK_LEN

#define USE_DEFAULT_DELSEL_12_FLDMASK_LEN   1

Definition at line 4410 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_12_FLDMASK_POS

#define USE_DEFAULT_DELSEL_12_FLDMASK_POS   20

Definition at line 4409 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_1_FLDMASK

#define USE_DEFAULT_DELSEL_1_FLDMASK   0x100000

Definition at line 4309 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_1_FLDMASK_LEN

#define USE_DEFAULT_DELSEL_1_FLDMASK_LEN   1

Definition at line 4311 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_1_FLDMASK_POS

#define USE_DEFAULT_DELSEL_1_FLDMASK_POS   20

Definition at line 4310 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_2_FLDMASK

#define USE_DEFAULT_DELSEL_2_FLDMASK   0x100000

Definition at line 4318 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_2_FLDMASK_LEN

#define USE_DEFAULT_DELSEL_2_FLDMASK_LEN   1

Definition at line 4320 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_2_FLDMASK_POS

#define USE_DEFAULT_DELSEL_2_FLDMASK_POS   20

Definition at line 4319 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_3_FLDMASK

#define USE_DEFAULT_DELSEL_3_FLDMASK   0x100000

Definition at line 4327 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_3_FLDMASK_LEN

#define USE_DEFAULT_DELSEL_3_FLDMASK_LEN   1

Definition at line 4329 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_3_FLDMASK_POS

#define USE_DEFAULT_DELSEL_3_FLDMASK_POS   20

Definition at line 4328 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_4_FLDMASK

#define USE_DEFAULT_DELSEL_4_FLDMASK   0x100000

Definition at line 4336 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_4_FLDMASK_LEN

#define USE_DEFAULT_DELSEL_4_FLDMASK_LEN   1

Definition at line 4338 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_4_FLDMASK_POS

#define USE_DEFAULT_DELSEL_4_FLDMASK_POS   20

Definition at line 4337 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_5_FLDMASK

#define USE_DEFAULT_DELSEL_5_FLDMASK   0x100000

Definition at line 4345 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_5_FLDMASK_LEN

#define USE_DEFAULT_DELSEL_5_FLDMASK_LEN   1

Definition at line 4347 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_5_FLDMASK_POS

#define USE_DEFAULT_DELSEL_5_FLDMASK_POS   20

Definition at line 4346 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_6_FLDMASK

#define USE_DEFAULT_DELSEL_6_FLDMASK   0x100000

Definition at line 4354 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_6_FLDMASK_LEN

#define USE_DEFAULT_DELSEL_6_FLDMASK_LEN   1

Definition at line 4356 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_6_FLDMASK_POS

#define USE_DEFAULT_DELSEL_6_FLDMASK_POS   20

Definition at line 4355 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_7_FLDMASK

#define USE_DEFAULT_DELSEL_7_FLDMASK   0x100000

Definition at line 4363 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_7_FLDMASK_LEN

#define USE_DEFAULT_DELSEL_7_FLDMASK_LEN   1

Definition at line 4365 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_7_FLDMASK_POS

#define USE_DEFAULT_DELSEL_7_FLDMASK_POS   20

Definition at line 4364 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_8_FLDMASK

#define USE_DEFAULT_DELSEL_8_FLDMASK   0x100000

Definition at line 4372 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_8_FLDMASK_LEN

#define USE_DEFAULT_DELSEL_8_FLDMASK_LEN   1

Definition at line 4374 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_8_FLDMASK_POS

#define USE_DEFAULT_DELSEL_8_FLDMASK_POS   20

Definition at line 4373 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_9_FLDMASK

#define USE_DEFAULT_DELSEL_9_FLDMASK   0x100000

Definition at line 4381 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_9_FLDMASK_LEN

#define USE_DEFAULT_DELSEL_9_FLDMASK_LEN   1

Definition at line 4383 of file dptx_reg.h.

◆ USE_DEFAULT_DELSEL_9_FLDMASK_POS

#define USE_DEFAULT_DELSEL_9_FLDMASK_POS   20

Definition at line 4382 of file dptx_reg.h.

◆ USER_DATA_0_DP_ENCODER0_P0_FLDMASK

#define USER_DATA_0_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 436 of file dptx_reg.h.

◆ USER_DATA_0_DP_ENCODER0_P0_FLDMASK_LEN

#define USER_DATA_0_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 438 of file dptx_reg.h.

◆ USER_DATA_0_DP_ENCODER0_P0_FLDMASK_POS

#define USER_DATA_0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 437 of file dptx_reg.h.

◆ USER_DATA_1_DP_ENCODER0_P0_FLDMASK

#define USER_DATA_1_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 441 of file dptx_reg.h.

◆ USER_DATA_1_DP_ENCODER0_P0_FLDMASK_LEN

#define USER_DATA_1_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 443 of file dptx_reg.h.

◆ USER_DATA_1_DP_ENCODER0_P0_FLDMASK_POS

#define USER_DATA_1_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 442 of file dptx_reg.h.

◆ USER_DATA_2_DP_ENCODER0_P0_FLDMASK

#define USER_DATA_2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 446 of file dptx_reg.h.

◆ USER_DATA_2_DP_ENCODER0_P0_FLDMASK_LEN

#define USER_DATA_2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 448 of file dptx_reg.h.

◆ USER_DATA_2_DP_ENCODER0_P0_FLDMASK_POS

#define USER_DATA_2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 447 of file dptx_reg.h.

◆ V3D_EN_SW_DP_ENCODER0_P0_FLDMASK

#define V3D_EN_SW_DP_ENCODER0_P0_FLDMASK   0x4000

Definition at line 260 of file dptx_reg.h.

◆ V3D_EN_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define V3D_EN_SW_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 262 of file dptx_reg.h.

◆ V3D_EN_SW_DP_ENCODER0_P0_FLDMASK_POS

#define V3D_EN_SW_DP_ENCODER0_P0_FLDMASK_POS   14

Definition at line 261 of file dptx_reg.h.

◆ V3D_LR_HW_SWAP_DP_ENCODER0_P0_FLDMASK

#define V3D_LR_HW_SWAP_DP_ENCODER0_P0_FLDMASK   0x8000

Definition at line 264 of file dptx_reg.h.

◆ V3D_LR_HW_SWAP_DP_ENCODER0_P0_FLDMASK_LEN

#define V3D_LR_HW_SWAP_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 266 of file dptx_reg.h.

◆ V3D_LR_HW_SWAP_DP_ENCODER0_P0_FLDMASK_POS

#define V3D_LR_HW_SWAP_DP_ENCODER0_P0_FLDMASK_POS   15

Definition at line 265 of file dptx_reg.h.

◆ VBID_AUDIO_MUTE_FLAG_SEL_DP_ENCODER0_P0_FLDMASK

#define VBID_AUDIO_MUTE_FLAG_SEL_DP_ENCODER0_P0_FLDMASK   0x1000

Definition at line 214 of file dptx_reg.h.

◆ VBID_AUDIO_MUTE_FLAG_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define VBID_AUDIO_MUTE_FLAG_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 216 of file dptx_reg.h.

◆ VBID_AUDIO_MUTE_FLAG_SW_DP_ENCODER0_P0_FLDMASK

#define VBID_AUDIO_MUTE_FLAG_SW_DP_ENCODER0_P0_FLDMASK   0x800

Definition at line 210 of file dptx_reg.h.

◆ VBID_AUDIO_MUTE_FLAG_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define VBID_AUDIO_MUTE_FLAG_SW_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 212 of file dptx_reg.h.

◆ VBID_AUDIO_MUTE_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define VBID_AUDIO_MUTE_SEL_DP_ENCODER0_P0_FLDMASK_POS   12

Definition at line 215 of file dptx_reg.h.

◆ VBID_AUDIO_MUTE_SW_DP_ENCODER0_P0_FLDMASK_POS

#define VBID_AUDIO_MUTE_SW_DP_ENCODER0_P0_FLDMASK_POS   11

Definition at line 211 of file dptx_reg.h.

◆ VBID_INTERLACE_FLAG_SEL_DP_ENCODER0_P0_FLDMASK

#define VBID_INTERLACE_FLAG_SEL_DP_ENCODER0_P0_FLDMASK   0x4000

Definition at line 222 of file dptx_reg.h.

◆ VBID_INTERLACE_FLAG_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define VBID_INTERLACE_FLAG_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 224 of file dptx_reg.h.

◆ VBID_INTERLACE_FLAG_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define VBID_INTERLACE_FLAG_SEL_DP_ENCODER0_P0_FLDMASK_POS   14

Definition at line 223 of file dptx_reg.h.

◆ VBID_INTERLACE_FLAG_SW_DP_ENCODER0_P0_FLDMASK

#define VBID_INTERLACE_FLAG_SW_DP_ENCODER0_P0_FLDMASK   0x2000

Definition at line 218 of file dptx_reg.h.

◆ VBID_INTERLACE_FLAG_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define VBID_INTERLACE_FLAG_SW_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 220 of file dptx_reg.h.

◆ VBID_INTERLACE_FLAG_SW_DP_ENCODER0_P0_FLDMASK_POS

#define VBID_INTERLACE_FLAG_SW_DP_ENCODER0_P0_FLDMASK_POS   13

Definition at line 219 of file dptx_reg.h.

◆ VBID_VIDEO_MUTE_DP_ENCODER0_P0_FLDMASK

#define VBID_VIDEO_MUTE_DP_ENCODER0_P0_FLDMASK   0x4

Definition at line 321 of file dptx_reg.h.

◆ VBID_VIDEO_MUTE_DP_ENCODER0_P0_FLDMASK_LEN

#define VBID_VIDEO_MUTE_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 323 of file dptx_reg.h.

◆ VBID_VIDEO_MUTE_DP_ENCODER0_P0_FLDMASK_POS

#define VBID_VIDEO_MUTE_DP_ENCODER0_P0_FLDMASK_POS   2

Definition at line 322 of file dptx_reg.h.

◆ VBID_VIDEO_MUTE_IDLE_PATTERN_SYNC_EN_DP_ENCODER0_P0_FLDMASK

#define VBID_VIDEO_MUTE_IDLE_PATTERN_SYNC_EN_DP_ENCODER0_P0_FLDMASK   0x8

Definition at line 325 of file dptx_reg.h.

◆ VBID_VIDEO_MUTE_IDLE_PATTERN_SYNC_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define VBID_VIDEO_MUTE_IDLE_PATTERN_SYNC_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 327 of file dptx_reg.h.

◆ VBID_VIDEO_MUTE_IDLE_PATTERN_SYNC_EN_DP_ENCODER0_P0_FLDMASK_POS

#define VBID_VIDEO_MUTE_IDLE_PATTERN_SYNC_EN_DP_ENCODER0_P0_FLDMASK_POS   3

Definition at line 326 of file dptx_reg.h.

◆ VDE_DETECT_DP_ENCODER1_P0_FLDMASK

#define VDE_DETECT_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 1872 of file dptx_reg.h.

◆ VDE_DETECT_DP_ENCODER1_P0_FLDMASK_LEN

#define VDE_DETECT_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 1874 of file dptx_reg.h.

◆ VDE_DETECT_DP_ENCODER1_P0_FLDMASK_POS

#define VDE_DETECT_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1873 of file dptx_reg.h.

◆ VHEIGHT_SEL_DP_ENCODER0_P0_FLDMASK

#define VHEIGHT_SEL_DP_ENCODER0_P0_FLDMASK   0x20

Definition at line 186 of file dptx_reg.h.

◆ VHEIGHT_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define VHEIGHT_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 188 of file dptx_reg.h.

◆ VHEIGHT_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define VHEIGHT_SEL_DP_ENCODER0_P0_FLDMASK_POS   5

Definition at line 187 of file dptx_reg.h.

◆ VHEIGHT_SW_DP_ENCODER0_P0_FLDMASK

#define VHEIGHT_SW_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 143 of file dptx_reg.h.

◆ VHEIGHT_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define VHEIGHT_SW_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 145 of file dptx_reg.h.

◆ VHEIGHT_SW_DP_ENCODER0_P0_FLDMASK_POS

#define VHEIGHT_SW_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 144 of file dptx_reg.h.

◆ VIDEO_AFIFO_RDY_SEL_DP_ENCODER1_P0_FLDMASK

#define VIDEO_AFIFO_RDY_SEL_DP_ENCODER1_P0_FLDMASK   0x300

Definition at line 1802 of file dptx_reg.h.

◆ VIDEO_AFIFO_RDY_SEL_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_AFIFO_RDY_SEL_DP_ENCODER1_P0_FLDMASK_LEN   2

Definition at line 1804 of file dptx_reg.h.

◆ VIDEO_AFIFO_RDY_SEL_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_AFIFO_RDY_SEL_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1803 of file dptx_reg.h.

◆ VIDEO_ARBITER_DE_LAST_NUM0_SW_DP_ENCODER0_P0_FLDMASK

#define VIDEO_ARBITER_DE_LAST_NUM0_SW_DP_ENCODER0_P0_FLDMASK   0x3

Definition at line 1190 of file dptx_reg.h.

◆ VIDEO_ARBITER_DE_LAST_NUM0_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_ARBITER_DE_LAST_NUM0_SW_DP_ENCODER0_P0_FLDMASK_LEN   2

Definition at line 1192 of file dptx_reg.h.

◆ VIDEO_ARBITER_DE_LAST_NUM0_SW_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_ARBITER_DE_LAST_NUM0_SW_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 1191 of file dptx_reg.h.

◆ VIDEO_ARBITER_DE_LAST_NUM1_SW_DP_ENCODER0_P0_FLDMASK

#define VIDEO_ARBITER_DE_LAST_NUM1_SW_DP_ENCODER0_P0_FLDMASK   0xc

Definition at line 1194 of file dptx_reg.h.

◆ VIDEO_ARBITER_DE_LAST_NUM1_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_ARBITER_DE_LAST_NUM1_SW_DP_ENCODER0_P0_FLDMASK_LEN   2

Definition at line 1196 of file dptx_reg.h.

◆ VIDEO_ARBITER_DE_LAST_NUM1_SW_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_ARBITER_DE_LAST_NUM1_SW_DP_ENCODER0_P0_FLDMASK_POS   2

Definition at line 1195 of file dptx_reg.h.

◆ VIDEO_ARBITER_DE_LAST_NUM2_SW_DP_ENCODER0_P0_FLDMASK

#define VIDEO_ARBITER_DE_LAST_NUM2_SW_DP_ENCODER0_P0_FLDMASK   0x30

Definition at line 1198 of file dptx_reg.h.

◆ VIDEO_ARBITER_DE_LAST_NUM2_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_ARBITER_DE_LAST_NUM2_SW_DP_ENCODER0_P0_FLDMASK_LEN   2

Definition at line 1200 of file dptx_reg.h.

◆ VIDEO_ARBITER_DE_LAST_NUM2_SW_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_ARBITER_DE_LAST_NUM2_SW_DP_ENCODER0_P0_FLDMASK_POS   4

Definition at line 1199 of file dptx_reg.h.

◆ VIDEO_ARBITER_DE_LAST_NUM3_SW_DP_ENCODER0_P0_FLDMASK

#define VIDEO_ARBITER_DE_LAST_NUM3_SW_DP_ENCODER0_P0_FLDMASK   0xc0

Definition at line 1202 of file dptx_reg.h.

◆ VIDEO_ARBITER_DE_LAST_NUM3_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_ARBITER_DE_LAST_NUM3_SW_DP_ENCODER0_P0_FLDMASK_LEN   2

Definition at line 1204 of file dptx_reg.h.

◆ VIDEO_ARBITER_DE_LAST_NUM3_SW_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_ARBITER_DE_LAST_NUM3_SW_DP_ENCODER0_P0_FLDMASK_POS   6

Definition at line 1203 of file dptx_reg.h.

◆ VIDEO_COLOR_DEPTH_DP_ENCODER0_P0_FLDMASK

#define VIDEO_COLOR_DEPTH_DP_ENCODER0_P0_FLDMASK   0x700

Definition at line 273 of file dptx_reg.h.

◆ VIDEO_COLOR_DEPTH_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_COLOR_DEPTH_DP_ENCODER0_P0_FLDMASK_LEN   3

Definition at line 275 of file dptx_reg.h.

◆ VIDEO_COLOR_DEPTH_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_COLOR_DEPTH_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 274 of file dptx_reg.h.

◆ VIDEO_DATA_SWAP_DP_ENCODER0_P0_FLDMASK

#define VIDEO_DATA_SWAP_DP_ENCODER0_P0_FLDMASK   0x700

Definition at line 244 of file dptx_reg.h.

◆ VIDEO_DATA_SWAP_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_DATA_SWAP_DP_ENCODER0_P0_FLDMASK_LEN   3

Definition at line 246 of file dptx_reg.h.

◆ VIDEO_DATA_SWAP_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_DATA_SWAP_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 245 of file dptx_reg.h.

◆ VIDEO_M_CODE_FROM_DPRX_DP_ENCODER0_P0_FLDMASK

#define VIDEO_M_CODE_FROM_DPRX_DP_ENCODER0_P0_FLDMASK   0x1

Definition at line 1147 of file dptx_reg.h.

◆ VIDEO_M_CODE_FROM_DPRX_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_M_CODE_FROM_DPRX_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1149 of file dptx_reg.h.

◆ VIDEO_M_CODE_FROM_DPRX_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_M_CODE_FROM_DPRX_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 1148 of file dptx_reg.h.

◆ VIDEO_M_CODE_MULT_DIV_SEL_DP_ENCODER0_P0_FLDMASK

#define VIDEO_M_CODE_MULT_DIV_SEL_DP_ENCODER0_P0_FLDMASK   0x7000

Definition at line 109 of file dptx_reg.h.

◆ VIDEO_M_CODE_MULT_DIV_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_M_CODE_MULT_DIV_SEL_DP_ENCODER0_P0_FLDMASK_LEN   3

Definition at line 111 of file dptx_reg.h.

◆ VIDEO_M_CODE_MULT_DIV_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_M_CODE_MULT_DIV_SEL_DP_ENCODER0_P0_FLDMASK_POS   12

Definition at line 110 of file dptx_reg.h.

◆ VIDEO_M_CODE_PULSE_DP_ENCODER0_P0_FLDMASK

#define VIDEO_M_CODE_PULSE_DP_ENCODER0_P0_FLDMASK   0x100

Definition at line 93 of file dptx_reg.h.

◆ VIDEO_M_CODE_PULSE_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_M_CODE_PULSE_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 95 of file dptx_reg.h.

◆ VIDEO_M_CODE_PULSE_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_M_CODE_PULSE_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 94 of file dptx_reg.h.

◆ VIDEO_M_CODE_READ_0_DP_ENCODER1_P0_FLDMASK

#define VIDEO_M_CODE_READ_0_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 2119 of file dptx_reg.h.

◆ VIDEO_M_CODE_READ_0_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_M_CODE_READ_0_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 2121 of file dptx_reg.h.

◆ VIDEO_M_CODE_READ_0_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_M_CODE_READ_0_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2120 of file dptx_reg.h.

◆ VIDEO_M_CODE_READ_1_DP_ENCODER1_P0_FLDMASK

#define VIDEO_M_CODE_READ_1_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 2124 of file dptx_reg.h.

◆ VIDEO_M_CODE_READ_1_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_M_CODE_READ_1_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 2126 of file dptx_reg.h.

◆ VIDEO_M_CODE_READ_1_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_M_CODE_READ_1_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2125 of file dptx_reg.h.

◆ VIDEO_M_CODE_SEL_DP_ENCODER0_P0_FLDMASK

#define VIDEO_M_CODE_SEL_DP_ENCODER0_P0_FLDMASK   0x100

Definition at line 51 of file dptx_reg.h.

◆ VIDEO_M_CODE_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_M_CODE_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 53 of file dptx_reg.h.

◆ VIDEO_M_CODE_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_M_CODE_SEL_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 52 of file dptx_reg.h.

◆ VIDEO_M_CODE_SW_0_DP_ENCODER0_P0_FLDMASK

#define VIDEO_M_CODE_SW_0_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 84 of file dptx_reg.h.

◆ VIDEO_M_CODE_SW_0_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_M_CODE_SW_0_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 86 of file dptx_reg.h.

◆ VIDEO_M_CODE_SW_0_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_M_CODE_SW_0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 85 of file dptx_reg.h.

◆ VIDEO_M_CODE_SW_1_DP_ENCODER0_P0_FLDMASK

#define VIDEO_M_CODE_SW_1_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 89 of file dptx_reg.h.

◆ VIDEO_M_CODE_SW_1_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_M_CODE_SW_1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 91 of file dptx_reg.h.

◆ VIDEO_M_CODE_SW_1_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_M_CODE_SW_1_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 90 of file dptx_reg.h.

◆ VIDEO_MN_GEN_EN_DP_ENCODER0_P0_FLDMASK

#define VIDEO_MN_GEN_EN_DP_ENCODER0_P0_FLDMASK   0x8000

Definition at line 281 of file dptx_reg.h.

◆ VIDEO_MN_GEN_EN_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_MN_GEN_EN_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 283 of file dptx_reg.h.

◆ VIDEO_MN_GEN_EN_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_MN_GEN_EN_DP_ENCODER0_P0_FLDMASK_POS   15

Definition at line 282 of file dptx_reg.h.

◆ VIDEO_MUTE_CNT_THRD_DP_ENCODER0_P0_FLDMASK

#define VIDEO_MUTE_CNT_THRD_DP_ENCODER0_P0_FLDMASK   0xfff

Definition at line 1036 of file dptx_reg.h.

◆ VIDEO_MUTE_CNT_THRD_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_MUTE_CNT_THRD_DP_ENCODER0_P0_FLDMASK_LEN   12

Definition at line 1038 of file dptx_reg.h.

◆ VIDEO_MUTE_CNT_THRD_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_MUTE_CNT_THRD_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 1037 of file dptx_reg.h.

◆ VIDEO_MUTE_SEL_DP_ENCODER0_P0_FLDMASK

#define VIDEO_MUTE_SEL_DP_ENCODER0_P0_FLDMASK   0x8

Definition at line 22 of file dptx_reg.h.

◆ VIDEO_MUTE_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_MUTE_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 24 of file dptx_reg.h.

◆ VIDEO_MUTE_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_MUTE_SEL_DP_ENCODER0_P0_FLDMASK_POS   3

Definition at line 23 of file dptx_reg.h.

◆ VIDEO_MUTE_SEL_SECURE_FLDMASK

#define VIDEO_MUTE_SEL_SECURE_FLDMASK   0x10

Definition at line 4493 of file dptx_reg.h.

◆ VIDEO_MUTE_SEL_SECURE_FLDMASK_LEN

#define VIDEO_MUTE_SEL_SECURE_FLDMASK_LEN   1

Definition at line 4495 of file dptx_reg.h.

◆ VIDEO_MUTE_SEL_SECURE_FLDMASK_POS

#define VIDEO_MUTE_SEL_SECURE_FLDMASK_POS   4

Definition at line 4494 of file dptx_reg.h.

◆ VIDEO_MUTE_SW_DP_ENCODER0_P0_FLDMASK

#define VIDEO_MUTE_SW_DP_ENCODER0_P0_FLDMASK   0x4

Definition at line 18 of file dptx_reg.h.

◆ VIDEO_MUTE_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_MUTE_SW_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 20 of file dptx_reg.h.

◆ VIDEO_MUTE_SW_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_MUTE_SW_DP_ENCODER0_P0_FLDMASK_POS   2

Definition at line 19 of file dptx_reg.h.

◆ VIDEO_MUTE_SW_SECURE_FLDMASK

#define VIDEO_MUTE_SW_SECURE_FLDMASK   0x8

Definition at line 4489 of file dptx_reg.h.

◆ VIDEO_MUTE_SW_SECURE_FLDMASK_LEN

#define VIDEO_MUTE_SW_SECURE_FLDMASK_LEN   1

Definition at line 4491 of file dptx_reg.h.

◆ VIDEO_MUTE_SW_SECURE_FLDMASK_POS

#define VIDEO_MUTE_SW_SECURE_FLDMASK_POS   3

Definition at line 4490 of file dptx_reg.h.

◆ VIDEO_MUTE_TOGGLE_SEL_DP_ENCODER1_P0_FLDMASK

#define VIDEO_MUTE_TOGGLE_SEL_DP_ENCODER1_P0_FLDMASK   0xc000

Definition at line 1785 of file dptx_reg.h.

◆ VIDEO_MUTE_TOGGLE_SEL_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_MUTE_TOGGLE_SEL_DP_ENCODER1_P0_FLDMASK_LEN   2

Definition at line 1787 of file dptx_reg.h.

◆ VIDEO_MUTE_TOGGLE_SEL_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_MUTE_TOGGLE_SEL_DP_ENCODER1_P0_FLDMASK_POS   14

Definition at line 1786 of file dptx_reg.h.

◆ VIDEO_N_CODE_0_DP_ENCODER0_P0_FLDMASK

#define VIDEO_N_CODE_0_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 307 of file dptx_reg.h.

◆ VIDEO_N_CODE_0_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_N_CODE_0_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 309 of file dptx_reg.h.

◆ VIDEO_N_CODE_0_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_N_CODE_0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 308 of file dptx_reg.h.

◆ VIDEO_N_CODE_1_DP_ENCODER0_P0_FLDMASK

#define VIDEO_N_CODE_1_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 312 of file dptx_reg.h.

◆ VIDEO_N_CODE_1_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_N_CODE_1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 314 of file dptx_reg.h.

◆ VIDEO_N_CODE_1_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_N_CODE_1_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 313 of file dptx_reg.h.

◆ VIDEO_N_CODE_MN_GEN_0_DP_ENCODER0_P0_FLDMASK

#define VIDEO_N_CODE_MN_GEN_0_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 342 of file dptx_reg.h.

◆ VIDEO_N_CODE_MN_GEN_0_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_N_CODE_MN_GEN_0_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 344 of file dptx_reg.h.

◆ VIDEO_N_CODE_MN_GEN_0_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_N_CODE_MN_GEN_0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 343 of file dptx_reg.h.

◆ VIDEO_N_CODE_MN_GEN_1_DP_ENCODER0_P0_FLDMASK

#define VIDEO_N_CODE_MN_GEN_1_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 347 of file dptx_reg.h.

◆ VIDEO_N_CODE_MN_GEN_1_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_N_CODE_MN_GEN_1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 349 of file dptx_reg.h.

◆ VIDEO_N_CODE_MN_GEN_1_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_N_CODE_MN_GEN_1_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 348 of file dptx_reg.h.

◆ VIDEO_PATTERN_GEN_RESET_SW_DP_ENCODER0_P0_FLDMASK

#define VIDEO_PATTERN_GEN_RESET_SW_DP_ENCODER0_P0_FLDMASK   0x1000

Definition at line 67 of file dptx_reg.h.

◆ VIDEO_PATTERN_GEN_RESET_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_PATTERN_GEN_RESET_SW_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 69 of file dptx_reg.h.

◆ VIDEO_PATTERN_GEN_RESET_SW_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_PATTERN_GEN_RESET_SW_DP_ENCODER0_P0_FLDMASK_POS   12

Definition at line 68 of file dptx_reg.h.

◆ VIDEO_PERIOD_ENABLE_DP_ENCODER1_P0_FLDMASK

#define VIDEO_PERIOD_ENABLE_DP_ENCODER1_P0_FLDMASK   0x200

Definition at line 2244 of file dptx_reg.h.

◆ VIDEO_PERIOD_ENABLE_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_PERIOD_ENABLE_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2246 of file dptx_reg.h.

◆ VIDEO_PERIOD_ENABLE_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_PERIOD_ENABLE_DP_ENCODER1_P0_FLDMASK_POS   9

Definition at line 2245 of file dptx_reg.h.

◆ VIDEO_PIXEL_SWAP_DP_ENCODER1_P0_FLDMASK

#define VIDEO_PIXEL_SWAP_DP_ENCODER1_P0_FLDMASK   0x600

Definition at line 2033 of file dptx_reg.h.

◆ VIDEO_PIXEL_SWAP_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_PIXEL_SWAP_DP_ENCODER1_P0_FLDMASK_LEN   2

Definition at line 2035 of file dptx_reg.h.

◆ VIDEO_PIXEL_SWAP_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_PIXEL_SWAP_DP_ENCODER1_P0_FLDMASK_POS   9

Definition at line 2034 of file dptx_reg.h.

◆ VIDEO_RESET_SW_DP_ENCODER0_P0_FLDMASK

#define VIDEO_RESET_SW_DP_ENCODER0_P0_FLDMASK   0x800

Definition at line 63 of file dptx_reg.h.

◆ VIDEO_RESET_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_RESET_SW_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 65 of file dptx_reg.h.

◆ VIDEO_RESET_SW_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_RESET_SW_DP_ENCODER0_P0_FLDMASK_POS   11

Definition at line 64 of file dptx_reg.h.

◆ VIDEO_SOURCE_SEL_DP_ENCODER0_P0_FLDMASK

#define VIDEO_SOURCE_SEL_DP_ENCODER0_P0_FLDMASK   0x800

Definition at line 248 of file dptx_reg.h.

◆ VIDEO_SOURCE_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_SOURCE_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 250 of file dptx_reg.h.

◆ VIDEO_SOURCE_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_SOURCE_SEL_DP_ENCODER0_P0_FLDMASK_POS   11

Definition at line 249 of file dptx_reg.h.

◆ VIDEO_SRAM0_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK

#define VIDEO_SRAM0_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK   0x200

Definition at line 2196 of file dptx_reg.h.

◆ VIDEO_SRAM0_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_SRAM0_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2198 of file dptx_reg.h.

◆ VIDEO_SRAM0_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_SRAM0_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_POS   9

Definition at line 2197 of file dptx_reg.h.

◆ VIDEO_SRAM0_EMPTY_DP_ENCODER1_P0_FLDMASK

#define VIDEO_SRAM0_EMPTY_DP_ENCODER1_P0_FLDMASK   0x100

Definition at line 2192 of file dptx_reg.h.

◆ VIDEO_SRAM0_EMPTY_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_SRAM0_EMPTY_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2194 of file dptx_reg.h.

◆ VIDEO_SRAM0_EMPTY_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_SRAM0_EMPTY_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 2193 of file dptx_reg.h.

◆ VIDEO_SRAM0_FULL_CLR_DP_ENCODER1_P0_FLDMASK

#define VIDEO_SRAM0_FULL_CLR_DP_ENCODER1_P0_FLDMASK   0x2

Definition at line 2164 of file dptx_reg.h.

◆ VIDEO_SRAM0_FULL_CLR_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_SRAM0_FULL_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2166 of file dptx_reg.h.

◆ VIDEO_SRAM0_FULL_CLR_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_SRAM0_FULL_CLR_DP_ENCODER1_P0_FLDMASK_POS   1

Definition at line 2165 of file dptx_reg.h.

◆ VIDEO_SRAM0_FULL_DP_ENCODER1_P0_FLDMASK

#define VIDEO_SRAM0_FULL_DP_ENCODER1_P0_FLDMASK   0x1

Definition at line 2160 of file dptx_reg.h.

◆ VIDEO_SRAM0_FULL_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_SRAM0_FULL_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2162 of file dptx_reg.h.

◆ VIDEO_SRAM0_FULL_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_SRAM0_FULL_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2161 of file dptx_reg.h.

◆ VIDEO_SRAM1_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK

#define VIDEO_SRAM1_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK   0x800

Definition at line 2204 of file dptx_reg.h.

◆ VIDEO_SRAM1_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_SRAM1_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2206 of file dptx_reg.h.

◆ VIDEO_SRAM1_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_SRAM1_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_POS   11

Definition at line 2205 of file dptx_reg.h.

◆ VIDEO_SRAM1_EMPTY_DP_ENCODER1_P0_FLDMASK

#define VIDEO_SRAM1_EMPTY_DP_ENCODER1_P0_FLDMASK   0x400

Definition at line 2200 of file dptx_reg.h.

◆ VIDEO_SRAM1_EMPTY_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_SRAM1_EMPTY_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2202 of file dptx_reg.h.

◆ VIDEO_SRAM1_EMPTY_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_SRAM1_EMPTY_DP_ENCODER1_P0_FLDMASK_POS   10

Definition at line 2201 of file dptx_reg.h.

◆ VIDEO_SRAM1_FULL_CLR_DP_ENCODER1_P0_FLDMASK

#define VIDEO_SRAM1_FULL_CLR_DP_ENCODER1_P0_FLDMASK   0x8

Definition at line 2172 of file dptx_reg.h.

◆ VIDEO_SRAM1_FULL_CLR_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_SRAM1_FULL_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2174 of file dptx_reg.h.

◆ VIDEO_SRAM1_FULL_CLR_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_SRAM1_FULL_CLR_DP_ENCODER1_P0_FLDMASK_POS   3

Definition at line 2173 of file dptx_reg.h.

◆ VIDEO_SRAM1_FULL_DP_ENCODER1_P0_FLDMASK

#define VIDEO_SRAM1_FULL_DP_ENCODER1_P0_FLDMASK   0x4

Definition at line 2168 of file dptx_reg.h.

◆ VIDEO_SRAM1_FULL_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_SRAM1_FULL_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2170 of file dptx_reg.h.

◆ VIDEO_SRAM1_FULL_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_SRAM1_FULL_DP_ENCODER1_P0_FLDMASK_POS   2

Definition at line 2169 of file dptx_reg.h.

◆ VIDEO_SRAM2_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK

#define VIDEO_SRAM2_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK   0x2000

Definition at line 2212 of file dptx_reg.h.

◆ VIDEO_SRAM2_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_SRAM2_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2214 of file dptx_reg.h.

◆ VIDEO_SRAM2_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_SRAM2_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_POS   13

Definition at line 2213 of file dptx_reg.h.

◆ VIDEO_SRAM2_EMPTY_DP_ENCODER1_P0_FLDMASK

#define VIDEO_SRAM2_EMPTY_DP_ENCODER1_P0_FLDMASK   0x1000

Definition at line 2208 of file dptx_reg.h.

◆ VIDEO_SRAM2_EMPTY_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_SRAM2_EMPTY_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2210 of file dptx_reg.h.

◆ VIDEO_SRAM2_EMPTY_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_SRAM2_EMPTY_DP_ENCODER1_P0_FLDMASK_POS   12

Definition at line 2209 of file dptx_reg.h.

◆ VIDEO_SRAM2_FULL_CLR_DP_ENCODER1_P0_FLDMASK

#define VIDEO_SRAM2_FULL_CLR_DP_ENCODER1_P0_FLDMASK   0x20

Definition at line 2180 of file dptx_reg.h.

◆ VIDEO_SRAM2_FULL_CLR_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_SRAM2_FULL_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2182 of file dptx_reg.h.

◆ VIDEO_SRAM2_FULL_CLR_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_SRAM2_FULL_CLR_DP_ENCODER1_P0_FLDMASK_POS   5

Definition at line 2181 of file dptx_reg.h.

◆ VIDEO_SRAM2_FULL_DP_ENCODER1_P0_FLDMASK

#define VIDEO_SRAM2_FULL_DP_ENCODER1_P0_FLDMASK   0x10

Definition at line 2176 of file dptx_reg.h.

◆ VIDEO_SRAM2_FULL_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_SRAM2_FULL_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2178 of file dptx_reg.h.

◆ VIDEO_SRAM2_FULL_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_SRAM2_FULL_DP_ENCODER1_P0_FLDMASK_POS   4

Definition at line 2177 of file dptx_reg.h.

◆ VIDEO_SRAM3_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK

#define VIDEO_SRAM3_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK   0x8000

Definition at line 2220 of file dptx_reg.h.

◆ VIDEO_SRAM3_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_SRAM3_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2222 of file dptx_reg.h.

◆ VIDEO_SRAM3_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_SRAM3_EMPTY_CLR_DP_ENCODER1_P0_FLDMASK_POS   15

Definition at line 2221 of file dptx_reg.h.

◆ VIDEO_SRAM3_EMPTY_DP_ENCODER1_P0_FLDMASK

#define VIDEO_SRAM3_EMPTY_DP_ENCODER1_P0_FLDMASK   0x4000

Definition at line 2216 of file dptx_reg.h.

◆ VIDEO_SRAM3_EMPTY_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_SRAM3_EMPTY_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2218 of file dptx_reg.h.

◆ VIDEO_SRAM3_EMPTY_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_SRAM3_EMPTY_DP_ENCODER1_P0_FLDMASK_POS   14

Definition at line 2217 of file dptx_reg.h.

◆ VIDEO_SRAM3_FULL_CLR_DP_ENCODER1_P0_FLDMASK

#define VIDEO_SRAM3_FULL_CLR_DP_ENCODER1_P0_FLDMASK   0x80

Definition at line 2188 of file dptx_reg.h.

◆ VIDEO_SRAM3_FULL_CLR_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_SRAM3_FULL_CLR_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2190 of file dptx_reg.h.

◆ VIDEO_SRAM3_FULL_CLR_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_SRAM3_FULL_CLR_DP_ENCODER1_P0_FLDMASK_POS   7

Definition at line 2189 of file dptx_reg.h.

◆ VIDEO_SRAM3_FULL_DP_ENCODER1_P0_FLDMASK

#define VIDEO_SRAM3_FULL_DP_ENCODER1_P0_FLDMASK   0x40

Definition at line 2184 of file dptx_reg.h.

◆ VIDEO_SRAM3_FULL_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_SRAM3_FULL_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2186 of file dptx_reg.h.

◆ VIDEO_SRAM3_FULL_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_SRAM3_FULL_DP_ENCODER1_P0_FLDMASK_POS   6

Definition at line 2185 of file dptx_reg.h.

◆ VIDEO_SRAM_FIFO_CNT_RESET_SEL_DP_ENCODER1_P0_FLDMASK

#define VIDEO_SRAM_FIFO_CNT_RESET_SEL_DP_ENCODER1_P0_FLDMASK   0x3

Definition at line 2017 of file dptx_reg.h.

◆ VIDEO_SRAM_FIFO_CNT_RESET_SEL_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_SRAM_FIFO_CNT_RESET_SEL_DP_ENCODER1_P0_FLDMASK_LEN   2

Definition at line 2019 of file dptx_reg.h.

◆ VIDEO_SRAM_FIFO_CNT_RESET_SEL_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_SRAM_FIFO_CNT_RESET_SEL_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2018 of file dptx_reg.h.

◆ VIDEO_SRAM_MODE_DP_ENCODER0_P0_FLDMASK

#define VIDEO_SRAM_MODE_DP_ENCODER0_P0_FLDMASK   0x3

Definition at line 317 of file dptx_reg.h.

◆ VIDEO_SRAM_MODE_DP_ENCODER0_P0_FLDMASK_LEN

#define VIDEO_SRAM_MODE_DP_ENCODER0_P0_FLDMASK_LEN   2

Definition at line 319 of file dptx_reg.h.

◆ VIDEO_SRAM_MODE_DP_ENCODER0_P0_FLDMASK_POS

#define VIDEO_SRAM_MODE_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 318 of file dptx_reg.h.

◆ VIDEO_STABLE_CNT_THRD_DP_ENCODER1_P0_FLDMASK

#define VIDEO_STABLE_CNT_THRD_DP_ENCODER1_P0_FLDMASK   0xf0

Definition at line 2025 of file dptx_reg.h.

◆ VIDEO_STABLE_CNT_THRD_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_STABLE_CNT_THRD_DP_ENCODER1_P0_FLDMASK_LEN   4

Definition at line 2027 of file dptx_reg.h.

◆ VIDEO_STABLE_CNT_THRD_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_STABLE_CNT_THRD_DP_ENCODER1_P0_FLDMASK_POS   4

Definition at line 2026 of file dptx_reg.h.

◆ VIDEO_STABLE_EN_DP_ENCODER1_P0_FLDMASK

#define VIDEO_STABLE_EN_DP_ENCODER1_P0_FLDMASK   0x4

Definition at line 2021 of file dptx_reg.h.

◆ VIDEO_STABLE_EN_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_STABLE_EN_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 2023 of file dptx_reg.h.

◆ VIDEO_STABLE_EN_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_STABLE_EN_DP_ENCODER1_P0_FLDMASK_POS   2

Definition at line 2022 of file dptx_reg.h.

◆ VIDEO_TU_VALUE_DP_ENCODER1_P0_FLDMASK

#define VIDEO_TU_VALUE_DP_ENCODER1_P0_FLDMASK   0x7f

Definition at line 2097 of file dptx_reg.h.

◆ VIDEO_TU_VALUE_DP_ENCODER1_P0_FLDMASK_LEN

#define VIDEO_TU_VALUE_DP_ENCODER1_P0_FLDMASK_LEN   7

Definition at line 2099 of file dptx_reg.h.

◆ VIDEO_TU_VALUE_DP_ENCODER1_P0_FLDMASK_POS

#define VIDEO_TU_VALUE_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2098 of file dptx_reg.h.

◆ VSC_CFG_DP_ENCODER0_P0_FLDMASK

#define VSC_CFG_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 504 of file dptx_reg.h.

◆ VSC_CFG_DP_ENCODER0_P0_FLDMASK_LEN

#define VSC_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 506 of file dptx_reg.h.

◆ VSC_CFG_DP_ENCODER0_P0_FLDMASK_POS

#define VSC_CFG_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 505 of file dptx_reg.h.

◆ VSC_DATA_BYTE0_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_BYTE0_CEA_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1638 of file dptx_reg.h.

◆ VSC_DATA_BYTE0_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_BYTE0_CEA_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1640 of file dptx_reg.h.

◆ VSC_DATA_BYTE0_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_BYTE0_CEA_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1639 of file dptx_reg.h.

◆ VSC_DATA_BYTE0_CEA_SECURE_FLDMASK

#define VSC_DATA_BYTE0_CEA_SECURE_FLDMASK   0xff

Definition at line 4555 of file dptx_reg.h.

◆ VSC_DATA_BYTE0_CEA_SECURE_FLDMASK_LEN

#define VSC_DATA_BYTE0_CEA_SECURE_FLDMASK_LEN   8

Definition at line 4557 of file dptx_reg.h.

◆ VSC_DATA_BYTE0_CEA_SECURE_FLDMASK_POS

#define VSC_DATA_BYTE0_CEA_SECURE_FLDMASK_POS   0

Definition at line 4556 of file dptx_reg.h.

◆ VSC_DATA_BYTE0_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_BYTE0_VESA_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1565 of file dptx_reg.h.

◆ VSC_DATA_BYTE0_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_BYTE0_VESA_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1567 of file dptx_reg.h.

◆ VSC_DATA_BYTE0_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_BYTE0_VESA_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1566 of file dptx_reg.h.

◆ VSC_DATA_BYTE0_VESA_SECURE_FLDMASK

#define VSC_DATA_BYTE0_VESA_SECURE_FLDMASK   0xff

Definition at line 4589 of file dptx_reg.h.

◆ VSC_DATA_BYTE0_VESA_SECURE_FLDMASK_LEN

#define VSC_DATA_BYTE0_VESA_SECURE_FLDMASK_LEN   8

Definition at line 4591 of file dptx_reg.h.

◆ VSC_DATA_BYTE0_VESA_SECURE_FLDMASK_POS

#define VSC_DATA_BYTE0_VESA_SECURE_FLDMASK_POS   0

Definition at line 4590 of file dptx_reg.h.

◆ VSC_DATA_BYTE1_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_BYTE1_CEA_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1642 of file dptx_reg.h.

◆ VSC_DATA_BYTE1_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_BYTE1_CEA_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1644 of file dptx_reg.h.

◆ VSC_DATA_BYTE1_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_BYTE1_CEA_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1643 of file dptx_reg.h.

◆ VSC_DATA_BYTE1_CEA_SECURE_FLDMASK

#define VSC_DATA_BYTE1_CEA_SECURE_FLDMASK   0xff00

Definition at line 4551 of file dptx_reg.h.

◆ VSC_DATA_BYTE1_CEA_SECURE_FLDMASK_LEN

#define VSC_DATA_BYTE1_CEA_SECURE_FLDMASK_LEN   8

Definition at line 4553 of file dptx_reg.h.

◆ VSC_DATA_BYTE1_CEA_SECURE_FLDMASK_POS

#define VSC_DATA_BYTE1_CEA_SECURE_FLDMASK_POS   8

Definition at line 4552 of file dptx_reg.h.

◆ VSC_DATA_BYTE1_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_BYTE1_VESA_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1569 of file dptx_reg.h.

◆ VSC_DATA_BYTE1_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_BYTE1_VESA_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1571 of file dptx_reg.h.

◆ VSC_DATA_BYTE1_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_BYTE1_VESA_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1570 of file dptx_reg.h.

◆ VSC_DATA_BYTE1_VESA_SECURE_FLDMASK

#define VSC_DATA_BYTE1_VESA_SECURE_FLDMASK   0xff00

Definition at line 4585 of file dptx_reg.h.

◆ VSC_DATA_BYTE1_VESA_SECURE_FLDMASK_LEN

#define VSC_DATA_BYTE1_VESA_SECURE_FLDMASK_LEN   8

Definition at line 4587 of file dptx_reg.h.

◆ VSC_DATA_BYTE1_VESA_SECURE_FLDMASK_POS

#define VSC_DATA_BYTE1_VESA_SECURE_FLDMASK_POS   8

Definition at line 4586 of file dptx_reg.h.

◆ VSC_DATA_BYTE2_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_BYTE2_CEA_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1647 of file dptx_reg.h.

◆ VSC_DATA_BYTE2_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_BYTE2_CEA_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1649 of file dptx_reg.h.

◆ VSC_DATA_BYTE2_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_BYTE2_CEA_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1648 of file dptx_reg.h.

◆ VSC_DATA_BYTE2_CEA_SECURE_FLDMASK

#define VSC_DATA_BYTE2_CEA_SECURE_FLDMASK   0xff0000

Definition at line 4547 of file dptx_reg.h.

◆ VSC_DATA_BYTE2_CEA_SECURE_FLDMASK_LEN

#define VSC_DATA_BYTE2_CEA_SECURE_FLDMASK_LEN   8

Definition at line 4549 of file dptx_reg.h.

◆ VSC_DATA_BYTE2_CEA_SECURE_FLDMASK_POS

#define VSC_DATA_BYTE2_CEA_SECURE_FLDMASK_POS   16

Definition at line 4548 of file dptx_reg.h.

◆ VSC_DATA_BYTE2_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_BYTE2_VESA_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1574 of file dptx_reg.h.

◆ VSC_DATA_BYTE2_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_BYTE2_VESA_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1576 of file dptx_reg.h.

◆ VSC_DATA_BYTE2_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_BYTE2_VESA_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1575 of file dptx_reg.h.

◆ VSC_DATA_BYTE2_VESA_SECURE_FLDMASK

#define VSC_DATA_BYTE2_VESA_SECURE_FLDMASK   0xff0000

Definition at line 4581 of file dptx_reg.h.

◆ VSC_DATA_BYTE2_VESA_SECURE_FLDMASK_LEN

#define VSC_DATA_BYTE2_VESA_SECURE_FLDMASK_LEN   8

Definition at line 4583 of file dptx_reg.h.

◆ VSC_DATA_BYTE2_VESA_SECURE_FLDMASK_POS

#define VSC_DATA_BYTE2_VESA_SECURE_FLDMASK_POS   16

Definition at line 4582 of file dptx_reg.h.

◆ VSC_DATA_BYTE3_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_BYTE3_CEA_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1651 of file dptx_reg.h.

◆ VSC_DATA_BYTE3_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_BYTE3_CEA_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1653 of file dptx_reg.h.

◆ VSC_DATA_BYTE3_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_BYTE3_CEA_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1652 of file dptx_reg.h.

◆ VSC_DATA_BYTE3_CEA_SECURE_FLDMASK

#define VSC_DATA_BYTE3_CEA_SECURE_FLDMASK   0xff000000L

Definition at line 4543 of file dptx_reg.h.

◆ VSC_DATA_BYTE3_CEA_SECURE_FLDMASK_LEN

#define VSC_DATA_BYTE3_CEA_SECURE_FLDMASK_LEN   8

Definition at line 4545 of file dptx_reg.h.

◆ VSC_DATA_BYTE3_CEA_SECURE_FLDMASK_POS

#define VSC_DATA_BYTE3_CEA_SECURE_FLDMASK_POS   24

Definition at line 4544 of file dptx_reg.h.

◆ VSC_DATA_BYTE3_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_BYTE3_VESA_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1578 of file dptx_reg.h.

◆ VSC_DATA_BYTE3_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_BYTE3_VESA_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1580 of file dptx_reg.h.

◆ VSC_DATA_BYTE3_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_BYTE3_VESA_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1579 of file dptx_reg.h.

◆ VSC_DATA_BYTE3_VESA_SECURE_FLDMASK

#define VSC_DATA_BYTE3_VESA_SECURE_FLDMASK   0xff000000L

Definition at line 4577 of file dptx_reg.h.

◆ VSC_DATA_BYTE3_VESA_SECURE_FLDMASK_LEN

#define VSC_DATA_BYTE3_VESA_SECURE_FLDMASK_LEN   8

Definition at line 4579 of file dptx_reg.h.

◆ VSC_DATA_BYTE3_VESA_SECURE_FLDMASK_POS

#define VSC_DATA_BYTE3_VESA_SECURE_FLDMASK_POS   24

Definition at line 4578 of file dptx_reg.h.

◆ VSC_DATA_BYTE4_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_BYTE4_CEA_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1656 of file dptx_reg.h.

◆ VSC_DATA_BYTE4_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_BYTE4_CEA_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1658 of file dptx_reg.h.

◆ VSC_DATA_BYTE4_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_BYTE4_CEA_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1657 of file dptx_reg.h.

◆ VSC_DATA_BYTE4_CEA_SECURE_FLDMASK

#define VSC_DATA_BYTE4_CEA_SECURE_FLDMASK   0xff

Definition at line 4538 of file dptx_reg.h.

◆ VSC_DATA_BYTE4_CEA_SECURE_FLDMASK_LEN

#define VSC_DATA_BYTE4_CEA_SECURE_FLDMASK_LEN   8

Definition at line 4540 of file dptx_reg.h.

◆ VSC_DATA_BYTE4_CEA_SECURE_FLDMASK_POS

#define VSC_DATA_BYTE4_CEA_SECURE_FLDMASK_POS   0

Definition at line 4539 of file dptx_reg.h.

◆ VSC_DATA_BYTE4_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_BYTE4_VESA_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1583 of file dptx_reg.h.

◆ VSC_DATA_BYTE4_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_BYTE4_VESA_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1585 of file dptx_reg.h.

◆ VSC_DATA_BYTE4_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_BYTE4_VESA_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1584 of file dptx_reg.h.

◆ VSC_DATA_BYTE4_VESA_SECURE_FLDMASK

#define VSC_DATA_BYTE4_VESA_SECURE_FLDMASK   0xff

Definition at line 4572 of file dptx_reg.h.

◆ VSC_DATA_BYTE4_VESA_SECURE_FLDMASK_LEN

#define VSC_DATA_BYTE4_VESA_SECURE_FLDMASK_LEN   8

Definition at line 4574 of file dptx_reg.h.

◆ VSC_DATA_BYTE4_VESA_SECURE_FLDMASK_POS

#define VSC_DATA_BYTE4_VESA_SECURE_FLDMASK_POS   0

Definition at line 4573 of file dptx_reg.h.

◆ VSC_DATA_BYTE5_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_BYTE5_CEA_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1660 of file dptx_reg.h.

◆ VSC_DATA_BYTE5_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_BYTE5_CEA_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1662 of file dptx_reg.h.

◆ VSC_DATA_BYTE5_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_BYTE5_CEA_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1661 of file dptx_reg.h.

◆ VSC_DATA_BYTE5_CEA_SECURE_FLDMASK

#define VSC_DATA_BYTE5_CEA_SECURE_FLDMASK   0xff00

Definition at line 4534 of file dptx_reg.h.

◆ VSC_DATA_BYTE5_CEA_SECURE_FLDMASK_LEN

#define VSC_DATA_BYTE5_CEA_SECURE_FLDMASK_LEN   8

Definition at line 4536 of file dptx_reg.h.

◆ VSC_DATA_BYTE5_CEA_SECURE_FLDMASK_POS

#define VSC_DATA_BYTE5_CEA_SECURE_FLDMASK_POS   8

Definition at line 4535 of file dptx_reg.h.

◆ VSC_DATA_BYTE5_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_BYTE5_VESA_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1587 of file dptx_reg.h.

◆ VSC_DATA_BYTE5_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_BYTE5_VESA_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1589 of file dptx_reg.h.

◆ VSC_DATA_BYTE5_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_BYTE5_VESA_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1588 of file dptx_reg.h.

◆ VSC_DATA_BYTE5_VESA_SECURE_FLDMASK

#define VSC_DATA_BYTE5_VESA_SECURE_FLDMASK   0xff00

Definition at line 4568 of file dptx_reg.h.

◆ VSC_DATA_BYTE5_VESA_SECURE_FLDMASK_LEN

#define VSC_DATA_BYTE5_VESA_SECURE_FLDMASK_LEN   8

Definition at line 4570 of file dptx_reg.h.

◆ VSC_DATA_BYTE5_VESA_SECURE_FLDMASK_POS

#define VSC_DATA_BYTE5_VESA_SECURE_FLDMASK_POS   8

Definition at line 4569 of file dptx_reg.h.

◆ VSC_DATA_BYTE6_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_BYTE6_CEA_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1665 of file dptx_reg.h.

◆ VSC_DATA_BYTE6_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_BYTE6_CEA_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1667 of file dptx_reg.h.

◆ VSC_DATA_BYTE6_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_BYTE6_CEA_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1666 of file dptx_reg.h.

◆ VSC_DATA_BYTE6_CEA_SECURE_FLDMASK

#define VSC_DATA_BYTE6_CEA_SECURE_FLDMASK   0xff0000

Definition at line 4530 of file dptx_reg.h.

◆ VSC_DATA_BYTE6_CEA_SECURE_FLDMASK_LEN

#define VSC_DATA_BYTE6_CEA_SECURE_FLDMASK_LEN   8

Definition at line 4532 of file dptx_reg.h.

◆ VSC_DATA_BYTE6_CEA_SECURE_FLDMASK_POS

#define VSC_DATA_BYTE6_CEA_SECURE_FLDMASK_POS   16

Definition at line 4531 of file dptx_reg.h.

◆ VSC_DATA_BYTE6_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_BYTE6_VESA_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 1592 of file dptx_reg.h.

◆ VSC_DATA_BYTE6_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_BYTE6_VESA_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1594 of file dptx_reg.h.

◆ VSC_DATA_BYTE6_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_BYTE6_VESA_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1593 of file dptx_reg.h.

◆ VSC_DATA_BYTE6_VESA_SECURE_FLDMASK

#define VSC_DATA_BYTE6_VESA_SECURE_FLDMASK   0xff0000

Definition at line 4564 of file dptx_reg.h.

◆ VSC_DATA_BYTE6_VESA_SECURE_FLDMASK_LEN

#define VSC_DATA_BYTE6_VESA_SECURE_FLDMASK_LEN   8

Definition at line 4566 of file dptx_reg.h.

◆ VSC_DATA_BYTE6_VESA_SECURE_FLDMASK_POS

#define VSC_DATA_BYTE6_VESA_SECURE_FLDMASK_POS   16

Definition at line 4565 of file dptx_reg.h.

◆ VSC_DATA_BYTE7_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_BYTE7_CEA_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1669 of file dptx_reg.h.

◆ VSC_DATA_BYTE7_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_BYTE7_CEA_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1671 of file dptx_reg.h.

◆ VSC_DATA_BYTE7_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_BYTE7_CEA_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1670 of file dptx_reg.h.

◆ VSC_DATA_BYTE7_CEA_SECURE_FLDMASK

#define VSC_DATA_BYTE7_CEA_SECURE_FLDMASK   0xff000000L

Definition at line 4526 of file dptx_reg.h.

◆ VSC_DATA_BYTE7_CEA_SECURE_FLDMASK_LEN

#define VSC_DATA_BYTE7_CEA_SECURE_FLDMASK_LEN   8

Definition at line 4528 of file dptx_reg.h.

◆ VSC_DATA_BYTE7_CEA_SECURE_FLDMASK_POS

#define VSC_DATA_BYTE7_CEA_SECURE_FLDMASK_POS   24

Definition at line 4527 of file dptx_reg.h.

◆ VSC_DATA_BYTE7_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_BYTE7_VESA_DP_ENCODER1_P0_FLDMASK   0xff00

Definition at line 1596 of file dptx_reg.h.

◆ VSC_DATA_BYTE7_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_BYTE7_VESA_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 1598 of file dptx_reg.h.

◆ VSC_DATA_BYTE7_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_BYTE7_VESA_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1597 of file dptx_reg.h.

◆ VSC_DATA_BYTE7_VESA_SECURE_FLDMASK

#define VSC_DATA_BYTE7_VESA_SECURE_FLDMASK   0xff000000L

Definition at line 4560 of file dptx_reg.h.

◆ VSC_DATA_BYTE7_VESA_SECURE_FLDMASK_LEN

#define VSC_DATA_BYTE7_VESA_SECURE_FLDMASK_LEN   8

Definition at line 4562 of file dptx_reg.h.

◆ VSC_DATA_BYTE7_VESA_SECURE_FLDMASK_POS

#define VSC_DATA_BYTE7_VESA_SECURE_FLDMASK_POS   24

Definition at line 4561 of file dptx_reg.h.

◆ VSC_DATA_RDY_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_RDY_CEA_DP_ENCODER1_P0_FLDMASK   0x80

Definition at line 1629 of file dptx_reg.h.

◆ VSC_DATA_RDY_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_RDY_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1631 of file dptx_reg.h.

◆ VSC_DATA_RDY_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_RDY_CEA_DP_ENCODER1_P0_FLDMASK_POS   7

Definition at line 1630 of file dptx_reg.h.

◆ VSC_DATA_RDY_CEA_SECURE_FLDMASK

#define VSC_DATA_RDY_CEA_SECURE_FLDMASK   0x800

Definition at line 4521 of file dptx_reg.h.

◆ VSC_DATA_RDY_CEA_SECURE_FLDMASK_LEN

#define VSC_DATA_RDY_CEA_SECURE_FLDMASK_LEN   1

Definition at line 4523 of file dptx_reg.h.

◆ VSC_DATA_RDY_CEA_SECURE_FLDMASK_POS

#define VSC_DATA_RDY_CEA_SECURE_FLDMASK_POS   11

Definition at line 4522 of file dptx_reg.h.

◆ VSC_DATA_RDY_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_RDY_VESA_DP_ENCODER1_P0_FLDMASK   0x80

Definition at line 1556 of file dptx_reg.h.

◆ VSC_DATA_RDY_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_RDY_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1558 of file dptx_reg.h.

◆ VSC_DATA_RDY_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_RDY_VESA_DP_ENCODER1_P0_FLDMASK_POS   7

Definition at line 1557 of file dptx_reg.h.

◆ VSC_DATA_RDY_VESA_SECURE_FLDMASK

#define VSC_DATA_RDY_VESA_SECURE_FLDMASK   0x200

Definition at line 4513 of file dptx_reg.h.

◆ VSC_DATA_RDY_VESA_SECURE_FLDMASK_LEN

#define VSC_DATA_RDY_VESA_SECURE_FLDMASK_LEN   1

Definition at line 4515 of file dptx_reg.h.

◆ VSC_DATA_RDY_VESA_SECURE_FLDMASK_POS

#define VSC_DATA_RDY_VESA_SECURE_FLDMASK_POS   9

Definition at line 4514 of file dptx_reg.h.

◆ VSC_DATA_SW_CAN_WRITE_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_SW_CAN_WRITE_CEA_DP_ENCODER1_P0_FLDMASK   0x2

Definition at line 1678 of file dptx_reg.h.

◆ VSC_DATA_SW_CAN_WRITE_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_SW_CAN_WRITE_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1680 of file dptx_reg.h.

◆ VSC_DATA_SW_CAN_WRITE_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_SW_CAN_WRITE_CEA_DP_ENCODER1_P0_FLDMASK_POS   1

Definition at line 1679 of file dptx_reg.h.

◆ VSC_DATA_SW_CAN_WRITE_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_SW_CAN_WRITE_VESA_DP_ENCODER1_P0_FLDMASK   0x1

Definition at line 1674 of file dptx_reg.h.

◆ VSC_DATA_SW_CAN_WRITE_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_SW_CAN_WRITE_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1676 of file dptx_reg.h.

◆ VSC_DATA_SW_CAN_WRITE_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_SW_CAN_WRITE_VESA_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1675 of file dptx_reg.h.

◆ VSC_DATA_TOGGLE_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_TOGGLE_CEA_DP_ENCODER1_P0_FLDMASK   0x40

Definition at line 1625 of file dptx_reg.h.

◆ VSC_DATA_TOGGLE_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_TOGGLE_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1627 of file dptx_reg.h.

◆ VSC_DATA_TOGGLE_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_TOGGLE_CEA_DP_ENCODER1_P0_FLDMASK_POS   6

Definition at line 1626 of file dptx_reg.h.

◆ VSC_DATA_TOGGLE_CEA_SECURE_FLDMASK

#define VSC_DATA_TOGGLE_CEA_SECURE_FLDMASK   0x400

Definition at line 4517 of file dptx_reg.h.

◆ VSC_DATA_TOGGLE_CEA_SECURE_FLDMASK_LEN

#define VSC_DATA_TOGGLE_CEA_SECURE_FLDMASK_LEN   1

Definition at line 4519 of file dptx_reg.h.

◆ VSC_DATA_TOGGLE_CEA_SECURE_FLDMASK_POS

#define VSC_DATA_TOGGLE_CEA_SECURE_FLDMASK_POS   10

Definition at line 4518 of file dptx_reg.h.

◆ VSC_DATA_TOGGLE_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_TOGGLE_VESA_DP_ENCODER1_P0_FLDMASK   0x40

Definition at line 1552 of file dptx_reg.h.

◆ VSC_DATA_TOGGLE_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_TOGGLE_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1554 of file dptx_reg.h.

◆ VSC_DATA_TOGGLE_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_TOGGLE_VESA_DP_ENCODER1_P0_FLDMASK_POS   6

Definition at line 1553 of file dptx_reg.h.

◆ VSC_DATA_TOGGLE_VESA_SECURE_FLDMASK

#define VSC_DATA_TOGGLE_VESA_SECURE_FLDMASK   0x100

Definition at line 4509 of file dptx_reg.h.

◆ VSC_DATA_TOGGLE_VESA_SECURE_FLDMASK_LEN

#define VSC_DATA_TOGGLE_VESA_SECURE_FLDMASK_LEN   1

Definition at line 4511 of file dptx_reg.h.

◆ VSC_DATA_TOGGLE_VESA_SECURE_FLDMASK_POS

#define VSC_DATA_TOGGLE_VESA_SECURE_FLDMASK_POS   8

Definition at line 4510 of file dptx_reg.h.

◆ VSC_DATA_TRANSMIT_SEL_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_TRANSMIT_SEL_CEA_DP_ENCODER1_P0_FLDMASK   0x8

Definition at line 1686 of file dptx_reg.h.

◆ VSC_DATA_TRANSMIT_SEL_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_TRANSMIT_SEL_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1688 of file dptx_reg.h.

◆ VSC_DATA_TRANSMIT_SEL_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_TRANSMIT_SEL_CEA_DP_ENCODER1_P0_FLDMASK_POS   3

Definition at line 1687 of file dptx_reg.h.

◆ VSC_DATA_TRANSMIT_SEL_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_DATA_TRANSMIT_SEL_VESA_DP_ENCODER1_P0_FLDMASK   0x4

Definition at line 1682 of file dptx_reg.h.

◆ VSC_DATA_TRANSMIT_SEL_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_DATA_TRANSMIT_SEL_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1684 of file dptx_reg.h.

◆ VSC_DATA_TRANSMIT_SEL_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_DATA_TRANSMIT_SEL_VESA_DP_ENCODER1_P0_FLDMASK_POS   2

Definition at line 1683 of file dptx_reg.h.

◆ VSC_EXT_CEA_CFG_DP_ENCODER0_P0_FLDMASK

#define VSC_EXT_CEA_CFG_DP_ENCODER0_P0_FLDMASK   0xf000

Definition at line 454 of file dptx_reg.h.

◆ VSC_EXT_CEA_CFG_DP_ENCODER0_P0_FLDMASK_LEN

#define VSC_EXT_CEA_CFG_DP_ENCODER0_P0_FLDMASK_LEN   4

Definition at line 456 of file dptx_reg.h.

◆ VSC_EXT_CEA_CFG_DP_ENCODER0_P0_FLDMASK_POS

#define VSC_EXT_CEA_CFG_DP_ENCODER0_P0_FLDMASK_POS   12

Definition at line 455 of file dptx_reg.h.

◆ VSC_EXT_CEA_HB0_DP_ENCODER0_P0_FLDMASK

#define VSC_EXT_CEA_HB0_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 1080 of file dptx_reg.h.

◆ VSC_EXT_CEA_HB0_DP_ENCODER0_P0_FLDMASK_LEN

#define VSC_EXT_CEA_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1082 of file dptx_reg.h.

◆ VSC_EXT_CEA_HB0_DP_ENCODER0_P0_FLDMASK_POS

#define VSC_EXT_CEA_HB0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 1081 of file dptx_reg.h.

◆ VSC_EXT_CEA_HB1_DP_ENCODER0_P0_FLDMASK

#define VSC_EXT_CEA_HB1_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 1084 of file dptx_reg.h.

◆ VSC_EXT_CEA_HB1_DP_ENCODER0_P0_FLDMASK_LEN

#define VSC_EXT_CEA_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1086 of file dptx_reg.h.

◆ VSC_EXT_CEA_HB1_DP_ENCODER0_P0_FLDMASK_POS

#define VSC_EXT_CEA_HB1_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 1085 of file dptx_reg.h.

◆ VSC_EXT_CEA_HB2_DP_ENCODER0_P0_FLDMASK

#define VSC_EXT_CEA_HB2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 1089 of file dptx_reg.h.

◆ VSC_EXT_CEA_HB2_DP_ENCODER0_P0_FLDMASK_LEN

#define VSC_EXT_CEA_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1091 of file dptx_reg.h.

◆ VSC_EXT_CEA_HB2_DP_ENCODER0_P0_FLDMASK_POS

#define VSC_EXT_CEA_HB2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 1090 of file dptx_reg.h.

◆ VSC_EXT_CEA_HB3_DP_ENCODER0_P0_FLDMASK

#define VSC_EXT_CEA_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 1093 of file dptx_reg.h.

◆ VSC_EXT_CEA_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define VSC_EXT_CEA_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1095 of file dptx_reg.h.

◆ VSC_EXT_CEA_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define VSC_EXT_CEA_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 1094 of file dptx_reg.h.

◆ VSC_EXT_CEA_NUM_DP_ENCODER0_P0_FLDMASK

#define VSC_EXT_CEA_NUM_DP_ENCODER0_P0_FLDMASK   0x3f00

Definition at line 1102 of file dptx_reg.h.

◆ VSC_EXT_CEA_NUM_DP_ENCODER0_P0_FLDMASK_LEN

#define VSC_EXT_CEA_NUM_DP_ENCODER0_P0_FLDMASK_LEN   6

Definition at line 1104 of file dptx_reg.h.

◆ VSC_EXT_CEA_NUM_DP_ENCODER0_P0_FLDMASK_POS

#define VSC_EXT_CEA_NUM_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 1103 of file dptx_reg.h.

◆ VSC_EXT_CFG_DP_ENCODER1_P0_FLDMASK

#define VSC_EXT_CFG_DP_ENCODER1_P0_FLDMASK   0xff

Definition at line 2139 of file dptx_reg.h.

◆ VSC_EXT_CFG_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_EXT_CFG_DP_ENCODER1_P0_FLDMASK_LEN   8

Definition at line 2141 of file dptx_reg.h.

◆ VSC_EXT_CFG_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_EXT_CFG_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 2140 of file dptx_reg.h.

◆ VSC_EXT_VESA_CFG_DP_ENCODER0_P0_FLDMASK

#define VSC_EXT_VESA_CFG_DP_ENCODER0_P0_FLDMASK   0xf00

Definition at line 450 of file dptx_reg.h.

◆ VSC_EXT_VESA_CFG_DP_ENCODER0_P0_FLDMASK_LEN

#define VSC_EXT_VESA_CFG_DP_ENCODER0_P0_FLDMASK_LEN   4

Definition at line 452 of file dptx_reg.h.

◆ VSC_EXT_VESA_CFG_DP_ENCODER0_P0_FLDMASK_POS

#define VSC_EXT_VESA_CFG_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 451 of file dptx_reg.h.

◆ VSC_EXT_VESA_HB0_DP_ENCODER0_P0_FLDMASK

#define VSC_EXT_VESA_HB0_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 1062 of file dptx_reg.h.

◆ VSC_EXT_VESA_HB0_DP_ENCODER0_P0_FLDMASK_LEN

#define VSC_EXT_VESA_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1064 of file dptx_reg.h.

◆ VSC_EXT_VESA_HB0_DP_ENCODER0_P0_FLDMASK_POS

#define VSC_EXT_VESA_HB0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 1063 of file dptx_reg.h.

◆ VSC_EXT_VESA_HB1_DP_ENCODER0_P0_FLDMASK

#define VSC_EXT_VESA_HB1_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 1066 of file dptx_reg.h.

◆ VSC_EXT_VESA_HB1_DP_ENCODER0_P0_FLDMASK_LEN

#define VSC_EXT_VESA_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1068 of file dptx_reg.h.

◆ VSC_EXT_VESA_HB1_DP_ENCODER0_P0_FLDMASK_POS

#define VSC_EXT_VESA_HB1_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 1067 of file dptx_reg.h.

◆ VSC_EXT_VESA_HB2_DP_ENCODER0_P0_FLDMASK

#define VSC_EXT_VESA_HB2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 1071 of file dptx_reg.h.

◆ VSC_EXT_VESA_HB2_DP_ENCODER0_P0_FLDMASK_LEN

#define VSC_EXT_VESA_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1073 of file dptx_reg.h.

◆ VSC_EXT_VESA_HB2_DP_ENCODER0_P0_FLDMASK_POS

#define VSC_EXT_VESA_HB2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 1072 of file dptx_reg.h.

◆ VSC_EXT_VESA_HB3_DP_ENCODER0_P0_FLDMASK

#define VSC_EXT_VESA_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 1075 of file dptx_reg.h.

◆ VSC_EXT_VESA_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define VSC_EXT_VESA_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 1077 of file dptx_reg.h.

◆ VSC_EXT_VESA_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define VSC_EXT_VESA_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 1076 of file dptx_reg.h.

◆ VSC_EXT_VESA_NUM_DP_ENCODER0_P0_FLDMASK

#define VSC_EXT_VESA_NUM_DP_ENCODER0_P0_FLDMASK   0x3f

Definition at line 1098 of file dptx_reg.h.

◆ VSC_EXT_VESA_NUM_DP_ENCODER0_P0_FLDMASK_LEN

#define VSC_EXT_VESA_NUM_DP_ENCODER0_P0_FLDMASK_LEN   6

Definition at line 1100 of file dptx_reg.h.

◆ VSC_EXT_VESA_NUM_DP_ENCODER0_P0_FLDMASK_POS

#define VSC_EXT_VESA_NUM_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 1099 of file dptx_reg.h.

◆ VSC_HB0_DP_ENCODER0_P0_FLDMASK

#define VSC_HB0_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 732 of file dptx_reg.h.

◆ VSC_HB0_DP_ENCODER0_P0_FLDMASK_LEN

#define VSC_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 734 of file dptx_reg.h.

◆ VSC_HB0_DP_ENCODER0_P0_FLDMASK_POS

#define VSC_HB0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 733 of file dptx_reg.h.

◆ VSC_HB1_DP_ENCODER0_P0_FLDMASK

#define VSC_HB1_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 736 of file dptx_reg.h.

◆ VSC_HB1_DP_ENCODER0_P0_FLDMASK_LEN

#define VSC_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 738 of file dptx_reg.h.

◆ VSC_HB1_DP_ENCODER0_P0_FLDMASK_POS

#define VSC_HB1_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 737 of file dptx_reg.h.

◆ VSC_HB2_DP_ENCODER0_P0_FLDMASK

#define VSC_HB2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 741 of file dptx_reg.h.

◆ VSC_HB2_DP_ENCODER0_P0_FLDMASK_LEN

#define VSC_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 743 of file dptx_reg.h.

◆ VSC_HB2_DP_ENCODER0_P0_FLDMASK_POS

#define VSC_HB2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 742 of file dptx_reg.h.

◆ VSC_HB3_DP_ENCODER0_P0_FLDMASK

#define VSC_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 745 of file dptx_reg.h.

◆ VSC_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define VSC_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 747 of file dptx_reg.h.

◆ VSC_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define VSC_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 746 of file dptx_reg.h.

◆ VSC_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK

#define VSC_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK   0x4000

Definition at line 1053 of file dptx_reg.h.

◆ VSC_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK_LEN

#define VSC_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 1055 of file dptx_reg.h.

◆ VSC_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK_POS

#define VSC_HW_BYPASS_MASK_DP_ENCODER0_P0_FLDMASK_POS   14

Definition at line 1054 of file dptx_reg.h.

◆ VSC_SEL_SECURE_FLDMASK

#define VSC_SEL_SECURE_FLDMASK   0x80

Definition at line 4505 of file dptx_reg.h.

◆ VSC_SEL_SECURE_FLDMASK_LEN

#define VSC_SEL_SECURE_FLDMASK_LEN   1

Definition at line 4507 of file dptx_reg.h.

◆ VSC_SEL_SECURE_FLDMASK_POS

#define VSC_SEL_SECURE_FLDMASK_POS   7

Definition at line 4506 of file dptx_reg.h.

◆ VSC_SRAM_HW_EMPTY_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_SRAM_HW_EMPTY_CEA_DP_ENCODER1_P0_FLDMASK   0x8

Definition at line 1613 of file dptx_reg.h.

◆ VSC_SRAM_HW_EMPTY_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_SRAM_HW_EMPTY_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1615 of file dptx_reg.h.

◆ VSC_SRAM_HW_EMPTY_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_SRAM_HW_EMPTY_CEA_DP_ENCODER1_P0_FLDMASK_POS   3

Definition at line 1614 of file dptx_reg.h.

◆ VSC_SRAM_HW_EMPTY_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_SRAM_HW_EMPTY_VESA_DP_ENCODER1_P0_FLDMASK   0x8

Definition at line 1540 of file dptx_reg.h.

◆ VSC_SRAM_HW_EMPTY_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_SRAM_HW_EMPTY_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1542 of file dptx_reg.h.

◆ VSC_SRAM_HW_EMPTY_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_SRAM_HW_EMPTY_VESA_DP_ENCODER1_P0_FLDMASK_POS   3

Definition at line 1541 of file dptx_reg.h.

◆ VSC_SRAM_HW_FULL_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_SRAM_HW_FULL_CEA_DP_ENCODER1_P0_FLDMASK   0x10

Definition at line 1617 of file dptx_reg.h.

◆ VSC_SRAM_HW_FULL_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_SRAM_HW_FULL_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1619 of file dptx_reg.h.

◆ VSC_SRAM_HW_FULL_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_SRAM_HW_FULL_CEA_DP_ENCODER1_P0_FLDMASK_POS   4

Definition at line 1618 of file dptx_reg.h.

◆ VSC_SRAM_HW_FULL_CLR_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_SRAM_HW_FULL_CLR_CEA_DP_ENCODER1_P0_FLDMASK   0x20

Definition at line 1621 of file dptx_reg.h.

◆ VSC_SRAM_HW_FULL_CLR_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_SRAM_HW_FULL_CLR_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1623 of file dptx_reg.h.

◆ VSC_SRAM_HW_FULL_CLR_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_SRAM_HW_FULL_CLR_CEA_DP_ENCODER1_P0_FLDMASK_POS   5

Definition at line 1622 of file dptx_reg.h.

◆ VSC_SRAM_HW_FULL_CLR_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_SRAM_HW_FULL_CLR_VESA_DP_ENCODER1_P0_FLDMASK   0x20

Definition at line 1548 of file dptx_reg.h.

◆ VSC_SRAM_HW_FULL_CLR_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_SRAM_HW_FULL_CLR_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1550 of file dptx_reg.h.

◆ VSC_SRAM_HW_FULL_CLR_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_SRAM_HW_FULL_CLR_VESA_DP_ENCODER1_P0_FLDMASK_POS   5

Definition at line 1549 of file dptx_reg.h.

◆ VSC_SRAM_HW_FULL_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_SRAM_HW_FULL_VESA_DP_ENCODER1_P0_FLDMASK   0x10

Definition at line 1544 of file dptx_reg.h.

◆ VSC_SRAM_HW_FULL_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_SRAM_HW_FULL_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1546 of file dptx_reg.h.

◆ VSC_SRAM_HW_FULL_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_SRAM_HW_FULL_VESA_DP_ENCODER1_P0_FLDMASK_POS   4

Definition at line 1545 of file dptx_reg.h.

◆ VSC_SRAM_HW_RST_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_SRAM_HW_RST_CEA_DP_ENCODER1_P0_FLDMASK   0x2

Definition at line 1605 of file dptx_reg.h.

◆ VSC_SRAM_HW_RST_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_SRAM_HW_RST_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1607 of file dptx_reg.h.

◆ VSC_SRAM_HW_RST_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_SRAM_HW_RST_CEA_DP_ENCODER1_P0_FLDMASK_POS   1

Definition at line 1606 of file dptx_reg.h.

◆ VSC_SRAM_HW_RST_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_SRAM_HW_RST_VESA_DP_ENCODER1_P0_FLDMASK   0x2

Definition at line 1532 of file dptx_reg.h.

◆ VSC_SRAM_HW_RST_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_SRAM_HW_RST_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1534 of file dptx_reg.h.

◆ VSC_SRAM_HW_RST_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_SRAM_HW_RST_VESA_DP_ENCODER1_P0_FLDMASK_POS   1

Definition at line 1533 of file dptx_reg.h.

◆ VSC_SRAM_SW_EMPTY_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_SRAM_SW_EMPTY_CEA_DP_ENCODER1_P0_FLDMASK   0x100

Definition at line 1633 of file dptx_reg.h.

◆ VSC_SRAM_SW_EMPTY_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_SRAM_SW_EMPTY_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1635 of file dptx_reg.h.

◆ VSC_SRAM_SW_EMPTY_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_SRAM_SW_EMPTY_CEA_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1634 of file dptx_reg.h.

◆ VSC_SRAM_SW_EMPTY_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_SRAM_SW_EMPTY_VESA_DP_ENCODER1_P0_FLDMASK   0x100

Definition at line 1560 of file dptx_reg.h.

◆ VSC_SRAM_SW_EMPTY_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_SRAM_SW_EMPTY_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1562 of file dptx_reg.h.

◆ VSC_SRAM_SW_EMPTY_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_SRAM_SW_EMPTY_VESA_DP_ENCODER1_P0_FLDMASK_POS   8

Definition at line 1561 of file dptx_reg.h.

◆ VSC_SRAM_SW_RST_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_SRAM_SW_RST_CEA_DP_ENCODER1_P0_FLDMASK   0x4

Definition at line 1609 of file dptx_reg.h.

◆ VSC_SRAM_SW_RST_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_SRAM_SW_RST_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1611 of file dptx_reg.h.

◆ VSC_SRAM_SW_RST_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_SRAM_SW_RST_CEA_DP_ENCODER1_P0_FLDMASK_POS   2

Definition at line 1610 of file dptx_reg.h.

◆ VSC_SRAM_SW_RST_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_SRAM_SW_RST_VESA_DP_ENCODER1_P0_FLDMASK   0x4

Definition at line 1536 of file dptx_reg.h.

◆ VSC_SRAM_SW_RST_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_SRAM_SW_RST_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1538 of file dptx_reg.h.

◆ VSC_SRAM_SW_RST_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_SRAM_SW_RST_VESA_DP_ENCODER1_P0_FLDMASK_POS   2

Definition at line 1537 of file dptx_reg.h.

◆ VSC_SW_HW_SEL_CEA_DP_ENCODER1_P0_FLDMASK

#define VSC_SW_HW_SEL_CEA_DP_ENCODER1_P0_FLDMASK   0x1

Definition at line 1601 of file dptx_reg.h.

◆ VSC_SW_HW_SEL_CEA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_SW_HW_SEL_CEA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1603 of file dptx_reg.h.

◆ VSC_SW_HW_SEL_CEA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_SW_HW_SEL_CEA_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1602 of file dptx_reg.h.

◆ VSC_SW_HW_SEL_VESA_DP_ENCODER1_P0_FLDMASK

#define VSC_SW_HW_SEL_VESA_DP_ENCODER1_P0_FLDMASK   0x1

Definition at line 1528 of file dptx_reg.h.

◆ VSC_SW_HW_SEL_VESA_DP_ENCODER1_P0_FLDMASK_LEN

#define VSC_SW_HW_SEL_VESA_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1530 of file dptx_reg.h.

◆ VSC_SW_HW_SEL_VESA_DP_ENCODER1_P0_FLDMASK_POS

#define VSC_SW_HW_SEL_VESA_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1529 of file dptx_reg.h.

◆ VSP_CFG_DP_ENCODER0_P0_FLDMASK

#define VSP_CFG_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 486 of file dptx_reg.h.

◆ VSP_CFG_DP_ENCODER0_P0_FLDMASK_LEN

#define VSP_CFG_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 488 of file dptx_reg.h.

◆ VSP_CFG_DP_ENCODER0_P0_FLDMASK_POS

#define VSP_CFG_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 487 of file dptx_reg.h.

◆ VSP_HB0_DP_ENCODER0_P0_FLDMASK

#define VSP_HB0_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 714 of file dptx_reg.h.

◆ VSP_HB0_DP_ENCODER0_P0_FLDMASK_LEN

#define VSP_HB0_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 716 of file dptx_reg.h.

◆ VSP_HB0_DP_ENCODER0_P0_FLDMASK_POS

#define VSP_HB0_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 715 of file dptx_reg.h.

◆ VSP_HB1_DP_ENCODER0_P0_FLDMASK

#define VSP_HB1_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 718 of file dptx_reg.h.

◆ VSP_HB1_DP_ENCODER0_P0_FLDMASK_LEN

#define VSP_HB1_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 720 of file dptx_reg.h.

◆ VSP_HB1_DP_ENCODER0_P0_FLDMASK_POS

#define VSP_HB1_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 719 of file dptx_reg.h.

◆ VSP_HB2_DP_ENCODER0_P0_FLDMASK

#define VSP_HB2_DP_ENCODER0_P0_FLDMASK   0xff

Definition at line 723 of file dptx_reg.h.

◆ VSP_HB2_DP_ENCODER0_P0_FLDMASK_LEN

#define VSP_HB2_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 725 of file dptx_reg.h.

◆ VSP_HB2_DP_ENCODER0_P0_FLDMASK_POS

#define VSP_HB2_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 724 of file dptx_reg.h.

◆ VSP_HB3_DP_ENCODER0_P0_FLDMASK

#define VSP_HB3_DP_ENCODER0_P0_FLDMASK   0xff00

Definition at line 727 of file dptx_reg.h.

◆ VSP_HB3_DP_ENCODER0_P0_FLDMASK_LEN

#define VSP_HB3_DP_ENCODER0_P0_FLDMASK_LEN   8

Definition at line 729 of file dptx_reg.h.

◆ VSP_HB3_DP_ENCODER0_P0_FLDMASK_POS

#define VSP_HB3_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 728 of file dptx_reg.h.

◆ VSP_SEL_DP_ENCODER0_P0_FLDMASK

#define VSP_SEL_DP_ENCODER0_P0_FLDMASK   0x100

Definition at line 198 of file dptx_reg.h.

◆ VSP_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define VSP_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 200 of file dptx_reg.h.

◆ VSP_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define VSP_SEL_DP_ENCODER0_P0_FLDMASK_POS   8

Definition at line 199 of file dptx_reg.h.

◆ VSP_SW_DP_ENCODER0_P0_FLDMASK

#define VSP_SW_DP_ENCODER0_P0_FLDMASK   0x8000

Definition at line 161 of file dptx_reg.h.

◆ VSP_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define VSP_SW_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 163 of file dptx_reg.h.

◆ VSP_SW_DP_ENCODER0_P0_FLDMASK_POS

#define VSP_SW_DP_ENCODER0_P0_FLDMASK_POS   15

Definition at line 162 of file dptx_reg.h.

◆ VSTART_SEL_DP_ENCODER0_P0_FLDMASK

#define VSTART_SEL_DP_ENCODER0_P0_FLDMASK   0x8

Definition at line 178 of file dptx_reg.h.

◆ VSTART_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define VSTART_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 180 of file dptx_reg.h.

◆ VSTART_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define VSTART_SEL_DP_ENCODER0_P0_FLDMASK_POS   3

Definition at line 179 of file dptx_reg.h.

◆ VSTART_SW_DP_ENCODER0_P0_FLDMASK

#define VSTART_SW_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 133 of file dptx_reg.h.

◆ VSTART_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define VSTART_SW_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 135 of file dptx_reg.h.

◆ VSTART_SW_DP_ENCODER0_P0_FLDMASK_POS

#define VSTART_SW_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 134 of file dptx_reg.h.

◆ VSW_SEL_DP_ENCODER0_P0_FLDMASK

#define VSW_SEL_DP_ENCODER0_P0_FLDMASK   0x200

Definition at line 202 of file dptx_reg.h.

◆ VSW_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define VSW_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 204 of file dptx_reg.h.

◆ VSW_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define VSW_SEL_DP_ENCODER0_P0_FLDMASK_POS   9

Definition at line 203 of file dptx_reg.h.

◆ VSW_SW_DP_ENCODER0_P0_FLDMASK

#define VSW_SW_DP_ENCODER0_P0_FLDMASK   0x7fff

Definition at line 157 of file dptx_reg.h.

◆ VSW_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define VSW_SW_DP_ENCODER0_P0_FLDMASK_LEN   15

Definition at line 159 of file dptx_reg.h.

◆ VSW_SW_DP_ENCODER0_P0_FLDMASK_POS

#define VSW_SW_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 158 of file dptx_reg.h.

◆ VSYNC_DETECT_POL_DP_ENCODER1_P0_FLDMASK

#define VSYNC_DETECT_POL_DP_ENCODER1_P0_FLDMASK   0x1

Definition at line 1850 of file dptx_reg.h.

◆ VSYNC_DETECT_POL_DP_ENCODER1_P0_FLDMASK_LEN

#define VSYNC_DETECT_POL_DP_ENCODER1_P0_FLDMASK_LEN   1

Definition at line 1852 of file dptx_reg.h.

◆ VSYNC_DETECT_POL_DP_ENCODER1_P0_FLDMASK_POS

#define VSYNC_DETECT_POL_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1851 of file dptx_reg.h.

◆ VTOTAL_DETECT_DP_ENCODER1_P0_FLDMASK

#define VTOTAL_DETECT_DP_ENCODER1_P0_FLDMASK   0xffff

Definition at line 1867 of file dptx_reg.h.

◆ VTOTAL_DETECT_DP_ENCODER1_P0_FLDMASK_LEN

#define VTOTAL_DETECT_DP_ENCODER1_P0_FLDMASK_LEN   16

Definition at line 1869 of file dptx_reg.h.

◆ VTOTAL_DETECT_DP_ENCODER1_P0_FLDMASK_POS

#define VTOTAL_DETECT_DP_ENCODER1_P0_FLDMASK_POS   0

Definition at line 1868 of file dptx_reg.h.

◆ VTOTAL_SEL_DP_ENCODER0_P0_FLDMASK

#define VTOTAL_SEL_DP_ENCODER0_P0_FLDMASK   0x2

Definition at line 170 of file dptx_reg.h.

◆ VTOTAL_SEL_DP_ENCODER0_P0_FLDMASK_LEN

#define VTOTAL_SEL_DP_ENCODER0_P0_FLDMASK_LEN   1

Definition at line 172 of file dptx_reg.h.

◆ VTOTAL_SEL_DP_ENCODER0_P0_FLDMASK_POS

#define VTOTAL_SEL_DP_ENCODER0_P0_FLDMASK_POS   1

Definition at line 171 of file dptx_reg.h.

◆ VTOTAL_SW_DP_ENCODER0_P0_FLDMASK

#define VTOTAL_SW_DP_ENCODER0_P0_FLDMASK   0xffff

Definition at line 123 of file dptx_reg.h.

◆ VTOTAL_SW_DP_ENCODER0_P0_FLDMASK_LEN

#define VTOTAL_SW_DP_ENCODER0_P0_FLDMASK_LEN   16

Definition at line 125 of file dptx_reg.h.

◆ VTOTAL_SW_DP_ENCODER0_P0_FLDMASK_POS

#define VTOTAL_SW_DP_ENCODER0_P0_FLDMASK_POS   0

Definition at line 124 of file dptx_reg.h.

◆ XTAL_FREQ_AUX_TX_P0_FLDMASK

#define XTAL_FREQ_AUX_TX_P0_FLDMASK   0xff00

Definition at line 3592 of file dptx_reg.h.

◆ XTAL_FREQ_AUX_TX_P0_FLDMASK_LEN

#define XTAL_FREQ_AUX_TX_P0_FLDMASK_LEN   8

Definition at line 3594 of file dptx_reg.h.

◆ XTAL_FREQ_AUX_TX_P0_FLDMASK_POS

#define XTAL_FREQ_AUX_TX_P0_FLDMASK_POS   8

Definition at line 3593 of file dptx_reg.h.

◆ XTAL_FREQ_DP_TRANS_P0_FLDMASK

#define XTAL_FREQ_DP_TRANS_P0_FLDMASK   0xff

Definition at line 2539 of file dptx_reg.h.

◆ XTAL_FREQ_DP_TRANS_P0_FLDMASK_LEN

#define XTAL_FREQ_DP_TRANS_P0_FLDMASK_LEN   8

Definition at line 2541 of file dptx_reg.h.

◆ XTAL_FREQ_DP_TRANS_P0_FLDMASK_POS

#define XTAL_FREQ_DP_TRANS_P0_FLDMASK_POS   0

Definition at line 2540 of file dptx_reg.h.