coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <mipi/dsi.h>
#include <mipi/panel.h>
#include <device/mmio.h>
#include <console/console.h>
#include <assert.h>
#include <edid.h>
#include <delay.h>
#include <symbols.h>
#include <types.h>
#include <string.h>
#include <soc/display/mipi_dsi.h>
#include <soc/display/mdssreg.h>
#include <soc/display/dsi_phy.h>
Go to the source code of this file.
Macros | |
#define | DSI_DMA_STREAM1 0x0 |
#define | DSI_EMBED_MODE1 0x1 |
#define | DSI_POWER_MODE2 0x1 |
#define | DSI_PACK_TYPE1 0x0 |
#define | DSI_VC1 0x0 |
#define | DSI_DT1 0x0 |
#define | DSI_WC1 0x0 |
#define | DSI_EOF_BLLP_PWR 0x9 |
#define | DSI_DMA_TRIGGER_SEL 0x4 |
#define | TRAFFIC_MODE 0x1 |
#define | DSI_EN 0x1 |
#define | DSI_CLKLN_EN 0x1 |
#define | DSI_VIDEO_EN 0x1 |
#define | HS_TX_TO 0xEA60 |
#define | TIMER_RESOLUTION 0x4 |
#define | DSI_PAYLOAD_BYTE_BOUND 256 |
#define | DSI_PAYLOAD_SIZE_ALIGN 4 |
#define | DSI_CMD_DMA_TPG_EN BIT(1) |
#define | DSI_TPG_DMA_FIFO_MODE BIT(2) |
#define | DSI_CMD_DMA_PATTERN_SEL (BIT(16) | BIT(17)) |
Functions | |
static void | mdss_dsi_host_init (int num_of_lanes) |
static void | mdss_dsi_reset (void) |
void | mdss_dsi_video_mode_config (struct edid *edid, uint32_t bpp) |
enum cb_err | mdss_dsi_config (struct edid *edid, uint32_t num_of_lanes, uint32_t bpp) |
void | mdss_dsi_clock_config (void) |
static void | mdss_dsi_set_intr (void) |
static int | mdss_dsi_cmd_dma_trigger_for_panel (void) |
static enum cb_err | mdss_dsi_send_init_cmd (enum mipi_dsi_transaction type, const u8 *body, u8 len) |
static void | mdss_dsi_clear_intr (void) |
enum cb_err | mdss_dsi_panel_initialize (const u8 *init_cmds) |
Definition at line 270 of file dsi.c.
References dsi0, DSI_BTA_DONE_AK, DSI_CMD_MODE_DMA_DONE_AK, DSI_CMD_MODE_MDP_DONE_AK, DSI_ERROR_AK, DSI_VIDEO_MODE_DONE_AK, dsi_regs::err_int_mask0, dsi_regs::int_ctrl, setbits32, and write32().
Definition at line 154 of file dsi.c.
References dsi_regs::clk_ctrl, dsi0, DSI_AHBM_SCLK_ON, DSI_AHBS_HCLK_ON, DSI_BYTECLK_ON, DSI_DSICLK_ON, DSI_ESCCLK_ON, DSI_FORCE_ON_DYN_AHBM_HCLK, DSI_PCLK_ON, setbits32, and write32().
Referenced by mdss_dsi_host_init().
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Definition at line 177 of file dsi.c.
References BIOS_ERR, dsi_regs::cmd_mode_dma_sw_trigger, count, dsb, dsi0, dsi_regs::int_ctrl, mdss_dsi_set_intr(), printk, read32(), and write32().
Definition at line 99 of file dsi.c.
References dsi_regs::ctrl, dsi0, DSI_CLKLN_EN, DSI_EN, DSI_EOF_BLLP_PWR, DSI_VIDEO_DST_FORMAT_RGB565, DSI_VIDEO_DST_FORMAT_RGB666, DSI_VIDEO_DST_FORMAT_RGB888, DSI_VIDEO_EN, edid_mode::ha, edid_mode::hbl, dsi_regs::hs_timer_ctrl, HS_TX_TO, edid_mode::hso, edid_mode::hspw, edid::mode, TIMER_RESOLUTION, TRAFFIC_MODE, edid_mode::va, edid_mode::vbl, dsi_regs::video_mode_active_h, dsi_regs::video_mode_active_hsync, dsi_regs::video_mode_active_total, dsi_regs::video_mode_active_v, dsi_regs::video_mode_active_vsync, dsi_regs::video_mode_active_vsync_vpos, dsi_regs::video_mode_ctrl, edid_mode::vso, edid_mode::vspw, and write32().
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Definition at line 40 of file dsi.c.
References BIT, dsi_regs::cmd_mode_dma_ctrl, dsi_regs::ctrl, dsi0, DSI_DMA_STREAM1, DSI_DMA_TRIGGER_SEL, DSI_DT1, DSI_EMBED_MODE1, DSI_PACK_TYPE1, DSI_POWER_MODE2, DSI_VC1, DSI_WC1, dsi_regs::eot_packet_ctrl, mdss_dsi_clock_config(), dsi_regs::trig_ctrl, and write32().
Definition at line 79 of file dsi.c.
References dsi_regs::ctrl, dsi0, dsi_regs::hs_timer_ctrl, HS_TX_TO, dsi_regs::soft_reset, TIMER_RESOLUTION, dsi_regs::tpg_dma_fifo_reset, and write32().
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Definition at line 168 of file dsi.c.
References dsi0, DSI_BTA_DONE_MASK, DSI_CMD_MODE_DMA_DONE_MASK, DSI_CMD_MODE_MDP_DONE_MASK, DSI_ERROR_MASK, DSI_VIDEO_MODE_DONE_MASK, dsi_regs::int_ctrl, setbits32, and write32().
Referenced by mdss_dsi_cmd_dma_trigger_for_panel().