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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <acpi/acpi.h>
#include <baseboard/variants.h>
#include <bootmode.h>
#include <chip.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
#include <ec/ec.h>
#include <ec/google/chromeec/ec.h>
#include <gpio.h>
#include <intelblocks/power_limit.h>
#include <smbios.h>
#include <soc/gpio.h>
#include <soc/pci_devs.h>
#include <soc/nhlt.h>
#include <string.h>
#include <timer.h>
#include <variant/gpio.h>
Go to the source code of this file.
Macros | |
#define | FIZZ_SKU_ID_I7_U42 0x4 |
#define | FIZZ_SKU_ID_I5_U42 0x5 |
#define | FIZZ_SKU_ID_I3_U42 0x6 |
#define | FIZZ_SKU_ID_I7_U22 0x3 |
#define | FIZZ_SKU_ID_I5_U22 0x2 |
#define | FIZZ_SKU_ID_I3_U22 0x1 |
#define | FIZZ_SKU_ID_CEL_U22 0x0 |
#define | FIZZ_PL2_U42 44 |
#define | FIZZ_PL2_U22 29 |
#define | FIZZ_PSYSPL2_U22 65 |
#define | FIZZ_PSYSPL2_U42 90 |
#define | FIZZ_MAX_TIME_WINDOW 6 |
#define | FIZZ_MIN_DUTYCYCLE 4 |
#define | SET_PSYSPL2(w) (9 * (w) / 10) |
#define | GPIO_HDMI_HPD GPP_E13 |
#define | GPIO_DP_HPD GPP_E14 |
Functions | |
static uint8_t | read_sku_id_from_gpio (void) |
static uint8_t | board_sku_id (void) |
static void | mainboard_set_power_limits (struct soc_power_limits_config *conf) |
static uint8_t | read_oem_id_from_gpio (void) |
static uint8_t | board_oem_id (void) |
const char * | smbios_system_sku (void) |
static void | mainboard_init (struct device *dev) |
static unsigned long | mainboard_write_acpi_tables (const struct device *device, unsigned long current, acpi_rsdp_t *rsdp) |
static void | mainboard_enable (struct device *dev) |
static void | wait_for_hpd (gpio_t gpio, long timeout) |
void __weak | variant_chip_display_init (void) |
static void | mainboard_chip_init (void *chip_info) |
Variables | |
struct chip_operations | mainboard_ops |
#define FIZZ_MAX_TIME_WINDOW 6 |
Definition at line 34 of file mainboard.c.
#define FIZZ_MIN_DUTYCYCLE 4 |
Definition at line 35 of file mainboard.c.
#define FIZZ_PL2_U22 29 |
Definition at line 31 of file mainboard.c.
#define FIZZ_PL2_U42 44 |
Definition at line 30 of file mainboard.c.
#define FIZZ_PSYSPL2_U22 65 |
Definition at line 32 of file mainboard.c.
#define FIZZ_PSYSPL2_U42 90 |
Definition at line 33 of file mainboard.c.
#define FIZZ_SKU_ID_CEL_U22 0x0 |
Definition at line 29 of file mainboard.c.
#define FIZZ_SKU_ID_I3_U22 0x1 |
Definition at line 28 of file mainboard.c.
#define FIZZ_SKU_ID_I3_U42 0x6 |
Definition at line 25 of file mainboard.c.
#define FIZZ_SKU_ID_I5_U22 0x2 |
Definition at line 27 of file mainboard.c.
#define FIZZ_SKU_ID_I5_U42 0x5 |
Definition at line 24 of file mainboard.c.
#define FIZZ_SKU_ID_I7_U22 0x3 |
Definition at line 26 of file mainboard.c.
#define FIZZ_SKU_ID_I7_U42 0x4 |
Definition at line 23 of file mainboard.c.
#define GPIO_DP_HPD GPP_E14 |
Definition at line 229 of file mainboard.c.
#define GPIO_HDMI_HPD GPP_E13 |
Definition at line 228 of file mainboard.c.
#define SET_PSYSPL2 | ( | w | ) | (9 * (w) / 10) |
Definition at line 40 of file mainboard.c.
Definition at line 155 of file mainboard.c.
References google_chromeec_cbi_get_oem_id(), and read_oem_id_from_gpio().
Referenced by smbios_system_sku().
Definition at line 53 of file mainboard.c.
References google_chromeec_cbi_get_sku_id(), read_sku_id_from_gpio(), and sku_id().
Referenced by mainboard_set_power_limits().
Definition at line 266 of file mainboard.c.
References gpio_configure_pads(), variant_chip_display_init(), and variant_gpio_table().
Definition at line 216 of file mainboard.c.
References config_of_soc, device_operations::init, mainboard_init(), mainboard_set_power_limits(), mainboard_write_acpi_tables(), and device::ops.
Definition at line 183 of file mainboard.c.
References mainboard_ec_init().
Referenced by mainboard_enable().
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static |
Definition at line 102 of file mainboard.c.
References board_sku_id(), FIZZ_MAX_TIME_WINDOW, FIZZ_MIN_DUTYCYCLE, FIZZ_PL2_U22, FIZZ_PL2_U42, FIZZ_PSYSPL2_U22, FIZZ_PSYSPL2_U42, FIZZ_SKU_ID_I3_U42, FIZZ_SKU_ID_I5_U42, FIZZ_SKU_ID_I7_U42, google_chromeec_get_usb_pd_power_info(), SET_PSYSPL2, sku, soc_power_limits_config::tdp_pl2_override, soc_power_limits_config::tdp_pl4, soc_power_limits_config::tdp_psyspl2, soc_power_limits_config::tdp_psyspl3, soc_power_limits_config::tdp_psyspl3_dutycycle, soc_power_limits_config::tdp_psyspl3_time, type, and USB_CHG_TYPE_PD.
Referenced by mainboard_enable().
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static |
Definition at line 188 of file mainboard.c.
References acpi_add_table(), nhlt_init(), nhlt_soc_serialize_oem_overrides(), NULL, variant_nhlt_init(), and variant_nhlt_oem_overrides().
Referenced by mainboard_enable().
Definition at line 145 of file mainboard.c.
References ARRAY_SIZE, gpio_base2_value(), GPIO_OEM_ID1, GPIO_OEM_ID2, and GPIO_OEM_ID3.
Referenced by board_oem_id().
Definition at line 42 of file mainboard.c.
References ARRAY_SIZE, gpio_base2_value(), GPIO_SKU_ID0, GPIO_SKU_ID1, GPIO_SKU_ID2, and GPIO_SKU_ID3.
Referenced by board_sku_id().
const char* smbios_system_sku | ( | void | ) |
Definition at line 174 of file mainboard.c.
References board_oem_id(), and snprintf().
Definition at line 252 of file mainboard.c.
References display_init_required(), google_chromeec_wait_for_displayport(), GPIO_DP_HPD, gpio_get(), GPIO_HDMI_HPD, gpio_input(), and wait_for_hpd().
Referenced by mainboard_chip_init().
Definition at line 232 of file mainboard.c.
References BIOS_INFO, BIOS_WARNING, gpio_get(), gpio_input(), mdelay(), printk, stopwatch_duration_msecs(), stopwatch_expired(), and stopwatch_init_msecs_expire().
Referenced by variant_chip_display_init().
struct chip_operations mainboard_ops |
Definition at line 266 of file mainboard.c.