coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
smihandler.c
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
console/console.h
>
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#include <
cpu/x86/smm.h
>
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#include <
ec/google/chromeec/smm.h
>
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#include <soc/iomap.h>
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#include <soc/nvs.h>
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#include <soc/pm.h>
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#include <
intelblocks/smihandler.h
>
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#include "
ec.h
"
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#include <variant/gpio.h>
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int
mainboard_io_trap_handler
(
int
smif)
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{
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switch
(smif) {
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case
0x99:
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printk
(
BIOS_DEBUG
,
"Sample\n"
);
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gnvs
->
smif
= 0;
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break
;
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default
:
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return
0;
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}
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/* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*
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* For now, we force the return value to 0 and log all traps to
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* see what's going on.
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*/
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return
1;
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}
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void
mainboard_smi_gpi_handler
(
const
struct
gpi_status
*sts)
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{
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if
(
CONFIG
(BOARD_INTEL_KBLRVP8))
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return
;
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if
(
CONFIG
(EC_GOOGLE_CHROMEEC))
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if
(
gpi_status_get
(sts,
EC_SMI_GPI
))
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chromeec_smi_process_events
();
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}
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void
mainboard_smi_sleep
(
u8
slp_typ)
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{
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if
(
CONFIG
(EC_GOOGLE_CHROMEEC))
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if
(
CONFIG
(EC_GOOGLE_CHROMEEC))
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chromeec_smi_sleep
(slp_typ,
MAINBOARD_EC_S3_WAKE_EVENTS
,
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MAINBOARD_EC_S5_WAKE_EVENTS
);
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}
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int
mainboard_smi_apmc
(
u8
apmc)
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{
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if
(
CONFIG
(EC_GOOGLE_CHROMEEC))
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chromeec_smi_apmc
(apmc,
MAINBOARD_EC_SCI_EVENTS
,
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MAINBOARD_EC_SMI_EVENTS
);
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return
0;
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}
printk
#define printk(level,...)
Definition:
stdlib.h:16
console.h
mainboard_smi_sleep
void __weak mainboard_smi_sleep(u8 slp_typ)
Definition:
smihandler.c:210
mainboard_smi_apmc
int __weak mainboard_smi_apmc(u8 data)
Definition:
smihandler.c:209
mainboard_io_trap_handler
int __weak mainboard_io_trap_handler(int smif)
Definition:
smihandler.c:206
CONFIG
@ CONFIG
Definition:
dsi_common.h:201
chromeec_smi_sleep
void chromeec_smi_sleep(int slp_type, uint64_t s3_mask, uint64_t s5_mask)
Definition:
smihandler.c:48
chromeec_smi_process_events
void chromeec_smi_process_events(void)
Definition:
smihandler.c:29
chromeec_smi_apmc
void chromeec_smi_apmc(int apmc, uint64_t sci_mask, uint64_t smi_mask)
Definition:
smihandler.c:89
smm.h
smm.h
BIOS_DEBUG
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition:
loglevel.h:128
MAINBOARD_EC_S5_WAKE_EVENTS
#define MAINBOARD_EC_S5_WAKE_EVENTS
Definition:
ec.h:32
MAINBOARD_EC_SCI_EVENTS
#define MAINBOARD_EC_SCI_EVENTS
Definition:
ec.h:12
MAINBOARD_EC_SMI_EVENTS
#define MAINBOARD_EC_SMI_EVENTS
Definition:
ec.h:28
EC_SMI_GPI
#define EC_SMI_GPI
Definition:
ec.h:10
MAINBOARD_EC_S3_WAKE_EVENTS
#define MAINBOARD_EC_S3_WAKE_EVENTS
Definition:
ec.h:37
mainboard_smi_gpi_handler
void mainboard_smi_gpi_handler(const struct gpi_status *sts)
Definition:
smihandler.c:16
ec.h
smihandler.h
gnvs
struct global_nvs * gnvs
Definition:
smm_module_handler.c:100
gpi_status_get
int gpi_status_get(const struct gpi_status *sts, gpio_t pad)
Definition:
gpio.c:733
u8
uint8_t u8
Definition:
stdint.h:45
global_nvs::smif
u8 smif
Definition:
nvs.h:11
gpi_status
Definition:
gpio.h:154
src
mainboard
intel
kblrvp
smihandler.c
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