coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
romstage.c
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
amdblocks/acpimmio.h
>
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#include <
northbridge/amd/agesa/state_machine.h
>
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#include "
gpio_ftns.h
"
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#include <SB800.h>
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#include <
sb_cimx.h
>
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static
void
early_lpc_init
(
void
)
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{
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/* PC Engines requires system boot when power is applied. This feature is
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* controlled in PM_REG 5Bh register. "Always Power On" works by writing a
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* value of 05h.
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*/
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u8
bdata =
pm_read8
(SB_PMIOA_REG5B);
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bdata &= 0xf8;
//clear bits 0-2
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bdata |= 0x05;
//set bits 0,2
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pm_write8
(SB_PMIOA_REG5B, bdata);
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/* Multi-function pins switch to GPIO0-35, these pins are shared with PCI pins */
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bdata =
pm_read8
(SB_PMIOA_REGEA);
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bdata &= 0xfe;
//clear bit 0
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bdata |= 0x01;
//set bit 0
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pm_write8
(SB_PMIOA_REGEA, bdata);
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//configure required GPIOs
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configure_gpio
(
GPIO_10
,
GPIO_FTN_1
,
GPIO_OUTPUT
|
GPIO_DATA_HIGH
);
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configure_gpio
(
GPIO_11
,
GPIO_FTN_1
,
GPIO_OUTPUT
|
GPIO_DATA_HIGH
);
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configure_gpio
(
GPIO_15
,
GPIO_FTN_1
,
GPIO_INPUT
);
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configure_gpio
(
GPIO_16
,
GPIO_FTN_1
,
GPIO_INPUT
);
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configure_gpio
(
GPIO_17
,
GPIO_FTN_1
,
GPIO_INPUT
);
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configure_gpio
(
GPIO_18
,
GPIO_FTN_1
,
GPIO_INPUT
);
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configure_gpio
(
GPIO_187
,
GPIO_FTN_1
,
GPIO_INPUT
);
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configure_gpio
(
GPIO_189
,
GPIO_FTN_1
,
GPIO_OUTPUT
|
GPIO_DATA_LOW
);
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configure_gpio
(
GPIO_190
,
GPIO_FTN_1
,
GPIO_OUTPUT
|
GPIO_DATA_LOW
);
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configure_gpio
(
GPIO_191
,
GPIO_FTN_1
,
GPIO_OUTPUT
|
GPIO_DATA_LOW
);
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}
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void
board_BeforeAgesa
(
struct
sysinfo
*cb)
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{
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early_lpc_init
();
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}
acpimmio.h
pm_read8
static uint8_t pm_read8(uint8_t reg)
Definition:
acpimmio.h:166
pm_write8
static void pm_write8(uint8_t reg, uint8_t value)
Definition:
acpimmio.h:181
configure_gpio
void configure_gpio(u8 gpio, u8 iomux_ftn, u8 setting)
Definition:
gpio_ftns.c:8
GPIO_10
#define GPIO_10
Definition:
gpio_ftns.h:12
GPIO_OUTPUT
#define GPIO_OUTPUT
Definition:
gpio_ftns.h:23
GPIO_191
#define GPIO_191
Definition:
gpio_ftns.h:21
GPIO_DATA_HIGH
#define GPIO_DATA_HIGH
Definition:
gpio_ftns.h:27
GPIO_18
#define GPIO_18
Definition:
gpio_ftns.h:17
GPIO_DATA_LOW
#define GPIO_DATA_LOW
Definition:
gpio_ftns.h:26
GPIO_17
#define GPIO_17
Definition:
gpio_ftns.h:16
GPIO_INPUT
#define GPIO_INPUT
Definition:
gpio_ftns.h:24
GPIO_16
#define GPIO_16
Definition:
gpio_ftns.h:15
GPIO_189
#define GPIO_189
Definition:
gpio_ftns.h:19
GPIO_FTN_1
#define GPIO_FTN_1
Definition:
gpio_ftns.h:22
GPIO_11
#define GPIO_11
Definition:
gpio_ftns.h:13
GPIO_190
#define GPIO_190
Definition:
gpio_ftns.h:20
GPIO_187
#define GPIO_187
Definition:
gpio_ftns.h:18
GPIO_15
#define GPIO_15
Definition:
gpio_ftns.h:14
gpio_ftns.h
board_BeforeAgesa
void __weak board_BeforeAgesa(struct sysinfo *cb)
Definition:
romstage.c:19
early_lpc_init
static void early_lpc_init(void)
Definition:
romstage.c:9
sb_cimx.h
state_machine.h
u8
uint8_t u8
Definition:
stdint.h:45
sysinfo
Definition:
state_machine.h:28
src
mainboard
pcengines
apu1
romstage.c
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