coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
pei_data.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <soc/pei_data.h>
4 #include <soc/pei_wrapper.h>
5 
7 {
9 
10  /* One DIMM slot */
13 
14  pei_data->spd_addresses[0] = 0xa0;
15  pei_data->spd_addresses[2] = 0xa4;
16 }
17 
19 {
20  pei_data->ec_present = 1;
21 
22  /* P1: Right Side Port (USB2) */
24  /* P2: Right Side Port (USB2) */
26  /* P3: Left Side Port (USB2 only) */
28  /* P4: Left Side Port (USB2 only) */
30  /* P5: Empty */
32  /* P6: Bluetooth */
34  /* P7: Camera */
36  /* P8: SD Card */
38 
39  /* P1: Right Side Port (USB3) */
41  /* P2: Right Side Port (USB3) */
43  /* P3: Empty */
45  /* P4: Empty */
47 }
static void pei_data_usb2_port(struct pei_data *pei_data, int port, uint16_t length, uint8_t enable, uint8_t oc_pin, uint8_t location)
Definition: pei_wrapper.h:10
static void pei_data_usb3_port(struct pei_data *pei_data, int port, uint8_t enable, uint8_t oc_pin, uint8_t fixed_eq)
Definition: pei_wrapper.h:20
void mainboard_fill_pei_data(struct pei_data *pei_data)
Definition: pei_data.c:6
void mainboard_fill_spd_data(struct pei_data *pei_data)
Definition: pei_data.c:6
#define USB_OC_PIN_SKIP
Definition: pei_data.h:27
@ USB_PORT_BACK_PANEL
Definition: pei_data.h:30
@ USB_PORT_SKIP
Definition: pei_data.h:36
int dimm_channel0_disabled
Definition: pei_data.h:68
uint8_t spd_addresses[4]
Definition: pei_data.h:60
int dq_pins_interleaved
Definition: pei_data.h:72
int dimm_channel1_disabled
Definition: pei_data.h:69
int ec_present
Definition: pei_data.h:62