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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <device/pci.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <device/pci_type.h>
#include <delay.h>
Go to the source code of this file.
Functions | |
void | pci_s_assert_secondary_reset (pci_devfn_t p2p_bridge) |
void | pci_s_deassert_secondary_reset (pci_devfn_t p2p_bridge) |
void | pci_s_bridge_set_secondary (pci_devfn_t p2p_bridge, u8 secondary) |
static void | pci_s_bridge_set_mmio (pci_devfn_t p2p_bridge, u32 base, u32 size) |
static void | pci_s_early_mmio_window (pci_devfn_t p2p_bridge, u32 mmio_base, u32 mmio_size) |
void | pci_early_bridge_init (void) |
pci_devfn_t | pci_locate_device (unsigned int pci_id, pci_devfn_t dev) |
pci_devfn_t | pci_locate_device_on_bus (unsigned int pci_id, unsigned int bus) |
Definition at line 95 of file pci_early.c.
References PCI_DEV, and pci_s_early_mmio_window().
Referenced by console_init().
pci_devfn_t pci_locate_device | ( | unsigned int | pci_id, |
pci_devfn_t | dev | ||
) |
Definition at line 110 of file pci_early.c.
References PCI_DEV, PCI_DEV_INVALID, and pci_s_read_config32().
Referenced by enable_pm(), ne2k_init(), and smbus_enable_iobar().
pci_devfn_t pci_locate_device_on_bus | ( | unsigned int | pci_id, |
unsigned int | bus | ||
) |
Definition at line 121 of file pci_early.c.
References PCI_DEV, PCI_DEV_INVALID, and pci_s_read_config32().
void pci_s_assert_secondary_reset | ( | pci_devfn_t | p2p_bridge | ) |
Definition at line 9 of file pci_early.c.
References PCI_BRIDGE_CONTROL, PCI_BRIDGE_CTL_BUS_RESET, pci_s_read_config16(), and pci_s_write_config16().
Referenced by i945_setup_pci_express_x16(), and pci_s_early_mmio_window().
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static |
Definition at line 35 of file pci_early.c.
References base, PCI_COMMAND, PCI_COMMAND_MEMORY, PCI_MEMORY_BASE, pci_s_read_config16(), pci_s_write_config16(), and pci_s_write_config32().
Referenced by pci_s_early_mmio_window().
void pci_s_bridge_set_secondary | ( | pci_devfn_t | p2p_bridge, |
u8 | secondary | ||
) |
Definition at line 25 of file pci_early.c.
References pci_s_write_config8(), PCI_SECONDARY_BUS, and PCI_SUBORDINATE_BUS.
Referenced by i945_setup_pci_express_x16(), and pci_s_early_mmio_window().
void pci_s_deassert_secondary_reset | ( | pci_devfn_t | p2p_bridge | ) |
Definition at line 17 of file pci_early.c.
References PCI_BRIDGE_CONTROL, PCI_BRIDGE_CTL_BUS_RESET, pci_s_read_config16(), and pci_s_write_config16().
Referenced by i945_setup_pci_express_x16(), and pci_s_early_mmio_window().
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static |
Definition at line 57 of file pci_early.c.
References PCI_DEV, pci_early_device_probe(), pci_s_assert_secondary_reset(), pci_s_bridge_set_mmio(), pci_s_bridge_set_secondary(), pci_s_deassert_secondary_reset(), pci_s_read_config32(), PCI_VENDOR_ID, and udelay().
Referenced by pci_early_bridge_init().