me_status.c File Reference

#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
#include <soc/pci_devs.h>
#include <soc/me.h>
#include <delay.h>

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Macros
#define	ARRAY_TO_ELEMENT(__array__, __index__, __default__)

Functions
static void	me_read_dword_ptr (void *ptr, int offset)
void	intel_me_status (void)
void	intel_me_hsio_version (uint16_t *version, uint16_t *checksum)

Variables
static const char *	me_cws_values []
static const char *	me_opstate_values []
static const char *	me_opmode_values []
static const char *	me_error_values []
static const char *	me_progress_values []
static const char *	me_pmevent_values []
static const char *	me_progress_rom_values []
static const char *	me_progress_bup_values []
static const char *	me_progress_policy_values []

Macro Definition Documentation

ARRAY_TO_ELEMENT

#define ARRAY_TO_ELEMENT	(		__array__,
			__index__,
			__default__
	)

Value:

        (((__index__) < ARRAY_SIZE((__array__))) ? \
                (__array__)[(__index__)] : \
                (__default__))

Definition at line 11 of file me_status.c.

Function Documentation

intel_me_hsio_version()

void intel_me_hsio_version	(	uint16_t *	version,
		uint16_t *	checksum
	)

Definition at line 292 of file me_status.c.

References BIOS_DEBUG, BIOS_ERR, me_hfs::bios_msg_ack, checksum(), count, ME_DELAY, ME_HSIO_CMD_GETHSIOVER, ME_HSIO_MESSAGE, me_read_dword_ptr(), ME_RETRY, PCH_DEV_ME, PCI_ME_H_GS, PCI_ME_HFS, PCI_ME_HFS5, pci_read_config32(), pci_write_config32(), printk, udelay(), and version.

Referenced by mainboard_romstage_entry().

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intel_me_status()

void intel_me_status

(

void

)

Definition at line 194 of file me_status.c.

me_read_dword_ptr()

static void me_read_dword_ptr ( void *  ptr, int  offset  )

inlinestatic

Definition at line 16 of file me_status.c.

References memcpy(), offset, PCH_DEV_ME, and pci_read_config32().

Referenced by intel_me_hsio_version(), and intel_me_status().

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Variable Documentation

me_cws_values

const char* me_cws_values[]

static

Initial value:

= {
        [ME_HFS_CWS_RESET]      = "Reset",
        [ME_HFS_CWS_INIT]       = "Initializing",
        [ME_HFS_CWS_REC]        = "Recovery",
        [3]                     = "Unknown (3)",
        [4]                     = "Unknown (4)",
        [ME_HFS_CWS_NORMAL]     = "Normal",
        [ME_HFS_CWS_WAIT]       = "Platform Disable Wait",
        [ME_HFS_CWS_TRANS]      = "OP State Transition",
        [ME_HFS_CWS_INVALID]    = "Invalid CPU Plugged In",
        [9]                     = "Unknown (9)",
        [10]                    = "Unknown (10)",
        [11]                    = "Unknown (11)",
        [12]                    = "Unknown (12)",
        [13]                    = "Unknown (13)",
        [14]                    = "Unknown (14)",
        [15]                    = "Unknown (15)",
}

Definition at line 23 of file me_status.c.

Referenced by intel_me_status().

me_error_values

const char* me_error_values[]

static

Initial value:

= {
        [ME_HFS_ERROR_NONE]     = "No Error",
        [ME_HFS_ERROR_UNCAT]    = "Uncategorized Failure",
        [ME_HFS_ERROR_IMAGE]    = "Image Failure",
        [ME_HFS_ERROR_DEBUG]    = "Debug Failure"
}

Definition at line 62 of file me_status.c.

Referenced by intel_me_status().

me_opmode_values

const char* me_opmode_values[]

static

Initial value:

= {
        [ME_HFS_MODE_NORMAL]    = "Normal",
        [ME_HFS_MODE_DEBUG]     = "Debug",
        [ME_HFS_MODE_DIS]       = "Soft Temporary Disable",
        [ME_HFS_MODE_OVER_JMPR] = "Security Override via Jumper",
        [ME_HFS_MODE_OVER_MEI]  = "Security Override via MEI Message"
}

Definition at line 53 of file me_status.c.

Referenced by intel_me_status().

me_opstate_values

const char* me_opstate_values[]

static

Initial value:

= {
        [ME_HFS_STATE_PREBOOT]  = "Preboot",
        [ME_HFS_STATE_M0_UMA]   = "M0 with UMA",
        [ME_HFS_STATE_M3]       = "M3 without UMA",
        [ME_HFS_STATE_M0]       = "M0 without UMA",
        [ME_HFS_STATE_BRINGUP]  = "Bring up",
        [ME_HFS_STATE_ERROR]    = "M0 without UMA but with error"
}

Definition at line 43 of file me_status.c.

Referenced by intel_me_status().

me_pmevent_values

const char* me_pmevent_values[]

static

Initial value:

= {
        [ME_HFS2_PMEVENT_CLEAN_MOFF_MX_WAKE] =
        "Clean Moff->Mx wake",
        [ME_HFS2_PMEVENT_MOFF_MX_WAKE_ERROR] =
        "Moff->Mx wake after an error",
        [ME_HFS2_PMEVENT_CLEAN_GLOBAL_RESET] =
        "Clean global reset",
        [ME_HFS2_PMEVENT_CLEAN_GLOBAL_RESET_ERROR] =
        "Global reset after an error",
        [ME_HFS2_PMEVENT_CLEAN_ME_RESET] =
        "Clean Intel ME reset",
        [ME_HFS2_PMEVENT_ME_RESET_EXCEPTION] =
        "Intel ME reset due to exception",
        [ME_HFS2_PMEVENT_PSEUDO_ME_RESET] =
        "Pseudo-global reset",
        [ME_HFS2_PMEVENT_S0MO_SXM3] =
        "S0/M0->Sx/M3",
        [ME_HFS2_PMEVENT_SXM3_S0M0] =
        "Sx/M3->S0/M0",
        [ME_HFS2_PMEVENT_NON_PWR_CYCLE_RESET] =
        "Non-power cycle reset",
        [ME_HFS2_PMEVENT_PWR_CYCLE_RESET_M3] =
        "Power cycle reset through M3",
        [ME_HFS2_PMEVENT_PWR_CYCLE_RESET_MOFF] =
        "Power cycle reset through Moff",
        [ME_HFS2_PMEVENT_SXMX_SXMOFF] =
        "Sx/Mx->Sx/Moff"
}

Definition at line 81 of file me_status.c.

Referenced by intel_me_status().

me_progress_bup_values

const char* me_progress_bup_values[]

static

Definition at line 117 of file me_status.c.

Referenced by intel_me_status().

me_progress_policy_values

const char* me_progress_policy_values[]

static

Initial value:

= {
        [ME_HFS2_STATE_POLICY_ENTRY] = "Entry into Policy Module",
        [ME_HFS2_STATE_POLICY_RCVD_S3] = "Received S3 entry",
        [ME_HFS2_STATE_POLICY_RCVD_S4] = "Received S4 entry",
        [ME_HFS2_STATE_POLICY_RCVD_S5] = "Received S5 entry",
        [ME_HFS2_STATE_POLICY_RCVD_UPD] = "Received UPD entry",
        [ME_HFS2_STATE_POLICY_RCVD_PCR] = "Received PCR entry",
        [ME_HFS2_STATE_POLICY_RCVD_NPCR] = "Received NPCR entry",
        [ME_HFS2_STATE_POLICY_RCVD_HOST_WAKE] = "Received host wake",
        [ME_HFS2_STATE_POLICY_RCVD_AC_DC] = "Received AC<>DC switch",
        [ME_HFS2_STATE_POLICY_RCVD_DID] = "Received DRAM Init Done",
        [ME_HFS2_STATE_POLICY_VSCC_NOT_FOUND] =
        "VSCC Data not found for flash device",
        [ME_HFS2_STATE_POLICY_VSCC_INVALID] =
        "VSCC Table is not valid",
        [ME_HFS2_STATE_POLICY_FPB_ERR] =
        "Flash Partition Boundary is outside address space",
        [ME_HFS2_STATE_POLICY_DESCRIPTOR_ERR] =
        "ME cannot access the chipset descriptor region",
        [ME_HFS2_STATE_POLICY_VSCC_NO_MATCH] =
        "Required VSCC values for flash parts do not match",
}

Definition at line 171 of file me_status.c.

Referenced by intel_me_status().

me_progress_rom_values

const char* me_progress_rom_values[]

static

Initial value:

= {
        [ME_HFS2_STATE_ROM_BEGIN] = "BEGIN",
        [ME_HFS2_STATE_ROM_DISABLE] = "DISABLE"
}

Definition at line 111 of file me_status.c.

Referenced by intel_me_status().

me_progress_values

const char* me_progress_values[]

static

Initial value:

= {
        [ME_HFS2_PHASE_ROM]             = "ROM Phase",
        [ME_HFS2_PHASE_BUP]             = "BUP Phase",
        [ME_HFS2_PHASE_UKERNEL]         = "uKernel Phase",
        [ME_HFS2_PHASE_POLICY]          = "Policy Module",
        [ME_HFS2_PHASE_MODULE_LOAD]     = "Module Loading",
        [ME_HFS2_PHASE_UNKNOWN]         = "Unknown",
        [ME_HFS2_PHASE_HOST_COMM]       = "Host Communication"
}

Definition at line 70 of file me_status.c.

Referenced by intel_me_status().