coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
me.h File Reference
#include <stdint.h>
Include dependency graph for me.h:

Go to the source code of this file.

Data Structures

union  me_hfs
 
union  me_uma
 
union  me_did
 
union  me_hfs2
 
union  me_heres
 
union  mei_csr
 
union  mei_header
 
struct  mkhi_header
 
struct  me_fw_version
 
struct  icc_header
 
struct  icc_clock_enables_msg
 
struct  me_global_reset
 
struct  __packed
 
struct  mbp_platform_key
 
struct  mbp_plat_type
 
struct  me_bios_payload
 
struct  me_fwcaps
 

Macros

#define ME_RETRY   100000 /* 1 second */
 
#define ME_DELAY   10 /* 10 us */
 
#define PCI_CPU_MEBASE_L   0x70 /* Set by MRC */
 
#define PCI_CPU_MEBASE_H   0x74 /* Set by MRC */
 
#define PCI_ME_HFS   0x40
 
#define ME_HFS_CWS_RESET   0
 
#define ME_HFS_CWS_INIT   1
 
#define ME_HFS_CWS_REC   2
 
#define ME_HFS_CWS_NORMAL   5
 
#define ME_HFS_CWS_WAIT   6
 
#define ME_HFS_CWS_TRANS   7
 
#define ME_HFS_CWS_INVALID   8
 
#define ME_HFS_STATE_PREBOOT   0
 
#define ME_HFS_STATE_M0_UMA   1
 
#define ME_HFS_STATE_M3   4
 
#define ME_HFS_STATE_M0   5
 
#define ME_HFS_STATE_BRINGUP   6
 
#define ME_HFS_STATE_ERROR   7
 
#define ME_HFS_ERROR_NONE   0
 
#define ME_HFS_ERROR_UNCAT   1
 
#define ME_HFS_ERROR_IMAGE   3
 
#define ME_HFS_ERROR_DEBUG   4
 
#define ME_HFS_MODE_NORMAL   0
 
#define ME_HFS_MODE_DEBUG   2
 
#define ME_HFS_MODE_DIS   3
 
#define ME_HFS_MODE_OVER_JMPR   4
 
#define ME_HFS_MODE_OVER_MEI   5
 
#define ME_HFS_BIOS_DRAM_ACK   1
 
#define ME_HFS_ACK_NO_DID   0
 
#define ME_HFS_ACK_RESET   1
 
#define ME_HFS_ACK_PWR_CYCLE   2
 
#define ME_HFS_ACK_S3   3
 
#define ME_HFS_ACK_S4   4
 
#define ME_HFS_ACK_S5   5
 
#define ME_HFS_ACK_GBL_RESET   6
 
#define ME_HFS_ACK_CONTINUE   7
 
#define PCI_ME_UMA   0x44
 
#define PCI_ME_H_GS   0x4c
 
#define ME_INIT_DONE   1
 
#define ME_INIT_STATUS_SUCCESS   0
 
#define ME_INIT_STATUS_NOMEM   1
 
#define ME_INIT_STATUS_ERROR   2
 
#define ME_INIT_STATUS_SUCCESS_OTHER   3 /* SEE ME9 BWG */
 
#define ME_HSIO_MESSAGE   (7 << 28)
 
#define ME_HSIO_CMD_GETHSIOVER   1
 
#define ME_HSIO_CMD_CLOSE   0
 
#define PCI_ME_HFS2   0x48
 
#define ME_HFS2_PHASE_ROM   0
 
#define ME_HFS2_PHASE_BUP   1
 
#define ME_HFS2_PHASE_UKERNEL   2
 
#define ME_HFS2_PHASE_POLICY   3
 
#define ME_HFS2_PHASE_MODULE_LOAD   4
 
#define ME_HFS2_PHASE_UNKNOWN   5
 
#define ME_HFS2_PHASE_HOST_COMM   6
 
#define ME_HFS2_STATE_ROM_BEGIN   0
 
#define ME_HFS2_STATE_ROM_DISABLE   6
 
#define ME_HFS2_STATE_BUP_INIT   0
 
#define ME_HFS2_STATE_BUP_DIS_HOST_WAKE   1
 
#define ME_HFS2_STATE_BUP_FLOW_DET   4
 
#define ME_HFS2_STATE_BUP_VSCC_ERR   8
 
#define ME_HFS2_STATE_BUP_CHECK_STRAP   0xa
 
#define ME_HFS2_STATE_BUP_PWR_OK_TIMEOUT   0xb
 
#define ME_HFS2_STATE_BUP_MANUF_OVRD_STRAP   0xd
 
#define ME_HFS2_STATE_BUP_M3   0x11
 
#define ME_HFS2_STATE_BUP_M0   0x12
 
#define ME_HFS2_STATE_BUP_FLOW_DET_ERR   0x13
 
#define ME_HFS2_STATE_BUP_M3_CLK_ERR   0x15
 
#define ME_HFS2_STATE_BUP_CPU_RESET_DID_TIMEOUT_MEM_MISSING   0x17
 
#define ME_HFS2_STATE_BUP_M3_KERN_LOAD   0x18
 
#define ME_HFS2_STATE_BUP_T32_MISSING   0x1c
 
#define ME_HFS2_STATE_BUP_WAIT_DID   0x1f
 
#define ME_HFS2_STATE_BUP_WAIT_DID_FAIL   0x20
 
#define ME_HFS2_STATE_BUP_DID_NO_FAIL   0x21
 
#define ME_HFS2_STATE_BUP_ENABLE_UMA   0x22
 
#define ME_HFS2_STATE_BUP_ENABLE_UMA_ERR   0x23
 
#define ME_HFS2_STATE_BUP_SEND_DID_ACK   0x24
 
#define ME_HFS2_STATE_BUP_SEND_DID_ACK_ERR   0x25
 
#define ME_HFS2_STATE_BUP_M0_CLK   0x26
 
#define ME_HFS2_STATE_BUP_M0_CLK_ERR   0x27
 
#define ME_HFS2_STATE_BUP_TEMP_DIS   0x28
 
#define ME_HFS2_STATE_BUP_M0_KERN_LOAD   0x32
 
#define ME_HFS2_STATE_POLICY_ENTRY   0
 
#define ME_HFS2_STATE_POLICY_RCVD_S3   3
 
#define ME_HFS2_STATE_POLICY_RCVD_S4   4
 
#define ME_HFS2_STATE_POLICY_RCVD_S5   5
 
#define ME_HFS2_STATE_POLICY_RCVD_UPD   6
 
#define ME_HFS2_STATE_POLICY_RCVD_PCR   7
 
#define ME_HFS2_STATE_POLICY_RCVD_NPCR   8
 
#define ME_HFS2_STATE_POLICY_RCVD_HOST_WAKE   9
 
#define ME_HFS2_STATE_POLICY_RCVD_AC_DC   0xa
 
#define ME_HFS2_STATE_POLICY_RCVD_DID   0xb
 
#define ME_HFS2_STATE_POLICY_VSCC_NOT_FOUND   0xc
 
#define ME_HFS2_STATE_POLICY_VSCC_INVALID   0xd
 
#define ME_HFS2_STATE_POLICY_FPB_ERR   0xe
 
#define ME_HFS2_STATE_POLICY_DESCRIPTOR_ERR   0xf
 
#define ME_HFS2_STATE_POLICY_VSCC_NO_MATCH   0x10
 
#define ME_HFS2_PMEVENT_CLEAN_MOFF_MX_WAKE   0
 
#define ME_HFS2_PMEVENT_MOFF_MX_WAKE_ERROR   1
 
#define ME_HFS2_PMEVENT_CLEAN_GLOBAL_RESET   2
 
#define ME_HFS2_PMEVENT_CLEAN_GLOBAL_RESET_ERROR   3
 
#define ME_HFS2_PMEVENT_CLEAN_ME_RESET   4
 
#define ME_HFS2_PMEVENT_ME_RESET_EXCEPTION   5
 
#define ME_HFS2_PMEVENT_PSEUDO_ME_RESET   6
 
#define ME_HFS2_PMEVENT_S0MO_SXM3   7
 
#define ME_HFS2_PMEVENT_SXM3_S0M0   8
 
#define ME_HFS2_PMEVENT_NON_PWR_CYCLE_RESET   9
 
#define ME_HFS2_PMEVENT_PWR_CYCLE_RESET_M3   0xa
 
#define ME_HFS2_PMEVENT_PWR_CYCLE_RESET_MOFF   0xb
 
#define ME_HFS2_PMEVENT_SXMX_SXMOFF   0xc
 
#define PCI_ME_HFS5   0x68
 
#define PCI_ME_H_GS2   0x70
 
#define PCI_ME_MBP_GIVE_UP   0x01
 
#define PCI_ME_HERES   0xbc
 
#define PCI_ME_EXT_SHA1   0x00
 
#define PCI_ME_EXT_SHA256   0x02
 
#define PCI_ME_HER(x)   (0xc0+(4*(x)))
 
#define MEI_H_CB_WW   0x00
 
#define MEI_H_CSR   0x04
 
#define MEI_ME_CB_RW   0x08
 
#define MEI_ME_CSR_HA   0x0c
 
#define MEI_ADDRESS_CORE   0x01
 
#define MEI_ADDRESS_AMT   0x02
 
#define MEI_ADDRESS_RESERVED   0x03
 
#define MEI_ADDRESS_WDT   0x04
 
#define MEI_ADDRESS_MKHI   0x07
 
#define MEI_ADDRESS_ICC   0x08
 
#define MEI_ADDRESS_THERMAL   0x09
 
#define MEI_HOST_ADDRESS   0
 
#define MKHI_GROUP_ID_CBM   0x00
 
#define MKHI_GLOBAL_RESET   0x0b
 
#define MKHI_GROUP_ID_FWCAPS   0x03
 
#define MKHI_FWCAPS_GET_RULE   0x02
 
#define MKHI_GROUP_ID_HMRFPO   0x05
 
#define MKHI_HMRFPO_LOCK   0x02
 
#define MKHI_HMRFPO_LOCK_NOACK   0x05
 
#define MKHI_GROUP_ID_MDES   0x08
 
#define MKHI_MDES_ENABLE   0x09
 
#define MKHI_GROUP_ID_GEN   0xff
 
#define MKHI_GET_FW_VERSION   0x02
 
#define MKHI_END_OF_POST   0x0c
 
#define MKHI_FEATURE_OVERRIDE   0x14
 
#define MKHI_END_OF_POST_NOACK   0x1a
 
#define ICC_SET_CLOCK_ENABLES   0x3
 
#define ICC_API_VERSION_LYNXPOINT   0x00030000
 
#define HECI_EOP_STATUS_SUCCESS   0x0
 
#define HECI_EOP_PERFORM_GLOBAL_RESET   0x1
 
#define CBM_RR_GLOBAL_RESET   0x01
 
#define GLOBAL_RESET_BIOS_MRC   0x01
 
#define GLOBAL_RESET_BIOS_POST   0x02
 
#define GLOBAL_RESET_MEBX   0x03
 
#define MBP_APPID_KERNEL   1
 
#define MBP_APPID_INTEL_AT   3
 
#define MBP_APPID_HWA   4
 
#define MBP_APPID_ICC   5
 
#define MBP_APPID_NFC   6
 
#define MBP_KERNEL_FW_VER_ITEM   1
 
#define MBP_KERNEL_FW_CAP_ITEM   2
 
#define MBP_KERNEL_ROM_BIST_ITEM   3
 
#define MBP_KERNEL_PLAT_KEY_ITEM   4
 
#define MBP_KERNEL_FW_TYPE_ITEM   5
 
#define MBP_KERNEL_MFS_FAILURE_ITEM   6
 
#define MBP_KERNEL_PLAT_TIME_ITEM   7
 
#define MBP_INTEL_AT_STATE_ITEM   1
 
#define MBP_ICC_PROFILE_ITEM   1
 
#define MBP_HWA_REQUEST_ITEM   1
 
#define MBP_NFC_SUPPORT_DATA_ITEM   1
 
#define MBP_MAKE_IDENT(appid, item)   ((appid << 8) | item)
 
#define MBP_IDENT(appid, item)    MBP_MAKE_IDENT(MBP_APPID_##appid, MBP_##appid##_##item##_ITEM)
 

Enumerations

enum  me_bios_path {
  ME_NORMAL_BIOS_PATH , ME_S3WAKE_BIOS_PATH , ME_ERROR_BIOS_PATH , ME_RECOVERY_BIOS_PATH ,
  ME_DISABLE_BIOS_PATH , ME_FIRMWARE_UPDATE_BIOS_PATH , ME_NORMAL_BIOS_PATH , ME_S3WAKE_BIOS_PATH ,
  ME_ERROR_BIOS_PATH , ME_RECOVERY_BIOS_PATH , ME_DISABLE_BIOS_PATH , ME_FIRMWARE_UPDATE_BIOS_PATH ,
  ME_NORMAL_BIOS_PATH , ME_S3WAKE_BIOS_PATH , ME_ERROR_BIOS_PATH , ME_RECOVERY_BIOS_PATH ,
  ME_DISABLE_BIOS_PATH , ME_FIRMWARE_UPDATE_BIOS_PATH , ME_NORMAL_BIOS_PATH , ME_S3WAKE_BIOS_PATH ,
  ME_ERROR_BIOS_PATH , ME_RECOVERY_BIOS_PATH , ME_DISABLE_BIOS_PATH , ME_FIRMWARE_UPDATE_BIOS_PATH
}
 

Functions

void intel_me_hsio_version (uint16_t *version, uint16_t *checksum)
 
void intel_me_status (void)
 

Variables

struct me_hfs __packed
 

Macro Definition Documentation

◆ CBM_RR_GLOBAL_RESET

#define CBM_RR_GLOBAL_RESET   0x01

Definition at line 299 of file me.h.

◆ GLOBAL_RESET_BIOS_MRC

#define GLOBAL_RESET_BIOS_MRC   0x01

Definition at line 301 of file me.h.

◆ GLOBAL_RESET_BIOS_POST

#define GLOBAL_RESET_BIOS_POST   0x02

Definition at line 302 of file me.h.

◆ GLOBAL_RESET_MEBX

#define GLOBAL_RESET_MEBX   0x03

Definition at line 303 of file me.h.

◆ HECI_EOP_PERFORM_GLOBAL_RESET

#define HECI_EOP_PERFORM_GLOBAL_RESET   0x1

Definition at line 297 of file me.h.

◆ HECI_EOP_STATUS_SUCCESS

#define HECI_EOP_STATUS_SUCCESS   0x0

Definition at line 296 of file me.h.

◆ ICC_API_VERSION_LYNXPOINT

#define ICC_API_VERSION_LYNXPOINT   0x00030000

Definition at line 279 of file me.h.

◆ ICC_SET_CLOCK_ENABLES

#define ICC_SET_CLOCK_ENABLES   0x3

Definition at line 278 of file me.h.

◆ MBP_APPID_HWA

#define MBP_APPID_HWA   4

Definition at line 326 of file me.h.

◆ MBP_APPID_ICC

#define MBP_APPID_ICC   5

Definition at line 327 of file me.h.

◆ MBP_APPID_INTEL_AT

#define MBP_APPID_INTEL_AT   3

Definition at line 325 of file me.h.

◆ MBP_APPID_KERNEL

#define MBP_APPID_KERNEL   1

Definition at line 324 of file me.h.

◆ MBP_APPID_NFC

#define MBP_APPID_NFC   6

Definition at line 328 of file me.h.

◆ MBP_HWA_REQUEST_ITEM

#define MBP_HWA_REQUEST_ITEM   1

Definition at line 342 of file me.h.

◆ MBP_ICC_PROFILE_ITEM

#define MBP_ICC_PROFILE_ITEM   1

Definition at line 340 of file me.h.

◆ MBP_IDENT

#define MBP_IDENT (   appid,
  item 
)     MBP_MAKE_IDENT(MBP_APPID_##appid, MBP_##appid##_##item##_ITEM)

Definition at line 347 of file me.h.

◆ MBP_INTEL_AT_STATE_ITEM

#define MBP_INTEL_AT_STATE_ITEM   1

Definition at line 338 of file me.h.

◆ MBP_KERNEL_FW_CAP_ITEM

#define MBP_KERNEL_FW_CAP_ITEM   2

Definition at line 331 of file me.h.

◆ MBP_KERNEL_FW_TYPE_ITEM

#define MBP_KERNEL_FW_TYPE_ITEM   5

Definition at line 334 of file me.h.

◆ MBP_KERNEL_FW_VER_ITEM

#define MBP_KERNEL_FW_VER_ITEM   1

Definition at line 330 of file me.h.

◆ MBP_KERNEL_MFS_FAILURE_ITEM

#define MBP_KERNEL_MFS_FAILURE_ITEM   6

Definition at line 335 of file me.h.

◆ MBP_KERNEL_PLAT_KEY_ITEM

#define MBP_KERNEL_PLAT_KEY_ITEM   4

Definition at line 333 of file me.h.

◆ MBP_KERNEL_PLAT_TIME_ITEM

#define MBP_KERNEL_PLAT_TIME_ITEM   7

Definition at line 336 of file me.h.

◆ MBP_KERNEL_ROM_BIST_ITEM

#define MBP_KERNEL_ROM_BIST_ITEM   3

Definition at line 332 of file me.h.

◆ MBP_MAKE_IDENT

#define MBP_MAKE_IDENT (   appid,
  item 
)    ((appid << 8) | item)

Definition at line 346 of file me.h.

◆ MBP_NFC_SUPPORT_DATA_ITEM

#define MBP_NFC_SUPPORT_DATA_ITEM   1

Definition at line 344 of file me.h.

◆ ME_DELAY

#define ME_DELAY   10 /* 10 us */

Definition at line 9 of file me.h.

◆ ME_HFS2_PHASE_BUP

#define ME_HFS2_PHASE_BUP   1

Definition at line 103 of file me.h.

◆ ME_HFS2_PHASE_HOST_COMM

#define ME_HFS2_PHASE_HOST_COMM   6

Definition at line 108 of file me.h.

◆ ME_HFS2_PHASE_MODULE_LOAD

#define ME_HFS2_PHASE_MODULE_LOAD   4

Definition at line 106 of file me.h.

◆ ME_HFS2_PHASE_POLICY

#define ME_HFS2_PHASE_POLICY   3

Definition at line 105 of file me.h.

◆ ME_HFS2_PHASE_ROM

#define ME_HFS2_PHASE_ROM   0

Definition at line 102 of file me.h.

◆ ME_HFS2_PHASE_UKERNEL

#define ME_HFS2_PHASE_UKERNEL   2

Definition at line 104 of file me.h.

◆ ME_HFS2_PHASE_UNKNOWN

#define ME_HFS2_PHASE_UNKNOWN   5

Definition at line 107 of file me.h.

◆ ME_HFS2_PMEVENT_CLEAN_GLOBAL_RESET

#define ME_HFS2_PMEVENT_CLEAN_GLOBAL_RESET   2

Definition at line 158 of file me.h.

◆ ME_HFS2_PMEVENT_CLEAN_GLOBAL_RESET_ERROR

#define ME_HFS2_PMEVENT_CLEAN_GLOBAL_RESET_ERROR   3

Definition at line 159 of file me.h.

◆ ME_HFS2_PMEVENT_CLEAN_ME_RESET

#define ME_HFS2_PMEVENT_CLEAN_ME_RESET   4

Definition at line 160 of file me.h.

◆ ME_HFS2_PMEVENT_CLEAN_MOFF_MX_WAKE

#define ME_HFS2_PMEVENT_CLEAN_MOFF_MX_WAKE   0

Definition at line 156 of file me.h.

◆ ME_HFS2_PMEVENT_ME_RESET_EXCEPTION

#define ME_HFS2_PMEVENT_ME_RESET_EXCEPTION   5

Definition at line 161 of file me.h.

◆ ME_HFS2_PMEVENT_MOFF_MX_WAKE_ERROR

#define ME_HFS2_PMEVENT_MOFF_MX_WAKE_ERROR   1

Definition at line 157 of file me.h.

◆ ME_HFS2_PMEVENT_NON_PWR_CYCLE_RESET

#define ME_HFS2_PMEVENT_NON_PWR_CYCLE_RESET   9

Definition at line 165 of file me.h.

◆ ME_HFS2_PMEVENT_PSEUDO_ME_RESET

#define ME_HFS2_PMEVENT_PSEUDO_ME_RESET   6

Definition at line 162 of file me.h.

◆ ME_HFS2_PMEVENT_PWR_CYCLE_RESET_M3

#define ME_HFS2_PMEVENT_PWR_CYCLE_RESET_M3   0xa

Definition at line 166 of file me.h.

◆ ME_HFS2_PMEVENT_PWR_CYCLE_RESET_MOFF

#define ME_HFS2_PMEVENT_PWR_CYCLE_RESET_MOFF   0xb

Definition at line 167 of file me.h.

◆ ME_HFS2_PMEVENT_S0MO_SXM3

#define ME_HFS2_PMEVENT_S0MO_SXM3   7

Definition at line 163 of file me.h.

◆ ME_HFS2_PMEVENT_SXM3_S0M0

#define ME_HFS2_PMEVENT_SXM3_S0M0   8

Definition at line 164 of file me.h.

◆ ME_HFS2_PMEVENT_SXMX_SXMOFF

#define ME_HFS2_PMEVENT_SXMX_SXMOFF   0xc

Definition at line 168 of file me.h.

◆ ME_HFS2_STATE_BUP_CHECK_STRAP

#define ME_HFS2_STATE_BUP_CHECK_STRAP   0xa

Definition at line 118 of file me.h.

◆ ME_HFS2_STATE_BUP_CPU_RESET_DID_TIMEOUT_MEM_MISSING

#define ME_HFS2_STATE_BUP_CPU_RESET_DID_TIMEOUT_MEM_MISSING   0x17

Definition at line 125 of file me.h.

◆ ME_HFS2_STATE_BUP_DID_NO_FAIL

#define ME_HFS2_STATE_BUP_DID_NO_FAIL   0x21

Definition at line 130 of file me.h.

◆ ME_HFS2_STATE_BUP_DIS_HOST_WAKE

#define ME_HFS2_STATE_BUP_DIS_HOST_WAKE   1

Definition at line 115 of file me.h.

◆ ME_HFS2_STATE_BUP_ENABLE_UMA

#define ME_HFS2_STATE_BUP_ENABLE_UMA   0x22

Definition at line 131 of file me.h.

◆ ME_HFS2_STATE_BUP_ENABLE_UMA_ERR

#define ME_HFS2_STATE_BUP_ENABLE_UMA_ERR   0x23

Definition at line 132 of file me.h.

◆ ME_HFS2_STATE_BUP_FLOW_DET

#define ME_HFS2_STATE_BUP_FLOW_DET   4

Definition at line 116 of file me.h.

◆ ME_HFS2_STATE_BUP_FLOW_DET_ERR

#define ME_HFS2_STATE_BUP_FLOW_DET_ERR   0x13

Definition at line 123 of file me.h.

◆ ME_HFS2_STATE_BUP_INIT

#define ME_HFS2_STATE_BUP_INIT   0

Definition at line 114 of file me.h.

◆ ME_HFS2_STATE_BUP_M0

#define ME_HFS2_STATE_BUP_M0   0x12

Definition at line 122 of file me.h.

◆ ME_HFS2_STATE_BUP_M0_CLK

#define ME_HFS2_STATE_BUP_M0_CLK   0x26

Definition at line 135 of file me.h.

◆ ME_HFS2_STATE_BUP_M0_CLK_ERR

#define ME_HFS2_STATE_BUP_M0_CLK_ERR   0x27

Definition at line 136 of file me.h.

◆ ME_HFS2_STATE_BUP_M0_KERN_LOAD

#define ME_HFS2_STATE_BUP_M0_KERN_LOAD   0x32

Definition at line 138 of file me.h.

◆ ME_HFS2_STATE_BUP_M3

#define ME_HFS2_STATE_BUP_M3   0x11

Definition at line 121 of file me.h.

◆ ME_HFS2_STATE_BUP_M3_CLK_ERR

#define ME_HFS2_STATE_BUP_M3_CLK_ERR   0x15

Definition at line 124 of file me.h.

◆ ME_HFS2_STATE_BUP_M3_KERN_LOAD

#define ME_HFS2_STATE_BUP_M3_KERN_LOAD   0x18

Definition at line 126 of file me.h.

◆ ME_HFS2_STATE_BUP_MANUF_OVRD_STRAP

#define ME_HFS2_STATE_BUP_MANUF_OVRD_STRAP   0xd

Definition at line 120 of file me.h.

◆ ME_HFS2_STATE_BUP_PWR_OK_TIMEOUT

#define ME_HFS2_STATE_BUP_PWR_OK_TIMEOUT   0xb

Definition at line 119 of file me.h.

◆ ME_HFS2_STATE_BUP_SEND_DID_ACK

#define ME_HFS2_STATE_BUP_SEND_DID_ACK   0x24

Definition at line 133 of file me.h.

◆ ME_HFS2_STATE_BUP_SEND_DID_ACK_ERR

#define ME_HFS2_STATE_BUP_SEND_DID_ACK_ERR   0x25

Definition at line 134 of file me.h.

◆ ME_HFS2_STATE_BUP_T32_MISSING

#define ME_HFS2_STATE_BUP_T32_MISSING   0x1c

Definition at line 127 of file me.h.

◆ ME_HFS2_STATE_BUP_TEMP_DIS

#define ME_HFS2_STATE_BUP_TEMP_DIS   0x28

Definition at line 137 of file me.h.

◆ ME_HFS2_STATE_BUP_VSCC_ERR

#define ME_HFS2_STATE_BUP_VSCC_ERR   8

Definition at line 117 of file me.h.

◆ ME_HFS2_STATE_BUP_WAIT_DID

#define ME_HFS2_STATE_BUP_WAIT_DID   0x1f

Definition at line 128 of file me.h.

◆ ME_HFS2_STATE_BUP_WAIT_DID_FAIL

#define ME_HFS2_STATE_BUP_WAIT_DID_FAIL   0x20

Definition at line 129 of file me.h.

◆ ME_HFS2_STATE_POLICY_DESCRIPTOR_ERR

#define ME_HFS2_STATE_POLICY_DESCRIPTOR_ERR   0xf

Definition at line 153 of file me.h.

◆ ME_HFS2_STATE_POLICY_ENTRY

#define ME_HFS2_STATE_POLICY_ENTRY   0

Definition at line 140 of file me.h.

◆ ME_HFS2_STATE_POLICY_FPB_ERR

#define ME_HFS2_STATE_POLICY_FPB_ERR   0xe

Definition at line 152 of file me.h.

◆ ME_HFS2_STATE_POLICY_RCVD_AC_DC

#define ME_HFS2_STATE_POLICY_RCVD_AC_DC   0xa

Definition at line 148 of file me.h.

◆ ME_HFS2_STATE_POLICY_RCVD_DID

#define ME_HFS2_STATE_POLICY_RCVD_DID   0xb

Definition at line 149 of file me.h.

◆ ME_HFS2_STATE_POLICY_RCVD_HOST_WAKE

#define ME_HFS2_STATE_POLICY_RCVD_HOST_WAKE   9

Definition at line 147 of file me.h.

◆ ME_HFS2_STATE_POLICY_RCVD_NPCR

#define ME_HFS2_STATE_POLICY_RCVD_NPCR   8

Definition at line 146 of file me.h.

◆ ME_HFS2_STATE_POLICY_RCVD_PCR

#define ME_HFS2_STATE_POLICY_RCVD_PCR   7

Definition at line 145 of file me.h.

◆ ME_HFS2_STATE_POLICY_RCVD_S3

#define ME_HFS2_STATE_POLICY_RCVD_S3   3

Definition at line 141 of file me.h.

◆ ME_HFS2_STATE_POLICY_RCVD_S4

#define ME_HFS2_STATE_POLICY_RCVD_S4   4

Definition at line 142 of file me.h.

◆ ME_HFS2_STATE_POLICY_RCVD_S5

#define ME_HFS2_STATE_POLICY_RCVD_S5   5

Definition at line 143 of file me.h.

◆ ME_HFS2_STATE_POLICY_RCVD_UPD

#define ME_HFS2_STATE_POLICY_RCVD_UPD   6

Definition at line 144 of file me.h.

◆ ME_HFS2_STATE_POLICY_VSCC_INVALID

#define ME_HFS2_STATE_POLICY_VSCC_INVALID   0xd

Definition at line 151 of file me.h.

◆ ME_HFS2_STATE_POLICY_VSCC_NO_MATCH

#define ME_HFS2_STATE_POLICY_VSCC_NO_MATCH   0x10

Definition at line 154 of file me.h.

◆ ME_HFS2_STATE_POLICY_VSCC_NOT_FOUND

#define ME_HFS2_STATE_POLICY_VSCC_NOT_FOUND   0xc

Definition at line 150 of file me.h.

◆ ME_HFS2_STATE_ROM_BEGIN

#define ME_HFS2_STATE_ROM_BEGIN   0

Definition at line 111 of file me.h.

◆ ME_HFS2_STATE_ROM_DISABLE

#define ME_HFS2_STATE_ROM_DISABLE   6

Definition at line 112 of file me.h.

◆ ME_HFS_ACK_CONTINUE

#define ME_HFS_ACK_CONTINUE   7

Definition at line 49 of file me.h.

◆ ME_HFS_ACK_GBL_RESET

#define ME_HFS_ACK_GBL_RESET   6

Definition at line 48 of file me.h.

◆ ME_HFS_ACK_NO_DID

#define ME_HFS_ACK_NO_DID   0

Definition at line 42 of file me.h.

◆ ME_HFS_ACK_PWR_CYCLE

#define ME_HFS_ACK_PWR_CYCLE   2

Definition at line 44 of file me.h.

◆ ME_HFS_ACK_RESET

#define ME_HFS_ACK_RESET   1

Definition at line 43 of file me.h.

◆ ME_HFS_ACK_S3

#define ME_HFS_ACK_S3   3

Definition at line 45 of file me.h.

◆ ME_HFS_ACK_S4

#define ME_HFS_ACK_S4   4

Definition at line 46 of file me.h.

◆ ME_HFS_ACK_S5

#define ME_HFS_ACK_S5   5

Definition at line 47 of file me.h.

◆ ME_HFS_BIOS_DRAM_ACK

#define ME_HFS_BIOS_DRAM_ACK   1

Definition at line 41 of file me.h.

◆ ME_HFS_CWS_INIT

#define ME_HFS_CWS_INIT   1

Definition at line 20 of file me.h.

◆ ME_HFS_CWS_INVALID

#define ME_HFS_CWS_INVALID   8

Definition at line 25 of file me.h.

◆ ME_HFS_CWS_NORMAL

#define ME_HFS_CWS_NORMAL   5

Definition at line 22 of file me.h.

◆ ME_HFS_CWS_REC

#define ME_HFS_CWS_REC   2

Definition at line 21 of file me.h.

◆ ME_HFS_CWS_RESET

#define ME_HFS_CWS_RESET   0

Definition at line 19 of file me.h.

◆ ME_HFS_CWS_TRANS

#define ME_HFS_CWS_TRANS   7

Definition at line 24 of file me.h.

◆ ME_HFS_CWS_WAIT

#define ME_HFS_CWS_WAIT   6

Definition at line 23 of file me.h.

◆ ME_HFS_ERROR_DEBUG

#define ME_HFS_ERROR_DEBUG   4

Definition at line 35 of file me.h.

◆ ME_HFS_ERROR_IMAGE

#define ME_HFS_ERROR_IMAGE   3

Definition at line 34 of file me.h.

◆ ME_HFS_ERROR_NONE

#define ME_HFS_ERROR_NONE   0

Definition at line 32 of file me.h.

◆ ME_HFS_ERROR_UNCAT

#define ME_HFS_ERROR_UNCAT   1

Definition at line 33 of file me.h.

◆ ME_HFS_MODE_DEBUG

#define ME_HFS_MODE_DEBUG   2

Definition at line 37 of file me.h.

◆ ME_HFS_MODE_DIS

#define ME_HFS_MODE_DIS   3

Definition at line 38 of file me.h.

◆ ME_HFS_MODE_NORMAL

#define ME_HFS_MODE_NORMAL   0

Definition at line 36 of file me.h.

◆ ME_HFS_MODE_OVER_JMPR

#define ME_HFS_MODE_OVER_JMPR   4

Definition at line 39 of file me.h.

◆ ME_HFS_MODE_OVER_MEI

#define ME_HFS_MODE_OVER_MEI   5

Definition at line 40 of file me.h.

◆ ME_HFS_STATE_BRINGUP

#define ME_HFS_STATE_BRINGUP   6

Definition at line 30 of file me.h.

◆ ME_HFS_STATE_ERROR

#define ME_HFS_STATE_ERROR   7

Definition at line 31 of file me.h.

◆ ME_HFS_STATE_M0

#define ME_HFS_STATE_M0   5

Definition at line 29 of file me.h.

◆ ME_HFS_STATE_M0_UMA

#define ME_HFS_STATE_M0_UMA   1

Definition at line 27 of file me.h.

◆ ME_HFS_STATE_M3

#define ME_HFS_STATE_M3   4

Definition at line 28 of file me.h.

◆ ME_HFS_STATE_PREBOOT

#define ME_HFS_STATE_PREBOOT   0

Definition at line 26 of file me.h.

◆ ME_HSIO_CMD_CLOSE

#define ME_HSIO_CMD_CLOSE   0

Definition at line 86 of file me.h.

◆ ME_HSIO_CMD_GETHSIOVER

#define ME_HSIO_CMD_GETHSIOVER   1

Definition at line 85 of file me.h.

◆ ME_HSIO_MESSAGE

#define ME_HSIO_MESSAGE   (7 << 28)

Definition at line 84 of file me.h.

◆ ME_INIT_DONE

#define ME_INIT_DONE   1

Definition at line 78 of file me.h.

◆ ME_INIT_STATUS_ERROR

#define ME_INIT_STATUS_ERROR   2

Definition at line 81 of file me.h.

◆ ME_INIT_STATUS_NOMEM

#define ME_INIT_STATUS_NOMEM   1

Definition at line 80 of file me.h.

◆ ME_INIT_STATUS_SUCCESS

#define ME_INIT_STATUS_SUCCESS   0

Definition at line 79 of file me.h.

◆ ME_INIT_STATUS_SUCCESS_OTHER

#define ME_INIT_STATUS_SUCCESS_OTHER   3 /* SEE ME9 BWG */

Definition at line 82 of file me.h.

◆ ME_RETRY

#define ME_RETRY   100000 /* 1 second */

Definition at line 8 of file me.h.

◆ MEI_ADDRESS_AMT

#define MEI_ADDRESS_AMT   0x02

Definition at line 226 of file me.h.

◆ MEI_ADDRESS_CORE

#define MEI_ADDRESS_CORE   0x01

Definition at line 225 of file me.h.

◆ MEI_ADDRESS_ICC

#define MEI_ADDRESS_ICC   0x08

Definition at line 230 of file me.h.

◆ MEI_ADDRESS_MKHI

#define MEI_ADDRESS_MKHI   0x07

Definition at line 229 of file me.h.

◆ MEI_ADDRESS_RESERVED

#define MEI_ADDRESS_RESERVED   0x03

Definition at line 227 of file me.h.

◆ MEI_ADDRESS_THERMAL

#define MEI_ADDRESS_THERMAL   0x09

Definition at line 231 of file me.h.

◆ MEI_ADDRESS_WDT

#define MEI_ADDRESS_WDT   0x04

Definition at line 228 of file me.h.

◆ MEI_H_CB_WW

#define MEI_H_CB_WW   0x00

Definition at line 208 of file me.h.

◆ MEI_H_CSR

#define MEI_H_CSR   0x04

Definition at line 209 of file me.h.

◆ MEI_HOST_ADDRESS

#define MEI_HOST_ADDRESS   0

Definition at line 233 of file me.h.

◆ MEI_ME_CB_RW

#define MEI_ME_CB_RW   0x08

Definition at line 210 of file me.h.

◆ MEI_ME_CSR_HA

#define MEI_ME_CSR_HA   0x0c

Definition at line 211 of file me.h.

◆ MKHI_END_OF_POST

#define MKHI_END_OF_POST   0x0c

Definition at line 254 of file me.h.

◆ MKHI_END_OF_POST_NOACK

#define MKHI_END_OF_POST_NOACK   0x1a

Definition at line 256 of file me.h.

◆ MKHI_FEATURE_OVERRIDE

#define MKHI_FEATURE_OVERRIDE   0x14

Definition at line 255 of file me.h.

◆ MKHI_FWCAPS_GET_RULE

#define MKHI_FWCAPS_GET_RULE   0x02

Definition at line 246 of file me.h.

◆ MKHI_GET_FW_VERSION

#define MKHI_GET_FW_VERSION   0x02

Definition at line 253 of file me.h.

◆ MKHI_GLOBAL_RESET

#define MKHI_GLOBAL_RESET   0x0b

Definition at line 244 of file me.h.

◆ MKHI_GROUP_ID_CBM

#define MKHI_GROUP_ID_CBM   0x00

Definition at line 243 of file me.h.

◆ MKHI_GROUP_ID_FWCAPS

#define MKHI_GROUP_ID_FWCAPS   0x03

Definition at line 245 of file me.h.

◆ MKHI_GROUP_ID_GEN

#define MKHI_GROUP_ID_GEN   0xff

Definition at line 252 of file me.h.

◆ MKHI_GROUP_ID_HMRFPO

#define MKHI_GROUP_ID_HMRFPO   0x05

Definition at line 247 of file me.h.

◆ MKHI_GROUP_ID_MDES

#define MKHI_GROUP_ID_MDES   0x08

Definition at line 250 of file me.h.

◆ MKHI_HMRFPO_LOCK

#define MKHI_HMRFPO_LOCK   0x02

Definition at line 248 of file me.h.

◆ MKHI_HMRFPO_LOCK_NOACK

#define MKHI_HMRFPO_LOCK_NOACK   0x05

Definition at line 249 of file me.h.

◆ MKHI_MDES_ENABLE

#define MKHI_MDES_ENABLE   0x09

Definition at line 251 of file me.h.

◆ PCI_CPU_MEBASE_H

#define PCI_CPU_MEBASE_H   0x74 /* Set by MRC */

Definition at line 16 of file me.h.

◆ PCI_CPU_MEBASE_L

#define PCI_CPU_MEBASE_L   0x70 /* Set by MRC */

Definition at line 15 of file me.h.

◆ PCI_ME_EXT_SHA1

#define PCI_ME_EXT_SHA1   0x00

Definition at line 193 of file me.h.

◆ PCI_ME_EXT_SHA256

#define PCI_ME_EXT_SHA256   0x02

Definition at line 194 of file me.h.

◆ PCI_ME_H_GS

#define PCI_ME_H_GS   0x4c

Definition at line 77 of file me.h.

◆ PCI_ME_H_GS2

#define PCI_ME_H_GS2   0x70

Definition at line 189 of file me.h.

◆ PCI_ME_HER

#define PCI_ME_HER (   x)    (0xc0+(4*(x)))

Definition at line 195 of file me.h.

◆ PCI_ME_HERES

#define PCI_ME_HERES   0xbc

Definition at line 192 of file me.h.

◆ PCI_ME_HFS

#define PCI_ME_HFS   0x40

Definition at line 18 of file me.h.

◆ PCI_ME_HFS2

#define PCI_ME_HFS2   0x48

Definition at line 100 of file me.h.

◆ PCI_ME_HFS5

#define PCI_ME_HFS5   0x68

Definition at line 187 of file me.h.

◆ PCI_ME_MBP_GIVE_UP

#define PCI_ME_MBP_GIVE_UP   0x01

Definition at line 190 of file me.h.

◆ PCI_ME_UMA

#define PCI_ME_UMA   0x44

Definition at line 67 of file me.h.

Enumeration Type Documentation

◆ me_bios_path

Enumerator
ME_NORMAL_BIOS_PATH 
ME_S3WAKE_BIOS_PATH 
ME_ERROR_BIOS_PATH 
ME_RECOVERY_BIOS_PATH 
ME_DISABLE_BIOS_PATH 
ME_FIRMWARE_UPDATE_BIOS_PATH 
ME_NORMAL_BIOS_PATH 
ME_S3WAKE_BIOS_PATH 
ME_ERROR_BIOS_PATH 
ME_RECOVERY_BIOS_PATH 
ME_DISABLE_BIOS_PATH 
ME_FIRMWARE_UPDATE_BIOS_PATH 
ME_NORMAL_BIOS_PATH 
ME_S3WAKE_BIOS_PATH 
ME_ERROR_BIOS_PATH 
ME_RECOVERY_BIOS_PATH 
ME_DISABLE_BIOS_PATH 
ME_FIRMWARE_UPDATE_BIOS_PATH 
ME_NORMAL_BIOS_PATH 
ME_S3WAKE_BIOS_PATH 
ME_ERROR_BIOS_PATH 
ME_RECOVERY_BIOS_PATH 
ME_DISABLE_BIOS_PATH 
ME_FIRMWARE_UPDATE_BIOS_PATH 

Definition at line 310 of file me.h.

Function Documentation

◆ intel_me_hsio_version()

void intel_me_hsio_version ( uint16_t version,
uint16_t checksum 
)

Definition at line 292 of file me_status.c.

References BIOS_DEBUG, BIOS_ERR, me_hfs::bios_msg_ack, checksum(), count, ME_DELAY, ME_HSIO_CMD_GETHSIOVER, ME_HSIO_MESSAGE, me_read_dword_ptr(), ME_RETRY, PCH_DEV_ME, PCI_ME_H_GS, PCI_ME_HFS, PCI_ME_HFS5, pci_read_config32(), pci_write_config32(), printk, udelay(), and version.

Referenced by mainboard_romstage_entry().

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◆ intel_me_status()

Variable Documentation

◆ __packed