coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
ramstage.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <bootstate.h>
6 #include <soc/ramstage.h>
7 
8 extern struct fru_info_str fru_strings;
9 
10 static const struct port_information SMBIOS_type8_info[] = {
11  /*
12  * Port Information fields:
13  * Internal Reference Designator,
14  * Internal Connector Type,
15  * External Reference Designator,
16  * External Connector_Type,
17  * Port Type
18  */
19  {
20  "J7F5 - BMC JTAG HEADER",
21  CONN_OTHER,
22  NULL,
23  CONN_NONE,
25  },
26  {
27  "J8A1 - MINISAS1",
29  NULL,
30  CONN_NONE,
31  TYPE_SAS
32  },
33  {
34  "J8A2 - MINISAS2",
36  NULL,
37  CONN_NONE,
38  TYPE_SAS
39  },
40  {
41  "J8A3 - SATA CONBINE1",
43  NULL,
44  CONN_NONE,
45  TYPE_SAS
46  },
47  {
48  "J8B1 - ME_DBG",
49  CONN_OTHER,
50  NULL,
51  CONN_NONE,
53  },
54  {
55  "J8D1 - VR_DBG",
56  CONN_OTHER,
57  NULL,
58  CONN_NONE,
60  },
61  {
62  "J8E1 - TPM_MODULE",
63  CONN_OTHER,
64  NULL,
65  CONN_NONE,
67  },
68  {
69  "J8F1 - M.2 CONNECTOR",
70  CONN_OTHER,
71  NULL,
72  CONN_NONE,
74  },
75  {
76  "J9A1 - SATA RAID KEY",
77  CONN_OTHER,
78  NULL,
79  CONN_NONE,
81  },
82  {
83  NULL,
84  CONN_NONE,
85  "J9A2 - DEBUG 80 PORT",
86  CONN_OTHER,
88  },
89  {
90  "J9A3 - CPU & PCH XDP",
91  CONN_OTHER,
92  NULL,
93  CONN_NONE,
95  },
96  {
97  NULL,
98  CONN_NONE,
99  "J9A5 - USB conn",
101  TYPE_USB
102  },
103  {
104  "J9B1 - BMC_DBG",
105  CONN_OTHER,
106  NULL,
107  CONN_NONE,
109  },
110  {
111  NULL,
112  CONN_NONE,
113  "J9D1 - USB3.0 TYPE C",
115  TYPE_USB
116  },
117  {
118  NULL,
119  CONN_NONE,
120  "J9E1 - VGA",
121  CONN_OTHER,
123  },
124  {
125  NULL,
126  CONN_NONE,
127  "JA9G1 - ETH0",
128  CONN_RJ_45,
130  },
131 };
132 
134 {
135 }
136 
137 #if CONFIG(GENERATE_SMBIOS_TABLES)
138 static int mainboard_smbios_data(struct device *dev, int *handle, unsigned long *current)
139 {
140  int len = 0;
141 
142  // add port information
143  len += smbios_write_type8(
144  current, handle,
147  );
148 
149  return len;
150 }
151 #endif
152 
153 static void tp_oem_smbios_strings(struct device *dev, struct smbios_type11 *t)
154 {
155  /* OEM string 1 to 6 */
156  ocp_oem_smbios_strings(dev, t);
157 
158  /* OEM string 7 */
163  else
165 }
166 
167 static void mainboard_enable(struct device *dev)
168 {
169  dev->ops->get_smbios_strings = tp_oem_smbios_strings,
170  read_fru_areas(CONFIG_BMC_KCS_BASE, CONFIG_FRU_DEVICE_ID, 0, &fru_strings);
171 #if CONFIG(GENERATE_SMBIOS_TABLES)
172  dev->ops->get_smbios_data = mainboard_smbios_data;
173 #endif
174 }
175 
176 static void mainboard_final(void *chip_info)
177 {
178 }
179 
182  .final = mainboard_final,
183 };
int smbios_write_type8(unsigned long *current, int *handle, const struct port_information *port, size_t num_ports)
Definition: smbios.c:812
static struct sdram_info params
Definition: sdram_configs.c:83
#define ARRAY_SIZE(a)
Definition: helpers.h:12
__weak void mainboard_silicon_init_params(SILICON_INIT_UPD *params)
Definition: ramstage.c:162
@ CONN_RJ_45
Definition: smbios.h:574
@ CONN_OTHER
Definition: smbios.h:604
@ CONN_ACCESS_BUS_USB
Definition: smbios.h:581
@ CONN_SAS_SATA
Definition: smbios.h:597
@ CONN_NONE
Definition: smbios.h:563
@ TYPE_NETWORK_PORT
Definition: smbios.h:640
@ TYPE_SAS
Definition: smbios.h:642
@ TYPE_USB
Definition: smbios.h:625
@ TYPE_OTHER_PORT
Definition: smbios.h:647
void read_fru_areas(const int port, const uint8_t id, uint16_t offset, struct fru_info_str *fru_info_str)
Definition: ipmi_fru.c:422
struct chip_operations mainboard_ops
Definition: ramstage.c:11
static int mainboard_smbios_data(struct device *dev, int *handle, unsigned long *current)
Definition: ramstage.c:299
struct fru_info_str fru_strings
Definition: smbios.c:20
static const struct port_information SMBIOS_type8_info[]
Definition: ramstage.c:10
static void mainboard_final(void *chip_info)
Definition: ramstage.c:176
static void tp_oem_smbios_strings(struct device *dev, struct smbios_type11 *t)
Definition: ramstage.c:153
static void mainboard_enable(struct device *dev)
Definition: ramstage.c:167
void ocp_oem_smbios_strings(struct device *dev, struct smbios_type11 *t)
Definition: smbios.c:207
#define TBF
Definition: ocp_dmi.h:10
int smbios_add_oem_string(u8 *start, const char *str)
Definition: smbios.c:164
#define NULL
Definition: stddef.h:19
void(* enable_dev)(struct device *dev)
Definition: device.h:24
Definition: device.h:107
struct device_operations * ops
Definition: device.h:143
size_t custom_count
Definition: ipmi_ops.h:124
char ** board_custom
Definition: ipmi_ops.h:123
struct fru_board_info board_info
Definition: ipmi_ops.h:137
u8 eos[2]
Definition: smbios.h:815