coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
Macros | Functions
sor.c File Reference
#include <boot/tables.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
#include <soc/addressmap.h>
#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/display.h>
#include <soc/nvidia/tegra/dc.h>
#include <soc/nvidia/tegra/displayport.h>
#include <soc/sor.h>
#include <stdint.h>
#include "chip.h"
Include dependency graph for sor.c:

Go to the source code of this file.

Macros

#define DEBUG_SOR   0
 
#define APBDEV_PMC_DPD_SAMPLE   (0x20)
 
#define APBDEV_PMC_DPD_SAMPLE_ON_DISABLE   (0)
 
#define APBDEV_PMC_DPD_SAMPLE_ON_ENABLE   (1)
 
#define APBDEV_PMC_SEL_DPD_TIM   (0x1c8)
 
#define APBDEV_PMC_SEL_DPD_TIM_SEL_DPD_TIM_DEFAULT   (0x7f)
 
#define APBDEV_PMC_IO_DPD2_REQ   (0x1c0)
 
#define APBDEV_PMC_IO_DPD2_REQ_LVDS_SHIFT   (25)
 
#define APBDEV_PMC_IO_DPD2_REQ_LVDS_OFF   (0 << 25)
 
#define APBDEV_PMC_IO_DPD2_REQ_LVDS_ON   (1 << 25)
 
#define APBDEV_PMC_IO_DPD2_REQ_CODE_SHIFT   (30)
 
#define APBDEV_PMC_IO_DPD2_REQ_CODE_DEFAULT_MASK   (0x3 << 30)
 
#define APBDEV_PMC_IO_DPD2_REQ_CODE_IDLE   (0 << 30)
 
#define APBDEV_PMC_IO_DPD2_REQ_CODE_DPD_OFF   (1 << 30)
 
#define APBDEV_PMC_IO_DPD2_REQ_CODE_DPD_ON   (2 << 30)
 
#define APBDEV_PMC_IO_DPD2_STATUS   (0x1c4)
 
#define APBDEV_PMC_IO_DPD2_STATUS_LVDS_SHIFT   (25)
 
#define APBDEV_PMC_IO_DPD2_STATUS_LVDS_OFF   (0 << 25)
 
#define APBDEV_PMC_IO_DPD2_STATUS_LVDS_ON   (1 << 25)
 

Functions

static u32 tegra_sor_readl (struct tegra_dc_sor_data *sor, u32 reg)
 
static void tegra_sor_writel (struct tegra_dc_sor_data *sor, u32 reg, u32 val)
 
static void tegra_sor_write_field (struct tegra_dc_sor_data *sor, u32 reg, u32 mask, u32 val)
 
void tegra_dp_disable_tx_pu (struct tegra_dc_sor_data *sor)
 
void tegra_dp_set_pe_vs_pc (struct tegra_dc_sor_data *sor, u32 mask, u32 pe_reg, u32 vs_reg, u32 pc_reg, u8 pc_supported)
 
static u32 tegra_dc_sor_poll_register (struct tegra_dc_sor_data *sor, u32 reg, u32 mask, u32 exp_val, u32 poll_interval_us, u32 timeout_us)
 
int tegra_dc_sor_set_power_state (struct tegra_dc_sor_data *sor, int pu_pd)
 
void tegra_dc_sor_set_dp_linkctl (struct tegra_dc_sor_data *sor, int ena, u8 training_pattern, const struct tegra_dc_dp_link_config *link_cfg)
 
static int tegra_dc_sor_enable_lane_sequencer (struct tegra_dc_sor_data *sor, int pu, int is_lvds)
 
static int tegra_dc_sor_power_dplanes (struct tegra_dc_sor_data *sor, u32 lane_count, int pu)
 
void tegra_dc_sor_set_panel_power (struct tegra_dc_sor_data *sor, int power_up)
 
static void tegra_dc_sor_config_pwm (struct tegra_dc_sor_data *sor, u32 pwm_div, u32 pwm_dutycycle)
 
static void tegra_dc_sor_set_dp_mode (struct tegra_dc_sor_data *sor, const struct tegra_dc_dp_link_config *link_cfg)
 
static void tegra_dc_sor_super_update (struct tegra_dc_sor_data *sor)
 
static void tegra_dc_sor_update (struct tegra_dc_sor_data *sor)
 
static void tegra_dc_sor_io_set_dpd (struct tegra_dc_sor_data *sor, int up)
 
void tegra_dc_sor_set_internal_panel (struct tegra_dc_sor_data *sor, int is_int)
 
void tegra_dc_sor_read_link_config (struct tegra_dc_sor_data *sor, u8 *link_bw, u8 *lane_count)
 
void tegra_dc_sor_set_link_bandwidth (struct tegra_dc_sor_data *sor, u8 link_bw)
 
void tegra_dc_sor_set_lane_count (struct tegra_dc_sor_data *sor, u8 lane_count)
 
static void tegra_sor_enable_edp_clock (struct tegra_dc_sor_data *sor)
 
static void tegra_dc_sor_power_up (struct tegra_dc_sor_data *sor, int is_lvds)
 
static void tegra_dc_sor_config_panel (struct tegra_dc_sor_data *sor, int is_lvds)
 
static void tegra_dc_sor_enable_dc (struct tegra_dc_sor_data *sor)
 
void tegra_dc_sor_enable_dp (struct tegra_dc_sor_data *sor)
 
void tegra_dc_sor_attach (struct tegra_dc_sor_data *sor)
 
void tegra_dc_sor_set_lane_parm (struct tegra_dc_sor_data *sor, const struct tegra_dc_dp_link_config *link_cfg)
 
void tegra_dc_sor_set_voltage_swing (struct tegra_dc_sor_data *sor)
 
void tegra_dc_sor_power_down_unused_lanes (struct tegra_dc_sor_data *sor)
 
void tegra_sor_precharge_lanes (struct tegra_dc_sor_data *sor)
 

Macro Definition Documentation

◆ APBDEV_PMC_DPD_SAMPLE

#define APBDEV_PMC_DPD_SAMPLE   (0x20)

Definition at line 24 of file sor.c.

◆ APBDEV_PMC_DPD_SAMPLE_ON_DISABLE

#define APBDEV_PMC_DPD_SAMPLE_ON_DISABLE   (0)

Definition at line 25 of file sor.c.

◆ APBDEV_PMC_DPD_SAMPLE_ON_ENABLE

#define APBDEV_PMC_DPD_SAMPLE_ON_ENABLE   (1)

Definition at line 26 of file sor.c.

◆ APBDEV_PMC_IO_DPD2_REQ

#define APBDEV_PMC_IO_DPD2_REQ   (0x1c0)

Definition at line 29 of file sor.c.

◆ APBDEV_PMC_IO_DPD2_REQ_CODE_DEFAULT_MASK

#define APBDEV_PMC_IO_DPD2_REQ_CODE_DEFAULT_MASK   (0x3 << 30)

Definition at line 34 of file sor.c.

◆ APBDEV_PMC_IO_DPD2_REQ_CODE_DPD_OFF

#define APBDEV_PMC_IO_DPD2_REQ_CODE_DPD_OFF   (1 << 30)

Definition at line 36 of file sor.c.

◆ APBDEV_PMC_IO_DPD2_REQ_CODE_DPD_ON

#define APBDEV_PMC_IO_DPD2_REQ_CODE_DPD_ON   (2 << 30)

Definition at line 37 of file sor.c.

◆ APBDEV_PMC_IO_DPD2_REQ_CODE_IDLE

#define APBDEV_PMC_IO_DPD2_REQ_CODE_IDLE   (0 << 30)

Definition at line 35 of file sor.c.

◆ APBDEV_PMC_IO_DPD2_REQ_CODE_SHIFT

#define APBDEV_PMC_IO_DPD2_REQ_CODE_SHIFT   (30)

Definition at line 33 of file sor.c.

◆ APBDEV_PMC_IO_DPD2_REQ_LVDS_OFF

#define APBDEV_PMC_IO_DPD2_REQ_LVDS_OFF   (0 << 25)

Definition at line 31 of file sor.c.

◆ APBDEV_PMC_IO_DPD2_REQ_LVDS_ON

#define APBDEV_PMC_IO_DPD2_REQ_LVDS_ON   (1 << 25)

Definition at line 32 of file sor.c.

◆ APBDEV_PMC_IO_DPD2_REQ_LVDS_SHIFT

#define APBDEV_PMC_IO_DPD2_REQ_LVDS_SHIFT   (25)

Definition at line 30 of file sor.c.

◆ APBDEV_PMC_IO_DPD2_STATUS

#define APBDEV_PMC_IO_DPD2_STATUS   (0x1c4)

Definition at line 38 of file sor.c.

◆ APBDEV_PMC_IO_DPD2_STATUS_LVDS_OFF

#define APBDEV_PMC_IO_DPD2_STATUS_LVDS_OFF   (0 << 25)

Definition at line 40 of file sor.c.

◆ APBDEV_PMC_IO_DPD2_STATUS_LVDS_ON

#define APBDEV_PMC_IO_DPD2_STATUS_LVDS_ON   (1 << 25)

Definition at line 41 of file sor.c.

◆ APBDEV_PMC_IO_DPD2_STATUS_LVDS_SHIFT

#define APBDEV_PMC_IO_DPD2_STATUS_LVDS_SHIFT   (25)

Definition at line 39 of file sor.c.

◆ APBDEV_PMC_SEL_DPD_TIM

#define APBDEV_PMC_SEL_DPD_TIM   (0x1c8)

Definition at line 27 of file sor.c.

◆ APBDEV_PMC_SEL_DPD_TIM_SEL_DPD_TIM_DEFAULT

#define APBDEV_PMC_SEL_DPD_TIM_SEL_DPD_TIM_DEFAULT   (0x7f)

Definition at line 28 of file sor.c.

◆ DEBUG_SOR

#define DEBUG_SOR   0

Definition at line 22 of file sor.c.

Function Documentation

◆ tegra_dc_sor_attach()

void tegra_dc_sor_attach ( struct tegra_dc_sor_data *  sor)

Definition at line 728 of file sor.c.

◆ tegra_dc_sor_config_panel()

static void tegra_dc_sor_config_panel ( struct tegra_dc_sor_data *  sor,
int  is_lvds 
)
static

Definition at line 587 of file sor.c.

References tegra_dc_dp_link_config::bits_per_pixel, config, tegra_dc::config, tegra_dc_dp_data::dc, tegra_dc_sor_data::dc, hsync_end, htotal, tegra_dc_dp_data::link_cfg, NV_HEAD_STATE1, NV_HEAD_STATE1_HTOTAL_SHIFT, NV_HEAD_STATE1_VTOTAL_SHIFT, NV_HEAD_STATE2, NV_HEAD_STATE2_HSYNC_END_SHIFT, NV_HEAD_STATE2_VSYNC_END_SHIFT, NV_HEAD_STATE3, NV_HEAD_STATE3_HBLANK_END_SHIFT, NV_HEAD_STATE3_VBLANK_END_SHIFT, NV_HEAD_STATE4, NV_HEAD_STATE4_HBLANK_START_SHIFT, NV_HEAD_STATE4_VBLANK_START_SHIFT, NV_HEAD_STATE5, NV_SOR_CSTM, NV_SOR_CSTM_LVDS_EN_DISABLE, NV_SOR_CSTM_LVDS_EN_ENABLE, NV_SOR_CSTM_ROTCLK_DEFAULT_MASK, NV_SOR_CSTM_ROTCLK_SHIFT, NV_SOR_STATE1, NV_SOR_STATE1_ASY_CRCMODE_COMPLETE_RASTER, NV_SOR_STATE1_ASY_HSYNCPOL_NEGATIVE_TRUE, NV_SOR_STATE1_ASY_OWNER_HEAD0, NV_SOR_STATE1_ASY_PIXELDEPTH_BPP_18_444, NV_SOR_STATE1_ASY_PIXELDEPTH_BPP_24_444, NV_SOR_STATE1_ASY_PROTOCOL_DP_A, NV_SOR_STATE1_ASY_PROTOCOL_LVDS_CUSTOM, NV_SOR_STATE1_ASY_SUBOWNER_NONE, NV_SOR_STATE1_ASY_VSYNCPOL_NEGATIVE_TRUE, tegra_dc::out, tegra_dc_sor_config_pwm(), tegra_sor_write_field(), tegra_sor_writel(), and vtotal.

Referenced by tegra_dc_sor_attach().

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◆ tegra_dc_sor_config_pwm()

static void tegra_dc_sor_config_pwm ( struct tegra_dc_sor_data *  sor,
u32  pwm_div,
u32  pwm_dutycycle 
)
static

Definition at line 260 of file sor.c.

References BIOS_ERR, NV_SOR_PWM_CTL, NV_SOR_PWM_CTL_DUTY_CYCLE_MASK, NV_SOR_PWM_CTL_SETTING_NEW_DONE, NV_SOR_PWM_CTL_SETTING_NEW_SHIFT, NV_SOR_PWM_CTL_SETTING_NEW_TRIGGER, NV_SOR_PWM_DIV, printk, tegra_dc_sor_poll_register(), TEGRA_SOR_TIMEOUT_MS, and tegra_sor_writel().

Referenced by tegra_dc_sor_config_panel().

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◆ tegra_dc_sor_enable_dc()

static void tegra_dc_sor_enable_dc ( struct tegra_dc_sor_data *  sor)
static

Definition at line 657 of file sor.c.

References tegra_dc::base, display_controller::cmd, tegra_dc_sor_data::dc, display_controller::disp, dc_cmd_reg::disp_cmd, DISP_CTRL_MODE_C_DISPLAY, dc_disp_reg::disp_timing_opt, READL(), dc_cmd_reg::state_access, VSYNC_H_POSITION, WRITE_MUX_ACTIVE, and WRITEL().

Referenced by tegra_dc_sor_attach().

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◆ tegra_dc_sor_enable_dp()

void tegra_dc_sor_enable_dp ( struct tegra_dc_sor_data *  sor)

Definition at line 672 of file sor.c.

◆ tegra_dc_sor_enable_lane_sequencer()

static int tegra_dc_sor_enable_lane_sequencer ( struct tegra_dc_sor_data *  sor,
int  pu,
int  is_lvds 
)
static

Definition at line 177 of file sor.c.

References BIOS_ERR, NV_SOR_LANE_SEQ_CTL, NV_SOR_LANE_SEQ_CTL_DELAY_SHIFT, NV_SOR_LANE_SEQ_CTL_NEW_POWER_STATE_PD, NV_SOR_LANE_SEQ_CTL_NEW_POWER_STATE_PU, NV_SOR_LANE_SEQ_CTL_SEQUENCE_DOWN, NV_SOR_LANE_SEQ_CTL_SEQUENCE_UP, NV_SOR_LANE_SEQ_CTL_SETTING_MASK, NV_SOR_LANE_SEQ_CTL_SETTING_NEW_DONE, NV_SOR_LANE_SEQ_CTL_SETTING_NEW_TRIGGER, printk, tegra_dc_sor_poll_register(), TEGRA_SOR_TIMEOUT_MS, and tegra_sor_writel().

Referenced by tegra_dc_sor_power_down_unused_lanes(), and tegra_dc_sor_power_dplanes().

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◆ tegra_dc_sor_io_set_dpd()

static void tegra_dc_sor_io_set_dpd ( struct tegra_dc_sor_data *  sor,
int  up 
)
static

Definition at line 325 of file sor.c.

References APBDEV_PMC_DPD_SAMPLE, APBDEV_PMC_DPD_SAMPLE_ON_DISABLE, APBDEV_PMC_DPD_SAMPLE_ON_ENABLE, APBDEV_PMC_IO_DPD2_REQ, APBDEV_PMC_IO_DPD2_REQ_CODE_DEFAULT_MASK, APBDEV_PMC_IO_DPD2_REQ_CODE_DPD_OFF, APBDEV_PMC_IO_DPD2_REQ_CODE_DPD_ON, APBDEV_PMC_IO_DPD2_REQ_LVDS_OFF, APBDEV_PMC_IO_DPD2_REQ_LVDS_ON, APBDEV_PMC_IO_DPD2_STATUS, APBDEV_PMC_IO_DPD2_STATUS_LVDS_ON, APBDEV_PMC_SEL_DPD_TIM, BIOS_ERR, tegra_dc_sor_data::pmc_base, printk, READL(), udelay(), and WRITEL().

Referenced by tegra_dc_sor_power_up().

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◆ tegra_dc_sor_poll_register()

static u32 tegra_dc_sor_poll_register ( struct tegra_dc_sor_data *  sor,
u32  reg,
u32  mask,
u32  exp_val,
u32  poll_interval_us,
u32  timeout_us 
)
static

Definition at line 88 of file sor.c.

References BIOS_ERR, mask, printk, tegra_sor_readl(), and udelay().

Referenced by tegra_dc_sor_attach(), tegra_dc_sor_config_pwm(), tegra_dc_sor_enable_dp(), tegra_dc_sor_enable_lane_sequencer(), and tegra_dc_sor_set_power_state().

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◆ tegra_dc_sor_power_down_unused_lanes()

void tegra_dc_sor_power_down_unused_lanes ( struct tegra_dc_sor_data *  sor)

Definition at line 844 of file sor.c.

◆ tegra_dc_sor_power_dplanes()

static int tegra_dc_sor_power_dplanes ( struct tegra_dc_sor_data *  sor,
u32  lane_count,
int  pu 
)
static

Definition at line 211 of file sor.c.

References __fallthrough, BIOS_ERR, NV_SOR_DP_PADCTL, NV_SOR_DP_PADCTL_PD_TXD_0_NO, NV_SOR_DP_PADCTL_PD_TXD_1_NO, NV_SOR_DP_PADCTL_PD_TXD_2_NO, NV_SOR_DP_PADCTL_PD_TXD_3_NO, tegra_dc_sor_data::portnum, printk, tegra_dc_sor_enable_lane_sequencer(), tegra_dc_sor_set_lane_count(), tegra_sor_readl(), and tegra_sor_writel().

Referenced by tegra_dc_sor_enable_dp().

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◆ tegra_dc_sor_power_up()

static void tegra_dc_sor_power_up ( struct tegra_dc_sor_data *  sor,
int  is_lvds 
)
static

Definition at line 459 of file sor.c.

References NV_SOR_CLK_CNTRL_DP_LINK_SPEED_G1_62, NV_SOR_CLK_CNTRL_DP_LINK_SPEED_LVDS, NV_SOR_DP_PADCTL, NV_SOR_DP_PADCTL_PAD_CAL_PD_POWERDOWN, NV_SOR_PLL0, NV_SOR_PLL0_PWR_MASK, NV_SOR_PLL0_PWR_OFF, NV_SOR_PLL0_PWR_ON, NV_SOR_PLL0_VCOPD_ASSERT, NV_SOR_PLL0_VCOPD_MASK, NV_SOR_PLL0_VCOPD_RESCIND, NV_SOR_PLL2, NV_SOR_PLL2_AUX6_BANDGAP_POWERDOWN_DISABLE, NV_SOR_PLL2_AUX6_BANDGAP_POWERDOWN_ENABLE, NV_SOR_PLL2_AUX6_BANDGAP_POWERDOWN_MASK, NV_SOR_PLL2_AUX7_PORT_POWERDOWN_DISABLE, NV_SOR_PLL2_AUX7_PORT_POWERDOWN_ENABLE, NV_SOR_PLL2_AUX7_PORT_POWERDOWN_MASK, NV_SOR_PLL2_AUX8_SEQ_PLLCAPPD_ENFORCE_DISABLE, NV_SOR_PLL2_AUX8_SEQ_PLLCAPPD_ENFORCE_ENABLE, NV_SOR_PLL2_AUX8_SEQ_PLLCAPPD_ENFORCE_MASK, tegra_dc_sor_data::portnum, tegra_dc_sor_data::power_is_up, tegra_dc_sor_io_set_dpd(), tegra_dc_sor_set_link_bandwidth(), tegra_sor_write_field(), and udelay().

Referenced by tegra_dc_sor_enable_dp().

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◆ tegra_dc_sor_read_link_config()

void tegra_dc_sor_read_link_config ( struct tegra_dc_sor_data *  sor,
u8 *  link_bw,
u8 *  lane_count 
)

Definition at line 382 of file sor.c.

◆ tegra_dc_sor_set_dp_linkctl()

void tegra_dc_sor_set_dp_linkctl ( struct tegra_dc_sor_data *  sor,
int  ena,
u8  training_pattern,
const struct tegra_dc_dp_link_config *  link_cfg 
)

Definition at line 141 of file sor.c.

Referenced by tegra_dc_sor_set_dp_mode().

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◆ tegra_dc_sor_set_dp_mode()

static void tegra_dc_sor_set_dp_mode ( struct tegra_dc_sor_data *  sor,
const struct tegra_dc_dp_link_config *  link_cfg 
)
static

Definition at line 277 of file sor.c.

References tegra_dc_dp_link_config::active_count, tegra_dc_dp_link_config::active_frac, tegra_dc_dp_link_config::activepolarity, tegra_dc_dp_link_config::hblank_sym, tegra_dc_dp_link_config::link_bw, NV_SOR_DP_AUDIO_HBLANK_SYMBOLS, NV_SOR_DP_AUDIO_HBLANK_SYMBOLS_MASK, NV_SOR_DP_AUDIO_VBLANK_SYMBOLS, NV_SOR_DP_AUDIO_VBLANK_SYMBOLS_MASK, NV_SOR_DP_CONFIG, NV_SOR_DP_CONFIG_ACTIVESYM_CNTL_ENABLE, NV_SOR_DP_CONFIG_ACTIVESYM_COUNT_MASK, NV_SOR_DP_CONFIG_ACTIVESYM_COUNT_SHIFT, NV_SOR_DP_CONFIG_ACTIVESYM_FRAC_MASK, NV_SOR_DP_CONFIG_ACTIVESYM_FRAC_SHIFT, NV_SOR_DP_CONFIG_ACTIVESYM_POLARITY_POSITIVE, NV_SOR_DP_CONFIG_RD_RESET_VAL_NEGATIVE, NV_SOR_DP_CONFIG_WATERMARK_MASK, tegra_dc_sor_data::portnum, tegra_dc_sor_set_dp_linkctl(), tegra_dc_sor_set_link_bandwidth(), tegra_sor_readl(), tegra_sor_write_field(), tegra_sor_writel(), training_pattern_none, tegra_dc_dp_link_config::vblank_sym, and tegra_dc_dp_link_config::watermark.

Referenced by tegra_dc_sor_enable_dp().

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◆ tegra_dc_sor_set_internal_panel()

void tegra_dc_sor_set_internal_panel ( struct tegra_dc_sor_data *  sor,
int  is_int 
)

Definition at line 367 of file sor.c.

◆ tegra_dc_sor_set_lane_count()

void tegra_dc_sor_set_lane_count ( struct tegra_dc_sor_data *  sor,
u8  lane_count 
)

Definition at line 418 of file sor.c.

Referenced by tegra_dc_sor_power_dplanes(), and tegra_dc_sor_set_lane_parm().

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◆ tegra_dc_sor_set_lane_parm()

void tegra_dc_sor_set_lane_parm ( struct tegra_dc_sor_data *  sor,
const struct tegra_dc_dp_link_config *  link_cfg 
)

Definition at line 789 of file sor.c.

◆ tegra_dc_sor_set_link_bandwidth()

void tegra_dc_sor_set_link_bandwidth ( struct tegra_dc_sor_data *  sor,
u8  link_bw 
)

Definition at line 411 of file sor.c.

Referenced by tegra_dc_sor_power_up(), tegra_dc_sor_set_dp_mode(), and tegra_dc_sor_set_lane_parm().

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◆ tegra_dc_sor_set_panel_power()

void tegra_dc_sor_set_panel_power ( struct tegra_dc_sor_data *  sor,
int  power_up 
)

Definition at line 242 of file sor.c.

◆ tegra_dc_sor_set_power_state()

int tegra_dc_sor_set_power_state ( struct tegra_dc_sor_data *  sor,
int  pu_pd 
)

Definition at line 113 of file sor.c.

◆ tegra_dc_sor_set_voltage_swing()

void tegra_dc_sor_set_voltage_swing ( struct tegra_dc_sor_data *  sor)

Definition at line 818 of file sor.c.

◆ tegra_dc_sor_super_update()

static void tegra_dc_sor_super_update ( struct tegra_dc_sor_data *  sor)
inlinestatic

Definition at line 311 of file sor.c.

References NV_SOR_SUPER_STATE0, and tegra_sor_writel().

Referenced by tegra_dc_sor_attach().

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◆ tegra_dc_sor_update()

static void tegra_dc_sor_update ( struct tegra_dc_sor_data *  sor)
inlinestatic

Definition at line 318 of file sor.c.

References NV_SOR_STATE0, and tegra_sor_writel().

Referenced by tegra_dc_sor_attach().

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◆ tegra_dp_disable_tx_pu()

void tegra_dp_disable_tx_pu ( struct tegra_dc_sor_data *  sor)

Definition at line 66 of file sor.c.

◆ tegra_dp_set_pe_vs_pc()

void tegra_dp_set_pe_vs_pc ( struct tegra_dc_sor_data *  sor,
u32  mask,
u32  pe_reg,
u32  vs_reg,
u32  pc_reg,
u8  pc_supported 
)

Definition at line 74 of file sor.c.

◆ tegra_sor_enable_edp_clock()

static void tegra_sor_enable_edp_clock ( struct tegra_dc_sor_data *  sor)
static

Definition at line 445 of file sor.c.

References sor_clock_start().

Referenced by tegra_dc_sor_enable_dp().

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◆ tegra_sor_precharge_lanes()

void tegra_sor_precharge_lanes ( struct tegra_dc_sor_data *  sor)

Definition at line 885 of file sor.c.

◆ tegra_sor_readl()

static u32 tegra_sor_readl ( struct tegra_dc_sor_data *  sor,
u32  reg 
)
inlinestatic

Definition at line 43 of file sor.c.

References addr, tegra_dc_sor_data::base, and READL().

Referenced by tegra_dc_sor_attach(), tegra_dc_sor_poll_register(), tegra_dc_sor_power_dplanes(), tegra_dc_sor_read_link_config(), tegra_dc_sor_set_dp_linkctl(), tegra_dc_sor_set_dp_mode(), tegra_dc_sor_set_internal_panel(), tegra_dc_sor_set_lane_count(), tegra_dc_sor_set_panel_power(), tegra_dc_sor_set_power_state(), and tegra_sor_write_field().

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◆ tegra_sor_write_field()

static void tegra_sor_write_field ( struct tegra_dc_sor_data *  sor,
u32  reg,
u32  mask,
u32  val 
)
inlinestatic

Definition at line 57 of file sor.c.

References mask, tegra_sor_readl(), tegra_sor_writel(), and val.

Referenced by tegra_dc_sor_config_panel(), tegra_dc_sor_enable_dp(), tegra_dc_sor_power_up(), tegra_dc_sor_set_dp_mode(), tegra_dc_sor_set_lane_parm(), tegra_dc_sor_set_link_bandwidth(), tegra_dp_disable_tx_pu(), tegra_dp_set_pe_vs_pc(), and tegra_sor_precharge_lanes().

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◆ tegra_sor_writel()

static void tegra_sor_writel ( struct tegra_dc_sor_data *  sor,
u32  reg,
u32  val 
)
inlinestatic

Definition at line 50 of file sor.c.

References addr, tegra_dc_sor_data::base, val, and WRITEL().

Referenced by tegra_dc_sor_attach(), tegra_dc_sor_config_panel(), tegra_dc_sor_config_pwm(), tegra_dc_sor_enable_dp(), tegra_dc_sor_enable_lane_sequencer(), tegra_dc_sor_power_down_unused_lanes(), tegra_dc_sor_power_dplanes(), tegra_dc_sor_set_dp_linkctl(), tegra_dc_sor_set_dp_mode(), tegra_dc_sor_set_internal_panel(), tegra_dc_sor_set_lane_count(), tegra_dc_sor_set_lane_parm(), tegra_dc_sor_set_panel_power(), tegra_dc_sor_set_power_state(), tegra_dc_sor_set_voltage_swing(), tegra_dc_sor_super_update(), tegra_dc_sor_update(), and tegra_sor_write_field().

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