romstage.c File Reference

#include <stddef.h>
#include <acpi/acpi.h>
#include <assert.h>
#include <console/console.h>
#include <cbmem.h>
#include <cf9_reset.h>
#include <cpu/intel/microcode.h>
#include <ec/google/chromeec/ec.h>
#include <ec/google/chromeec/ec_commands.h>
#include <elog.h>
#include <fsp/romstage.h>
#include <mrc_cache.h>
#include <program_loading.h>
#include <romstage_handoff.h>
#include <smbios.h>
#include <stage_cache.h>
#include <string.h>
#include <timestamp.h>

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Functions
static void	raminit_common (struct romstage_params *params)
void	cache_as_ram_stage_main (FSP_INFO_HEADER *fih)
__weak void	mainboard_pre_raminit (struct romstage_params *params)
__weak void	mainboard_save_dimm_info (struct romstage_params *params)

Function Documentation

cache_as_ram_stage_main()

void cache_as_ram_stage_main

(

FSP_INFO_HEADER *

fih

)

Definition at line 95 of file romstage.c.

References BIOS_INFO, BIOS_SPEW, CONFIG, fill_power_state(), fsp_version, mainboard_pre_raminit(), params, post_code, print_fsp_info(), printk, raminit_common(), soc_after_ram_init(), timestamp_add_now(), and TS_ROMSTAGE_START.

Referenced by mainboard_romstage_entry().

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mainboard_pre_raminit()

__weak void mainboard_pre_raminit

(

struct romstage_params *

params

)

Definition at line 133 of file romstage.c.

Referenced by cache_as_ram_stage_main(), and mainboard_romstage_entry().

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mainboard_save_dimm_info()

__weak void mainboard_save_dimm_info

(

struct romstage_params *

params

)

Definition at line 138 of file romstage.c.

Referenced by mainboard_romstage_entry(), and raminit_common().

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raminit_common()

static void raminit_common ( struct romstage_params *  params )

static

Definition at line 22 of file romstage.c.

References ACPI_S3, assert, BIOS_DEBUG, CONFIG, elog_boot_notify(), full_reset(), mainboard_save_dimm_info(), mrc_cache_current_mmap_leak(), mrc_cache_stash_data(), MRC_TRAINING_DATA, NULL, params, post_code, POST_RESUME_FAILURE, printk, raminit(), romstage_handoff_init(), timestamp_add_now(), TS_INITRAM_END, and TS_INITRAM_START.

Referenced by cache_as_ram_stage_main().

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