15 EFI_FFS_FILE_HEADER *ffh;
17 EFI_FIRMWARE_VOLUME_EXT_HEADER *fveh;
18 EFI_FIRMWARE_VOLUME_HEADER *fvh;
26 fsp_ptr.u32 = fsp_base_address;
29 if (fsp_ptr.fvh->Signature != 0x4856465F)
33 fsp_ptr.u32 += fsp_ptr.fvh->ExtHeaderOffset;
34 fsp_ptr.u32 += fsp_ptr.fveh->ExtHeaderSize;
35 fsp_ptr.u32 =
ALIGN_UP(fsp_ptr.u32, 8);
38 if ((((
u32 *)&fsp_ptr.ffh->Name)[0] != 0x912740BE)
39 || (((
u32 *)&fsp_ptr.ffh->Name)[1] != 0x47342284)
40 || (((
u32 *)&fsp_ptr.ffh->Name)[2] != 0xB08471B9)
41 || (((
u32 *)&fsp_ptr.ffh->Name)[3] != 0x0C3F3527)) {
46 fsp_ptr.u32 +=
sizeof(EFI_FFS_FILE_HEADER);
48 if (fsp_ptr.rs->Type != EFI_SECTION_RAW)
52 fsp_ptr.u32 +=
sizeof(EFI_RAW_SECTION);
55 if (fsp_ptr.fih->ImageBase != fsp_base_address)
59 if (fsp_ptr.fih->Signature != FSP_SIG)
63 image_id = (
u64 *)&fsp_ptr.fih->ImageId[0];
64 if (*image_id != FSP_IMAGE_ID)
68 if (fsp_ptr.fih->ImageRevision > FSP_IMAGE_REV)
78 fsp_base = (
u8 *)fsp_header->ImageBase;
81 fsp_header->ImageId[0], fsp_header->ImageId[1],
82 fsp_header->ImageId[2], fsp_header->ImageId[3],
83 fsp_header->ImageId[4], fsp_header->ImageId[5],
84 fsp_header->ImageId[6], fsp_header->ImageId[7]);
86 fsp_header->HeaderRevision);
88 (
u8)((fsp_header->ImageRevision >> 24) & 0xff),
89 (
u8)((fsp_header->ImageRevision >> 16) & 0xff),
90 (
u8)((fsp_header->ImageRevision >> 8) & 0xff),
91 (
u8)(fsp_header->ImageRevision & 0xff));
92 #if CONFIG(DISPLAY_FSP_ENTRY_POINTS)
96 &fsp_base[fsp_header->TempRamInitEntryOffset]);
98 &fsp_base[fsp_header->FspInitEntryOffset]);
99 if (fsp_header->HeaderRevision >= FSP_HEADER_REVISION_2) {
101 &fsp_base[fsp_header->FspMemoryInitEntryOffset]);
103 &fsp_base[fsp_header->TempRamExitEntryOffset]);
105 &fsp_base[fsp_header->FspSiliconInitEntryOffset]);
108 &fsp_base[fsp_header->NotifyPhaseEntryOffset]);
110 &fsp_base[fsp_header->ImageSize]);
116 FSP_NOTIFY_PHASE notify_phase_proc;
117 NOTIFY_PHASE_PARAMS notify_phase_params;
119 FSP_INFO_HEADER *fsp_header_ptr;
122 if (fsp_header_ptr ==
NULL) {
123 fsp_header_ptr = (
void *)
find_fsp(CONFIG_FSP_LOC);
124 if ((
u32)fsp_header_ptr < 0xff) {
127 die(
"Can't find the FSP!\n");
132 notify_phase_proc = (FSP_NOTIFY_PHASE)(fsp_header_ptr->ImageBase +
133 fsp_header_ptr->NotifyPhaseEntryOffset);
134 notify_phase_params.Phase = phase;
136 if (phase == EnumInitPhaseReadyToBoot) {
144 status = notify_phase_proc(¬ify_phase_params);
150 printk(
BIOS_ERR,
"FSP API NotifyPhase failed for phase 0x%x with status: 0x%x\n",
164 (
void *)EnumInitPhaseAfterPciEnumeration);
167 (
void *)EnumInitPhaseReadyToBoot);
170 (
void *)EnumInitPhaseReadyToBoot);
184 die(
"Can't save FSP runtime information.\n");
221 die(
"Can't update FSP runtime information.\n");
void * cbmem_add(u32 id, u64 size)
void * cbmem_find(u32 id)
#define CBMEM_ID_FSP_RUNTIME
#define printk(level,...)
void __noreturn die(const char *fmt,...)
#define ERROR_IMAGEBASE_MISMATCH
#define ERROR_FSP_REV_MISMATCH
#define ERROR_NO_INFO_HEADER
#define ERROR_INFO_HEAD_SIG_MISMATCH
#define ERROR_FSP_SIG_MISMATCH
#define ERROR_NO_FFS_GUID
void fsp_set_runtime(FSP_INFO_HEADER *fih, void *hob_list)
void print_fsp_info(FSP_INFO_HEADER *fsp_header)
static void fsp_notify_boot_state_callback(void *arg)
BOOT_STATE_INIT_ENTRY(BS_DEV_RESOURCES, BS_ON_EXIT, fsp_notify_boot_state_callback,(void *) EnumInitPhaseAfterPciEnumeration)
void fsp_notify(u32 phase)
void fsp_display_upd_value(const char *name, uint32_t size, uint64_t old, uint64_t new)
FSP_INFO_HEADER * find_fsp(uintptr_t fsp_base_address)
FSP_INFO_HEADER * fsp_get_fih(void)
struct fsp_runtime __packed
void fsp_update_fih(FSP_INFO_HEADER *fih)
void * fsp_get_hob_list(void)
void timestamp_add_now(enum timestamp_id id)
#define BIOS_INFO
BIOS_INFO - Expected events.
#define BIOS_ERR
BIOS_ERR - System in incomplete state.
#define BIOS_SPEW
BIOS_SPEW - Excessively verbose output.
#define POST_FSP_NOTIFY_BEFORE_FINALIZE
Before calling FSP Notify (ready to boot)
#define POST_FSP_NOTIFY_BEFORE_ENUMERATE
Before calling FSP Notify (after PCI enumeration)
unsigned long long uint64_t