coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <baseboard/gpio.h>
4 #include <baseboard/variants.h>
5 #include <commonlib/helpers.h>
6 
7 /* Pad configuration in ramstage */
8 static const struct pad_config gpio_table[] = {
9 
10 };
11 
12 const struct pad_config *variant_override_gpio_table(size_t *num)
13 {
14  *num = ARRAY_SIZE(gpio_table);
15  return gpio_table;
16 }
17 
18 /* Early pad configuration in bootblock */
19 static const struct pad_config early_gpio_table[] = {
20  /* A23 : GPP_A23 ==> RECOVERY# */
21  PAD_CFG_GPI(GPP_A23, NONE, DEEP),
22  /* C20 : GPP_C20 ==> PCHRX_SERVOTX_UART */
23  PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
24  /* C21 : CPP_G21 ==> PCHTX_SERVORX_UART */
25  PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
26  /* C22 : GPP_C22 ==> H1_FLASH_WP */
27  PAD_CFG_GPI(GPP_C22, NONE, DEEP),
28  /* C23 : GPP_C23 ==> H1_PCH_INT# */
29  PAD_CFG_GPI_APIC(GPP_C23, NONE, DEEP, LEVEL, INVERT),
30  /* E3 : GPP_E3 ==> MEM_INTERLEAVED */
31  PAD_CFG_GPI(GPP_E3, NONE, PLTRST),
32  /* F11 : GPP_F11 ==> MEM_CONFIG0_1P8 */
33  PAD_CFG_GPI(GPP_F11, NONE, DEEP),
34  /* F12 : GPP_F12 ==> MEM_CONFIG1_1P8 */
35  PAD_CFG_GPI(GPP_F12, NONE, DEEP),
36  /* F13 : GPP_F13 ==> MEM_CONFIG2_1P8 */
37  PAD_CFG_GPI(GPP_F13, NONE, DEEP),
38  /* F14 : GPP_F14 ==> MEM_CONFIG3_1P8 */
39  PAD_CFG_GPI(GPP_F14, NONE, DEEP),
40  /* F15 : GPP_F15 ==> MEM_CONFIG4_1P8 */
41  PAD_CFG_GPI(GPP_F15, NONE, DEEP),
42  /* F16 : GPP_F16 ==> WWAN_BB_RST#_1P8 */
43  PAD_CFG_GPO(GPP_F16, 0, DEEP),
44  /* H4 : GPP_H4 ==> DDR_CHA_EN_1P8 */
45  PAD_CFG_GPI(GPP_H4, NONE, DEEP),
46  /* H5 : GPP_H5 ==> DDR_CHB_EN_1P8 */
47  PAD_CFG_GPI(GPP_H5, NONE, DEEP),
48  /* H6 : GPP_H6 ==> I2C_SDA_PCH_H1 */
49  PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1),
50  /* H7 : GPP_H7 ==> I2C_SCL_PCH_H1 */
51  PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1),
52  /* GPD3: GPD3 ==> SIO_PWRBTN# */
53  PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
54 };
55 
56 const struct pad_config *variant_early_gpio_table(size_t *num)
57 {
59  return early_gpio_table;
60 }
#define GPD3
#define GPP_E3
#define GPP_F12
#define GPP_F16
#define GPP_H6
#define GPP_C22
#define GPP_C23
#define GPP_H7
#define GPP_A23
#define GPP_C20
#define GPP_F15
#define GPP_F13
#define GPP_H5
#define GPP_C21
#define GPP_F14
#define GPP_F11
#define GPP_H4
#define ARRAY_SIZE(a)
Definition: helpers.h:12
const struct pad_config * variant_early_gpio_table(size_t *num)
Definition: gpio.c:204
const struct pad_config *__weak variant_override_gpio_table(size_t *num)
Definition: gpio.c:450
static const struct pad_config gpio_table[]
Definition: gpio.c:8
static const struct pad_config early_gpio_table[]
Definition: gpio.c:19
#define PAD_CFG_GPI(pad, pull, rst)
Definition: gpio_defs.h:284
#define PAD_CFG_NF(pad, pull, rst, func)
Definition: gpio_defs.h:197
#define PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv)
Definition: gpio_defs.h:376
#define PAD_CFG_GPO(pad, val, rst)
Definition: gpio_defs.h:247