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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <acpi/acpi.h>
#include <arch/io.h>
#include <cpu/x86/smm.h>
#include <soc/nvs.h>
#include <southbridge/intel/lynxpoint/pch.h>
#include <southbridge/intel/lynxpoint/me.h>
#include <northbridge/intel/haswell/haswell.h>
#include <cpu/intel/haswell/haswell.h>
Go to the source code of this file.
Macros | |
#define | SIO_GPIO_BASE_SET4 (0x730 + 3) |
#define | SIO_GPIO_BLINK_GPIO45 0x25 |
Functions | |
void | mainboard_smi_sleep (u8 slp_typ) |
#define SIO_GPIO_BASE_SET4 (0x730 + 3) |
Definition at line 16 of file smihandler.c.
#define SIO_GPIO_BLINK_GPIO45 0x25 |
Definition at line 17 of file smihandler.c.
Definition at line 18 of file smihandler.c.
References ACPI_S3, ACPI_S4, ACPI_S5, inb(), outb(), and SIO_GPIO_BASE_SET4.