coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <device/device.h>
Go to the source code of this file.
Functions | |
void | init_sb800_IMC_fans (struct device *dev) |
void | init_sb800_MANUAL_fans (struct device *dev) |
Definition at line 44 of file fan.c.
References device::chip_info, IMC_ENABLE_TEMPIN0, IMC_ENABLE_TEMPIN1, IMC_ENABLE_TEMPIN2, IMC_ENABLE_TEMPIN3, IMC_ENABLE_ZONE0, IMC_ENABLE_ZONE1, IMC_ENABLE_ZONE2, IMC_ENABLE_ZONE3, IMC_FAN_CONFIG_COUNT, IMC_FAN_SPEED_COUNT, IMC_FAN_THRESHOLD_COUNT, southbridge_amd_cimx_sb800_config::imc_fan_zone0_enabled, southbridge_amd_cimx_sb800_config::imc_fan_zone1_enabled, southbridge_amd_cimx_sb800_config::imc_fan_zone2_enabled, southbridge_amd_cimx_sb800_config::imc_fan_zone3_enabled, southbridge_amd_cimx_sb800_config::imc_port_address, southbridge_amd_cimx_sb800_config::imc_tempin0_at, southbridge_amd_cimx_sb800_config::imc_tempin0_ct, southbridge_amd_cimx_sb800_config::imc_tempin0_enabled, southbridge_amd_cimx_sb800_config::imc_tempin0_tuning_param, southbridge_amd_cimx_sb800_config::imc_tempin1_at, southbridge_amd_cimx_sb800_config::imc_tempin1_ct, southbridge_amd_cimx_sb800_config::imc_tempin1_enabled, southbridge_amd_cimx_sb800_config::imc_tempin1_tuning_param, southbridge_amd_cimx_sb800_config::imc_tempin2_at, southbridge_amd_cimx_sb800_config::imc_tempin2_ct, southbridge_amd_cimx_sb800_config::imc_tempin2_enabled, southbridge_amd_cimx_sb800_config::imc_tempin2_tuning_param, southbridge_amd_cimx_sb800_config::imc_tempin3_at, southbridge_amd_cimx_sb800_config::imc_tempin3_ct, southbridge_amd_cimx_sb800_config::imc_tempin3_enabled, southbridge_amd_cimx_sb800_config::imc_tempin3_tuning_param, IMC_ZONE0, southbridge_amd_cimx_sb800_config::imc_zone0_config_vals, southbridge_amd_cimx_sb800_config::imc_zone0_fanspeeds, southbridge_amd_cimx_sb800_config::imc_zone0_thresholds, IMC_ZONE1, southbridge_amd_cimx_sb800_config::imc_zone1_config_vals, southbridge_amd_cimx_sb800_config::imc_zone1_fanspeeds, southbridge_amd_cimx_sb800_config::imc_zone1_thresholds, IMC_ZONE2, southbridge_amd_cimx_sb800_config::imc_zone2_config_vals, southbridge_amd_cimx_sb800_config::imc_zone2_fanspeeds, southbridge_amd_cimx_sb800_config::imc_zone2_thresholds, IMC_ZONE3, southbridge_amd_cimx_sb800_config::imc_zone3_config_vals, southbridge_amd_cimx_sb800_config::imc_zone3_fanspeeds, southbridge_amd_cimx_sb800_config::imc_zone3_thresholds, init_sb800_MANUAL_fans(), pci_write_config16(), and sb_config.
Referenced by sb800_enable().
Definition at line 12 of file fan.c.
References device::chip_info, southbridge_amd_cimx_sb800_config::fan0_config_vals, southbridge_amd_cimx_sb800_config::fan0_enabled, southbridge_amd_cimx_sb800_config::fan1_config_vals, southbridge_amd_cimx_sb800_config::fan1_enabled, southbridge_amd_cimx_sb800_config::fan2_config_vals, southbridge_amd_cimx_sb800_config::fan2_enabled, southbridge_amd_cimx_sb800_config::fan3_config_vals, southbridge_amd_cimx_sb800_config::fan3_enabled, southbridge_amd_cimx_sb800_config::fan4_config_vals, southbridge_amd_cimx_sb800_config::fan4_enabled, FAN_0_OFFSET, FAN_1_OFFSET, FAN_2_OFFSET, FAN_3_OFFSET, FAN_4_OFFSET, FAN_REGISTER_COUNT, and pm2_write8().
Referenced by init_sb800_IMC_fans(), and sb800_enable().