47 unsigned char *message_ptr;
77 sb_config.Pecstruct.IMCFUNSupportBitMap = 0;
87 sb_config.Pecstruct.MSGFun81zone0MSGREG0 = 0x00;
89 message_ptr = &
sb_config.Pecstruct.MSGFun81zone0MSGREG2;
94 sb_config.Pecstruct.MSGFun83zone0MSGREG0 = 0x00;
96 sb_config.Pecstruct.MSGFun83zone0MSGREGB = 0x00;
97 message_ptr = &
sb_config.Pecstruct.MSGFun83zone0MSGREG2;
102 sb_config.Pecstruct.MSGFun85zone0MSGREG0 = 0x00;
104 message_ptr = &
sb_config.Pecstruct.MSGFun85zone0MSGREG2;
117 sb_config.Pecstruct.MSGFun81zone1MSGREG0 = 0x00;
119 message_ptr = &
sb_config.Pecstruct.MSGFun81zone1MSGREG2;
124 sb_config.Pecstruct.MSGFun83zone1MSGREG0 = 0x00;
126 sb_config.Pecstruct.MSGFun83zone1MSGREGB = 0x00;
127 message_ptr = &
sb_config.Pecstruct.MSGFun83zone1MSGREG2;
132 sb_config.Pecstruct.MSGFun85zone1MSGREG0 = 0x00;
134 message_ptr = &
sb_config.Pecstruct.MSGFun85zone1MSGREG2;
147 sb_config.Pecstruct.MSGFun81zone2MSGREG0 = 0x00;
149 message_ptr = &
sb_config.Pecstruct.MSGFun81zone2MSGREG2;
154 sb_config.Pecstruct.MSGFun83zone2MSGREG0 = 0x00;
156 sb_config.Pecstruct.MSGFun83zone2MSGREGB = 0x00;
157 message_ptr = &
sb_config.Pecstruct.MSGFun83zone2MSGREG2;
162 sb_config.Pecstruct.MSGFun85zone2MSGREG0 = 0x00;
164 message_ptr = &
sb_config.Pecstruct.MSGFun85zone2MSGREG2;
178 sb_config.Pecstruct.MSGFun81zone3MSGREG0 = 0x00;
180 message_ptr = &
sb_config.Pecstruct.MSGFun81zone3MSGREG2;
185 sb_config.Pecstruct.MSGFun83zone3MSGREG0 = 0x00;
187 sb_config.Pecstruct.MSGFun83zone3MSGREGB = 0x00;
188 message_ptr = &
sb_config.Pecstruct.MSGFun83zone3MSGREG2;
193 sb_config.Pecstruct.MSGFun85zone3MSGREG0 = 0x00;
195 message_ptr = &
sb_config.Pecstruct.MSGFun85zone3MSGREG2;
212 sb_config.Pecstruct.MSGFun89zone0MSGREG0 = 0x00;
213 sb_config.Pecstruct.MSGFun89zone0MSGREG1 = 0x00;
230 sb_config.Pecstruct.MSGFun89zone1MSGREG0 = 0x00;
231 sb_config.Pecstruct.MSGFun89zone1MSGREG1 = 0x01;
248 sb_config.Pecstruct.MSGFun89zone2MSGREG0 = 0x00;
249 sb_config.Pecstruct.MSGFun89zone2MSGREG1 = 0x02;
266 sb_config.Pecstruct.MSGFun89zone3MSGREG0 = 0x00;
267 sb_config.Pecstruct.MSGFun89zone3MSGREG1 = 0x03;
280 sb_config.StdHeader.Func = SB_EC_FANCONTROL;
static void pm2_write8(uint8_t reg, uint8_t value)
void init_sb800_IMC_fans(struct device *dev)
void init_sb800_MANUAL_fans(struct device *dev)
#define IMC_ENABLE_TEMPIN1
#define IMC_ENABLE_TEMPIN3
#define IMC_ENABLE_TEMPIN0
#define IMC_FAN_CONFIG_COUNT
#define IMC_FAN_SPEED_COUNT
#define IMC_ENABLE_TEMPIN2
#define FAN_REGISTER_COUNT
#define IMC_FAN_THRESHOLD_COUNT
static __always_inline void pci_write_config16(const struct device *dev, u16 reg, u16 val)
static AMDSBCFG * sb_config
DEVTREE_CONST void * chip_info
u8 imc_tempin1_tuning_param
u32 imc_fan_zone0_enabled
u8 imc_zone2_config_vals[IMC_FAN_CONFIG_COUNT]
u8 fan0_config_vals[FAN_REGISTER_COUNT]
u8 imc_tempin3_tuning_param
u8 imc_zone1_fanspeeds[IMC_FAN_SPEED_COUNT]
u8 fan4_config_vals[FAN_REGISTER_COUNT]
u8 imc_zone0_thresholds[IMC_FAN_THRESHOLD_COUNT]
u8 imc_tempin0_tuning_param
u8 fan2_config_vals[FAN_REGISTER_COUNT]
u8 imc_zone1_config_vals[IMC_FAN_CONFIG_COUNT]
u8 imc_zone0_config_vals[IMC_FAN_CONFIG_COUNT]
u32 imc_fan_zone3_enabled
u8 imc_zone0_fanspeeds[IMC_FAN_SPEED_COUNT]
u8 imc_zone3_config_vals[IMC_FAN_CONFIG_COUNT]
u8 imc_tempin2_tuning_param
u8 imc_zone2_thresholds[IMC_FAN_THRESHOLD_COUNT]
u32 imc_fan_zone2_enabled
u8 imc_zone3_thresholds[IMC_FAN_THRESHOLD_COUNT]
u8 fan1_config_vals[FAN_REGISTER_COUNT]
u8 imc_zone2_fanspeeds[IMC_FAN_SPEED_COUNT]
u8 imc_zone1_thresholds[IMC_FAN_THRESHOLD_COUNT]
u8 imc_zone3_fanspeeds[IMC_FAN_SPEED_COUNT]
u8 fan3_config_vals[FAN_REGISTER_COUNT]
u32 imc_fan_zone1_enabled