coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
mt6359p.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <soc/mt6359p.h>
4 
5 static const struct pmic_setting init_setting[] = {
6  {0x20, 0xA, 0xA, 0},
7  {0x24, 0x1F00, 0x1F00, 0},
8  {0x30, 0x1, 0x1, 0},
9  {0x32, 0x1, 0x1, 0},
10  {0x94, 0x0, 0xFFFF, 0},
11  {0x10C, 0x10, 0x10, 0},
12  {0x112, 0x4, 0x4, 0},
13  {0x118, 0x8, 0x8, 0},
14  {0x14A, 0x20, 0x20, 0},
15  {0x198, 0x0, 0x1FF, 0},
16  {0x1B2, 0x3, 0x3, 0},
17  {0x3B0, 0x0, 0x300, 0},
18  {0x790, 0x3, 0x3, 0},
19  {0x7A6, 0xF800, 0xFC00, 0},
20  {0x7A8, 0x0, 0x280, 0},
21  {0x98A, 0x80, 0x80, 0},
22  {0x992, 0xF00, 0xF00, 0},
23  {0xA08, 0x1, 0x1, 0},
24  {0xA0C, 0x300, 0x300, 0},
25  {0xA10, 0x0, 0x4000, 0},
26  /*
27  * RG_STRUP_LONG_PRESS_EXT_SEL
28  * only allow pwrkey boot after long-press shutdown.
29  */
30  {0xA12, 0x1F2, 0x1F3, 0},
31  {0xA24, 0xFFFF, 0xFFFF, 0},
32  {0xA26, 0xFFE0, 0xFFE0, 0},
33  {0xA2C, 0xC0DF, 0xC0DF, 0},
34  {0xA2E, 0xEBE0, 0xEBE0, 0},
35  {0xA34, 0x8000, 0x8000, 0},
36  {0xA3C, 0x1C00, 0x1F00, 0},
37  {0xA3E, 0x341, 0x7FFF, 0},
38  {0xA40, 0x1042, 0x7FFF, 0},
39  {0xA42, 0xC05, 0x7FFF, 0},
40  {0xA44, 0x20E5, 0x7FFF, 0},
41  {0xA46, 0x2652, 0x7FFF, 0},
42  {0xA48, 0x716A, 0x7FFF, 0},
43  {0xA4A, 0x62EC, 0x7FFF, 0},
44  {0xA4C, 0x5676, 0x7FFF, 0},
45  {0xA4E, 0x6F34, 0x7FFF, 0},
46  {0xA50, 0xC0, 0x7FFF, 0},
47  {0xA9C, 0x4000, 0x4000, 0},
48  {0xA9E, 0x2E11, 0xFF11, 0},
49  {0xF8C, 0x115, 0x115, 0},
50  {0x1188, 0x0, 0x8000, 0},
51  {0x1198, 0x13, 0x3FF, 0},
52  {0x119E, 0x6000, 0x7000, 0},
53  {0x11D4, 0x0, 0x2, 0},
54  {0x1212, 0x0, 0x2, 0},
55  {0x1224, 0x0, 0x2, 0},
56  {0x1238, 0x0, 0x2, 0},
57  {0x124A, 0x0, 0x2, 0},
58  {0x125C, 0x0, 0x2, 0},
59  {0x125E, 0x0, 0x8000, 0},
60  {0x1260, 0x1, 0xFFF, 0},
61  {0x1262, 0x4, 0x4, 0},
62  {0x1412, 0x8, 0x8, 0},
63  {0x148E, 0x18, 0x7F, 0},
64  {0x1492, 0x505, 0x7F7F, 0},
65  {0x1514, 0x2, 0x2, 0},
66  {0x1520, 0x0, 0x2, 0},
67  {0x152C, 0x7F, 0x7F, 0},
68  {0x158E, 0x18, 0x7F, 0},
69  {0x1592, 0xC00, 0x7F00, 0},
70  {0x160E, 0x18, 0x7F, 0},
71  {0x1694, 0x2, 0x2, 0},
72  {0x16A0, 0x0, 0x2, 0},
73  {0x16AE, 0x50, 0x7F, 0},
74  {0x170E, 0x18, 0x7F, 0},
75  {0x178E, 0x18, 0x7F, 0},
76  {0x198A, 0x5004, 0x502C, 0},
77  {0x198C, 0x11, 0x3F, 0},
78  {0x198E, 0x1E0, 0x1E0, 0},
79  {0x1990, 0xFD, 0xFF, 0},
80  {0x1994, 0x10, 0x38, 0},
81  {0x1996, 0x2004, 0xA02C, 0},
82  {0x1998, 0x11, 0x3F, 0},
83  {0x199A, 0xFB78, 0xFF78, 0},
84  {0x199E, 0x2, 0x7, 0},
85  {0x19A0, 0x1050, 0x10F1, 0},
86  {0x19A2, 0x18, 0x38, 0},
87  {0x19A4, 0xF, 0xF, 0},
88  {0x19A6, 0x30, 0xFF, 0},
89  {0x19AC, 0x4200, 0x4680, 0},
90  {0x19AE, 0x6E, 0x7E, 0},
91  {0x19B0, 0x3C00, 0x3C00, 0},
92  {0x19B4, 0x20FD, 0xFFFF, 0},
93  {0x19DE, 0x1, 0x1, 6}, /* RG_VGPUVCORE_PH2_OFF, disable phase 2 */
94  {0x1A08, 0x4200, 0x4680, 0},
95  {0x1A0A, 0x6E, 0x7E, 0},
96  {0x1A0C, 0x3C00, 0x3C00, 0},
97  {0x1A10, 0x20FD, 0xFFFF, 0},
98  {0x1A14, 0x4208, 0x4698, 0},
99  {0x1A16, 0x46, 0x7E, 0},
100  {0x1A18, 0x3C00, 0x3C00, 0},
101  {0x1A1C, 0x30FF, 0xFFFF, 0},
102  {0x1A1E, 0x0, 0x200, 0},
103  {0x1A20, 0x4208, 0x4698, 0},
104  {0x1A22, 0x4A, 0x7E, 0},
105  {0x1A24, 0x3C00, 0x3C00, 0},
106  {0x1A28, 0x3000, 0xFF00, 0},
107  {0x1A2C, 0x20, 0x74, 0},
108  {0x1A2E, 0x1E, 0x1E, 0},
109  {0x1A30, 0x42, 0xFF, 0},
110  {0x1A32, 0x480, 0x7E0, 0},
111  {0x1A34, 0x20, 0x74, 0},
112  {0x1A36, 0x1E, 0x1E, 0},
113  {0x1A38, 0x42, 0xFF, 0},
114  {0x1A3A, 0x480, 0x7E0, 0},
115  {0x1A3C, 0x14C, 0x3CC, 0},
116  {0x1A3E, 0x23C, 0x3FC, 0},
117  {0x1A40, 0xC400, 0xFF00, 0},
118  {0x1A42, 0x80, 0xFF, 0},
119  {0x1A44, 0x702C, 0xFF2C, 0},
120  {0x1B0E, 0xF, 0xF, 0},
121  {0x1B10, 0x1, 0x1, 0},
122  {0x1B14, 0xFFFF, 0xFFFF, 0},
123  {0x1B1A, 0x3FFF, 0x3FFF, 0},
124  {0x1B32, 0x8, 0x8, 0},
125  {0x1B8A, 0x30, 0x8030, 0},
126  {0x1B9C, 0x10, 0x8010, 0},
127  {0x1BA0, 0x4000, 0x4000, 0},
128  {0x1BAE, 0x1410, 0x9C10, 0},
129  {0x1BB2, 0x2, 0x2, 0},
130  {0x1BC0, 0x10, 0x8010, 0},
131  {0x1BD2, 0x13, 0x8013, 0},
132  {0x1BE4, 0x10, 0x8010, 0},
133  {0x1C0A, 0x10, 0x8010, 0},
134  {0x1C1E, 0x10, 0x8010, 0},
135  {0x1C30, 0x10, 0x8010, 0},
136  {0x1C42, 0x10, 0x8010, 0},
137  {0x1C54, 0x32, 0x8033, 0},
138  {0x1C66, 0x10, 0x8010, 0},
139  {0x1C8A, 0x10, 0x8010, 0},
140  {0x1C8E, 0x4000, 0x4000, 0},
141  {0x1C9C, 0x10, 0x8010, 0},
142  {0x1CAE, 0x10, 0x8010, 0},
143  {0x1CC0, 0x10, 0x8010, 0},
144  {0x1CD2, 0x33, 0x8033, 0},
145  {0x1CE4, 0x33, 0x8033, 0},
146  {0x1D0A, 0x10, 0x8010, 0},
147  {0x1D1E, 0x10, 0x8010, 0},
148  {0x1D22, 0x4000, 0x4000, 0},
149  {0x1D30, 0x10, 0x8010, 0},
150  {0x1D34, 0x4000, 0x4000, 0},
151  {0x1D42, 0x30, 0x8030, 0},
152  {0x1D46, 0x4000, 0x4000, 0},
153  {0x1D54, 0x30, 0x8030, 0},
154  {0x1D66, 0x32, 0x8033, 0},
155  {0x1D8A, 0x10, 0x8010, 0},
156  {0x1D9C, 0x10, 0x8010, 0},
157  {0x1E8A, 0x10, 0x8010, 0},
158  {0x1E92, 0xC12, 0x7F7F, 0},
159  {0x1EAA, 0x10, 0x8010, 0},
160  {0x1EB2, 0xC1F, 0x7F7F, 0},
161  {0x1F0A, 0x10, 0x8010, 0},
162  {0x1F12, 0xC1F, 0x7F7F, 0},
163  {0x1F30, 0x10, 0x8010, 0},
164  {0x1F38, 0xF1F, 0x7F7F, 0},
165  {0x200A, 0x8, 0xC, 0},
166  {0x202C, 0x8, 0xC, 0},
167  {0x208C, 0x100, 0xF00, 0},
168  {0x209C, 0x80, 0x1E0, 0},
169  /*
170  * BUCK_VGPU11_OP_MODE/CFG/EN
171  * Vreq setting for scp usage
172  */
173  {0x15a0, 0x0, 0x1, 11},
174  {0x159a, 0x0, 0x1, 11},
175  {0x1594, 0x1, 0x1, 11},
176 };
177 
178 static const struct pmic_setting lp_setting[] = {
179  /* Suspend */
180  {0x1520, 0x0, 0x1, 0x1},
181  {0x1514, 0x1, 0x1, 0x1},
182  {0x151a, 0x0, 0x1, 0x1},
183  {0x14a0, 0x1, 0x1, 0x1},
184  {0x1494, 0x1, 0x1, 0x1},
185  {0x149a, 0x1, 0x1, 0x1},
186  {0x1714, 0x1, 0x1, 0xf},
187  {0x1794, 0x1, 0x1, 0xf},
188  {0x15a0, 0x1, 0x1, 0x0},
189  {0x1594, 0x1, 0x1, 0x0},
190  {0x159a, 0x1, 0x1, 0x0},
191  {0x1614, 0x1, 0x1, 0xf},
192  {0x16a0, 0x0, 0x1, 0x1},
193  {0x1694, 0x1, 0x1, 0x1},
194  {0x169a, 0x0, 0x1, 0x1},
195  {0x1820, 0x1, 0x1, 0x0},
196  {0x1814, 0x1, 0x1, 0x0},
197  {0x181a, 0x1, 0x1, 0x0},
198  {0x18a0, 0x1, 0x1, 0x0},
199  {0x1894, 0x1, 0x1, 0x0},
200  {0x189a, 0x1, 0x1, 0x0},
201  {0x1e96, 0x1, 0x1, 0xf},
202  {0x1eb6, 0x1, 0x1, 0xf},
203  {0x1f16, 0x1, 0x1, 0xf},
204  {0x1f3c, 0x1, 0x1, 0xf},
205  {0x1c58, 0x1, 0x1, 0xf},
206  {0x1d8e, 0x1, 0x1, 0xf},
207  {0x1c34, 0x1, 0x1, 0xf},
208  {0x1c22, 0x1, 0x1, 0xf},
209  {0x1bae, 0x0, 0x1, 0xb},
210  {0x1bb2, 0x1, 0x1, 0x1},
211  {0x1bb8, 0x0, 0x1, 0x1},
212  {0x1cb2, 0x1, 0x1, 0xf},
213  {0x1bd6, 0x1, 0x1, 0xf},
214  {0x1bc0, 0x1, 0x1, 0xa},
215  {0x1bc4, 0x1, 0x1, 0x0},
216  {0x1bca, 0x1, 0x1, 0x0},
217  {0x1d22, 0x1, 0x1, 0xe},
218  {0x1d28, 0x0, 0x1, 0xe},
219  {0x1c66, 0x1, 0x1, 0xa},
220  {0x1c6a, 0x1, 0x1, 0x0},
221  {0x1c70, 0x1, 0x1, 0x0},
222  {0x1c42, 0x1, 0x1, 0xb},
223  {0x1c46, 0x1, 0x1, 0x1},
224  {0x1c4c, 0x1, 0x1, 0x1},
225  {0x1d34, 0x1, 0x1, 0xe},
226  {0x1d3a, 0x0, 0x1, 0xe},
227  {0x1b8a, 0x0, 0x1, 0xb},
228  {0x1b8e, 0x1, 0x1, 0x1},
229  {0x1b94, 0x0, 0x1, 0x1},
230  {0x1d42, 0x1, 0x1, 0xa},
231  {0x1d46, 0x1, 0x1, 0x0},
232  {0x1d4c, 0x0, 0x1, 0x0},
233  {0x1ca0, 0x1, 0x1, 0xf},
234  {0x1c8a, 0x1, 0x1, 0xa},
235  {0x1c8e, 0x1, 0x1, 0x0},
236  {0x1c94, 0x1, 0x1, 0x0},
237  {0x1b9c, 0x1, 0x1, 0xa},
238  {0x1ba0, 0x1, 0x1, 0x0},
239  {0x1ba6, 0x1, 0x1, 0x0},
240  {0x1be8, 0x1, 0x1, 0xf},
241  {0x1c0e, 0x1, 0x1, 0xf},
242  {0x1d0a, 0x1, 0x1, 0xa},
243  {0x1d0e, 0x1, 0x1, 0x0},
244  {0x1d14, 0x1, 0x1, 0x0},
245  {0x1cc4, 0x1, 0x1, 0xf},
246  {0x1d6a, 0x1, 0x1, 0xf},
247  {0x1cd6, 0x1, 0x1, 0xf},
248  {0x1ce8, 0x1, 0x1, 0xf},
249  {0x1da0, 0x1, 0x1, 0xf},
250  {0x1d58, 0x1, 0x1, 0xf},
251 
252  /* Deepidle */
253  {0x15a0, 0x1, 0x1, 0x2},
254  {0x1594, 0x1, 0x1, 0x2},
255  {0x159a, 0x1, 0x1, 0x2},
256  {0x1820, 0x1, 0x1, 0x2},
257  {0x1814, 0x1, 0x1, 0x2},
258  {0x181a, 0x1, 0x1, 0x2},
259  {0x18a0, 0x1, 0x1, 0x2},
260  {0x1894, 0x1, 0x1, 0x2},
261  {0x189a, 0x1, 0x1, 0x2},
262  {0x1bc0, 0x1, 0x1, 0xc},
263  {0x1bc4, 0x1, 0x1, 0x2},
264  {0x1bca, 0x1, 0x1, 0x2},
265  {0x1c66, 0x1, 0x1, 0xc},
266  {0x1c6a, 0x1, 0x1, 0x2},
267  {0x1c70, 0x1, 0x1, 0x2},
268  {0x1d42, 0x1, 0x1, 0xc},
269  {0x1d46, 0x1, 0x1, 0x2},
270  {0x1d4c, 0x0, 0x1, 0x2},
271  {0x1c8a, 0x1, 0x1, 0xc},
272  {0x1c8e, 0x1, 0x1, 0x2},
273  {0x1c94, 0x1, 0x1, 0x2},
274  {0x1b9c, 0x1, 0x1, 0xc},
275  {0x1ba0, 0x1, 0x1, 0x2},
276  {0x1ba6, 0x1, 0x1, 0x2},
277  {0x1be8, 0x1, 0x1, 0xf},
278  {0x1c0e, 0x1, 0x1, 0xf},
279  {0x1d0a, 0x1, 0x1, 0xc},
280  {0x1d0e, 0x1, 0x1, 0x2},
281  {0x1d14, 0x1, 0x1, 0x2},
282  {0x1d0e, 0x1, 0x1, 0x2},
283  {0x1d14, 0x1, 0x1, 0x2},
284 };
285 
286 void pmic_init_setting(void)
287 {
288  for (int i = 0; i < ARRAY_SIZE(init_setting); i++)
289  mt6359p_write_field(init_setting[i].addr, init_setting[i].val,
290  init_setting[i].mask, init_setting[i].shift);
291 }
292 
293 void pmic_lp_setting(void)
294 {
295  for (int i = 0; i < ARRAY_SIZE(lp_setting); i++)
296  mt6359p_write_field(lp_setting[i].addr, lp_setting[i].val,
297  lp_setting[i].mask, lp_setting[i].shift);
298 }
ARRAY_SIZE
#define ARRAY_SIZE(a)
Definition: helpers.h:12
addr
static u32 addr
Definition: cirrus.c:14
mt6359p_write_field
void mt6359p_write_field(u32 reg, u32 val, u32 mask, u32 shift)
Definition: mt6359p.c:58
init_setting
static const struct pmic_setting init_setting[]
Definition: mt6359p.c:5
pmic_lp_setting
void pmic_lp_setting(void)
Definition: mt6359p.c:293
pmic_init_setting
void pmic_init_setting(void)
Definition: mt6359p.c:286
lp_setting
static const struct pmic_setting lp_setting[]
Definition: mt6359p.c:178
mask
static const int mask[4]
Definition: gpio.c:308
pmic_setting
Definition: mt6359p.h:37
pmic_setting::shift
unsigned char shift
Definition: mt6359p.h:41
val
u8 val
Definition: sys.c:300