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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <cpu/x86/smm.h>
#include <ec/google/chromeec/smm.h>
#include <gpio.h>
#include <intelblocks/smihandler.h>
#include "ec.h"
Go to the source code of this file.
Functions | |
void | mainboard_smi_espi_handler (void) |
static void | mainboard_gpio_smi_sleep (u8 slp_typ) |
void | mainboard_smi_sleep (u8 slp_typ) |
int | mainboard_smi_apmc (u8 apmc) |
Definition at line 15 of file smihandler.c.
References EN_PP3300_DX_CAM, gpio_set(), GPP_C22, and GPP_E11.
Referenced by mainboard_smi_sleep().
int mainboard_smi_apmc | ( | u8 | apmc | ) |
Definition at line 36 of file smihandler.c.
References chromeec_smi_apmc(), MAINBOARD_EC_SCI_EVENTS, and MAINBOARD_EC_SMI_EVENTS.
Definition at line 10 of file smihandler.c.
References chromeec_smi_process_events().
Definition at line 27 of file smihandler.c.
References chromeec_smi_device_event_sleep(), chromeec_smi_sleep(), MAINBOARD_EC_S3_DEVICE_EVENTS, MAINBOARD_EC_S3_WAKE_EVENTS, MAINBOARD_EC_S5_WAKE_EVENTS, and mainboard_gpio_smi_sleep().