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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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Go to the source code of this file.
Macros | |
#define | _REG32(p, i) (*(volatile uint32_t *)((p) + (i))) |
#define | DRAM_CLASS_OFFSET 8 |
#define | DRAM_CLASS_DDR4 0xA |
#define | OPTIMAL_RMODW_EN_OFFSET 0 |
#define | DISABLE_RD_INTERLEAVE_OFFSET 16 |
#define | OUT_OF_RANGE_OFFSET 1 |
#define | MULTIPLE_OUT_OF_RANGE_OFFSET 2 |
#define | PORT_COMMAND_CHANNEL_ERROR_OFFSET 7 |
#define | MC_INIT_COMPLETE_OFFSET 8 |
#define | LEVELING_OPERATION_COMPLETED_OFFSET 22 |
#define | DFI_PHY_WRLELV_MODE_OFFSET 24 |
#define | DFI_PHY_RDLVL_MODE_OFFSET 24 |
#define | DFI_PHY_RDLVL_GATE_MODE_OFFSET 0 |
#define | VREF_EN_OFFSET 24 |
#define | PORT_ADDR_PROTECTION_EN_OFFSET 0 |
#define | AXI0_ADDRESS_RANGE_ENABLE 8 |
#define | AXI0_RANGE_PROT_BITS_0_OFFSET 24 |
#define | RDLVL_EN_OFFSET 16 |
#define | RDLVL_GATE_EN_OFFSET 24 |
#define | WRLVL_EN_OFFSET 0 |
#define | PHY_RX_CAL_DQ0_0_OFFSET 0 |
#define | PHY_RX_CAL_DQ1_0_OFFSET 16 |
#define _REG32 | ( | p, | |
i | |||
) | (*(volatile uint32_t *)((p) + (i))) |
Definition at line 38 of file ux00ddr.h.
Referenced by ux00ddr_writeregmap().
Definition at line 116 of file ux00ddr.h.
References _REG32, and DISABLE_RD_INTERLEAVE_OFFSET.
Referenced by sdram_init().
Definition at line 120 of file ux00ddr.h.
References _REG32, and OPTIMAL_RMODW_EN_OFFSET.
Referenced by sdram_init().
Definition at line 128 of file ux00ddr.h.
References _REG32, DFI_PHY_RDLVL_MODE_OFFSET, and RDLVL_EN_OFFSET.
Referenced by sdram_init().
Definition at line 133 of file ux00ddr.h.
References _REG32, DFI_PHY_RDLVL_GATE_MODE_OFFSET, and RDLVL_GATE_EN_OFFSET.
Referenced by sdram_init().
Definition at line 138 of file ux00ddr.h.
References _REG32, and VREF_EN_OFFSET.
Referenced by sdram_init().
Definition at line 124 of file ux00ddr.h.
References _REG32, DFI_PHY_WRLELV_MODE_OFFSET, and WRLVL_EN_OFFSET.
Referenced by sdram_init().
Definition at line 142 of file ux00ddr.h.
References _REG32, and DRAM_CLASS_OFFSET.
Referenced by sdram_init().
Definition at line 96 of file ux00ddr.h.
References _REG32, and LEVELING_OPERATION_COMPLETED_OFFSET.
Referenced by sdram_init().
Definition at line 77 of file ux00ddr.h.
References _REG32, and MC_INIT_COMPLETE_OFFSET.
Referenced by sdram_init().
Definition at line 83 of file ux00ddr.h.
References _REG32, MULTIPLE_OUT_OF_RANGE_OFFSET, and OUT_OF_RANGE_OFFSET.
Referenced by sdram_init().
Definition at line 90 of file ux00ddr.h.
References _REG32, and PORT_COMMAND_CHANNEL_ERROR_OFFSET.
Referenced by sdram_init().
Definition at line 146 of file ux00ddr.h.
References _REG32, PHY_RX_CAL_DQ0_0_OFFSET, and PHY_RX_CAL_DQ1_0_OFFSET.
Referenced by sdram_init().
Definition at line 102 of file ux00ddr.h.
References _REG32, AXI0_ADDRESS_RANGE_ENABLE, AXI0_RANGE_PROT_BITS_0_OFFSET, and PORT_ADDR_PROTECTION_EN_OFFSET.
Referenced by sdram_init().
Definition at line 63 of file ux00ddr.h.
References _REG32, and MC_INIT_COMPLETE_OFFSET.
Referenced by sdram_init().
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inlinestatic |
Definition at line 50 of file ux00ddr.h.
References phy_reset().
Referenced by sdram_init().