coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
early_serial.c
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <arch/io.h>
4 #include <device/pnp_ops.h>
5 #include <device/pnp_def.h>
6 #include <stdint.h>
7 
8 #include "smscsuperio.h"
9 
10 #define SMSC_ENTRY_KEY 0x55
11 #define SMSC_EXIT_KEY 0xAA
12 
13 /* Enable configuration: pass entry key '0x87' into index port dev. */
15 {
16  u16 port = dev >> 8;
18 }
19 
20 /* Disable configuration: pass exit key '0xAA' into index port dev. */
22 {
23  u16 port = dev >> 8;
25 }
26 
27 /**
28  * Enable the specified serial port.
29  *
30  * @param dev The device to use.
31  * @param iobase The I/O base of the serial port (usually 0x3f8/0x2f8).
32  */
34 {
37  pnp_set_enable(dev, 0);
38  pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
39  switch (iobase) {
40  case 0x03f8:
41  pnp_set_irq(dev, PNP_IDX_IRQ0, 4);
42  break;
43  case 0x02f8:
44  pnp_set_irq(dev, PNP_IDX_IRQ0, 3);
45  break;
46  }
47  pnp_set_enable(dev, 1);
49 }
void pnp_exit_conf_state(pnp_devfn_t dev)
Definition: early_serial.c:38
void pnp_enter_conf_state(pnp_devfn_t dev)
Definition: early_serial.c:30
void outb(u8 val, u16 port)
port
Definition: i915.h:29
#define PNP_IDX_IO0
Definition: pnp_def.h:5
#define PNP_IDX_IRQ0
Definition: pnp_def.h:10
void pnp_set_irq(struct device *dev, u8 index, u8 irq)
Definition: pnp_device.c:100
void pnp_set_logical_device(struct device *dev)
Definition: pnp_device.c:59
void pnp_set_enable(struct device *dev, int enable)
Definition: pnp_device.c:64
void pnp_set_iobase(struct device *dev, u8 index, u16 iobase)
Definition: pnp_device.c:93
u32 pnp_devfn_t
Definition: pnp_type.h:8
#define SMSC_EXIT_KEY
Definition: early_serial.c:11
void smscsuperio_enable_serial(pnp_devfn_t dev, u16 iobase)
Enable the specified serial port.
Definition: early_serial.c:33
#define SMSC_ENTRY_KEY
Definition: early_serial.c:10
uint16_t u16
Definition: stdint.h:48