coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
heci.h
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #ifndef _SOC_APOLLOLAKE_HECI_H_
4 #define _SOC_APOLLOLAKE_HECI_H_
5 
6 #include <stdint.h>
7 
8 enum sec_status {
18 };
19 
20 #define REG_SEC_FW_STS0 0x40
21 #define MASK_SEC_FIRMWARE_COMPLETE (1 << 9)
22 #define MASK_SEC_STATUS 0xf
23 
24 /* Read Firmware Status register */
25 uint32_t heci_fw_sts(void);
26 /* Returns true if CSE is in normal status */
27 bool heci_cse_normal(void);
28 /* Returns true if CSE is done with whatever it was doing */
29 bool heci_cse_done(void);
30 
31 /* Dump CSE state and lockdown HECI1 interface using P2SB message. */
32 void heci_cse_lockdown(void);
33 
34 #endif
void heci_cse_lockdown(void)
Definition: cse.c:201
bool heci_cse_normal(void)
Definition: heci.c:14
uint32_t heci_fw_sts(void)
Definition: heci.c:9
bool heci_cse_done(void)
Definition: heci.c:19
sec_status
Definition: heci.h:8
@ SEC_STATE_UNKNOWN1
Definition: heci.h:13
@ SEC_STATE_DISABLE_WAIT
Definition: heci.h:15
@ SEC_STATE_NORMAL
Definition: heci.h:14
@ SEC_STATE_TRANSITION
Definition: heci.h:16
@ SEC_STATE_INIT
Definition: heci.h:10
@ SEC_STATE_RECOVERY
Definition: heci.h:11
@ SEC_STATE_INVALID_CPU
Definition: heci.h:17
@ SEC_STATE_UNKNOWN0
Definition: heci.h:12
@ SEC_STATE_RESET
Definition: heci.h:9
unsigned int uint32_t
Definition: stdint.h:14