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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <stdint.h>
Go to the source code of this file.
Macros | |
#define | REG_SEC_FW_STS0 0x40 |
#define | MASK_SEC_FIRMWARE_COMPLETE (1 << 9) |
#define | MASK_SEC_STATUS 0xf |
Enumerations | |
enum | sec_status { SEC_STATE_RESET = 0 , SEC_STATE_INIT , SEC_STATE_RECOVERY , SEC_STATE_UNKNOWN0 , SEC_STATE_UNKNOWN1 , SEC_STATE_NORMAL , SEC_STATE_DISABLE_WAIT , SEC_STATE_TRANSITION , SEC_STATE_INVALID_CPU } |
Functions | |
uint32_t | heci_fw_sts (void) |
bool | heci_cse_normal (void) |
bool | heci_cse_done (void) |
void | heci_cse_lockdown (void) |
enum sec_status |
Definition at line 19 of file heci.c.
References heci_fw_sts(), and MASK_SEC_FIRMWARE_COMPLETE.
Referenced by cf9_reset_prepare().
Definition at line 201 of file cse.c.
References CONFIG, dump_cse_state(), and heci1_disable().
Referenced by platform_fsp_notify_status().
Definition at line 14 of file heci.c.
References heci_fw_sts(), MASK_SEC_STATUS, and SEC_STATE_NORMAL.
Referenced by cf9_reset_prepare().
Definition at line 9 of file heci.c.
References PCH_DEV_CSE, pci_read_config32(), and REG_SEC_FW_STS0.
Referenced by heci_cse_done(), and heci_cse_normal().