coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
heci.c
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <
device/device.h
>
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#include <
device/pci_def.h
>
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#include <
device/pci_ops.h
>
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#include <
soc/heci.h
>
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#include <soc/pci_devs.h>
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uint32_t
heci_fw_sts
(
void
)
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{
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return
pci_read_config32
(
PCH_DEV_CSE
,
REG_SEC_FW_STS0
);
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}
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bool
heci_cse_normal
(
void
)
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{
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return
((
heci_fw_sts
() &
MASK_SEC_STATUS
) ==
SEC_STATE_NORMAL
);
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}
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bool
heci_cse_done
(
void
)
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{
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return
(!!(
heci_fw_sts
() &
MASK_SEC_FIRMWARE_COMPLETE
));
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}
heci_cse_normal
bool heci_cse_normal(void)
Definition:
heci.c:14
heci_fw_sts
uint32_t heci_fw_sts(void)
Definition:
heci.c:9
heci_cse_done
bool heci_cse_done(void)
Definition:
heci.c:19
heci.h
REG_SEC_FW_STS0
#define REG_SEC_FW_STS0
Definition:
heci.h:20
MASK_SEC_FIRMWARE_COMPLETE
#define MASK_SEC_FIRMWARE_COMPLETE
Definition:
heci.h:21
MASK_SEC_STATUS
#define MASK_SEC_STATUS
Definition:
heci.h:22
SEC_STATE_NORMAL
@ SEC_STATE_NORMAL
Definition:
heci.h:14
device.h
pci_ops.h
pci_read_config32
static __always_inline u32 pci_read_config32(const struct device *dev, u16 reg)
Definition:
pci_ops.h:58
pci_def.h
PCH_DEV_CSE
#define PCH_DEV_CSE
Definition:
pci_devs.h:150
uint32_t
unsigned int uint32_t
Definition:
stdint.h:14
src
soc
intel
apollolake
heci.c
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