coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
addressmap.h
Go to the documentation of this file.
1
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __SOC_MEDIATEK_MT8195_INCLUDE_SOC_ADDRESSMAP_H__
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#define __SOC_MEDIATEK_MT8195_INCLUDE_SOC_ADDRESSMAP_H__
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enum
{
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MCUSYS_BASE
= 0x0C530000,
8
MCUPM_SRAM_BASE
= 0x0C540000,
9
MCUPM_CFG_BASE
= 0x0C560000,
10
BUS_TRACE_MONITOR_BASE
= 0x0D040000,
11
IO_PHYS
= 0x10000000,
12
};
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enum
{
15
MCUCFG_BASE
=
MCUSYS_BASE
+ 0x00008000,
16
};
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18
enum
{
19
CKSYS_BASE
=
IO_PHYS
,
20
INFRACFG_AO_BASE
=
IO_PHYS
+ 0x00001000,
21
INFRACFG_AO_MEM_BASE
=
IO_PHYS
+ 0x00002000,
22
GPIO_BASE
=
IO_PHYS
+ 0x00005000,
23
SPM_BASE
=
IO_PHYS
+ 0x00006000,
24
RGU_BASE
=
IO_PHYS
+ 0x00007000,
25
GPT_BASE
=
IO_PHYS
+ 0x00008000,
26
EINT_BASE
=
IO_PHYS
+ 0x0000B000,
27
APMIXED_BASE
=
IO_PHYS
+ 0x0000C000,
28
SYSTIMER_BASE
=
IO_PHYS
+ 0x00017000,
29
INFRACFG_AO_BCRM_BASE
=
IO_PHYS
+ 0x00022000,
30
PMIF_SPI_BASE
=
IO_PHYS
+ 0x00024000,
31
PMICSPI_MST_BASE
=
IO_PHYS
+ 0x00025000,
32
PMIF_SPMI_BASE
=
IO_PHYS
+ 0x00027000,
33
SPMI_MST_BASE
=
IO_PHYS
+ 0x00029000,
34
DEVAPC_INFRA_AO_BASE
=
IO_PHYS
+ 0x00030000,
35
DEVAPC_PERI_AO_BASE
=
IO_PHYS
+ 0x00034000,
36
DEVAPC_PERI2_AO_BASE
=
IO_PHYS
+ 0x00038000,
37
DEVAPC_PERI_PAR_AO_BASE
=
IO_PHYS
+ 0x0003C000,
38
DEVAPC_FMEM_AO_BASE
=
IO_PHYS
+ 0x00044000,
39
DBG_TRACKER_BASE
=
IO_PHYS
+ 0x00208000,
40
PERI_TRACKER_BASE
=
IO_PHYS
+ 0x00218000,
41
EMI0_BASE
=
IO_PHYS
+ 0x00219000,
42
EMI1_BASE
=
IO_PHYS
+ 0x0021D000,
43
I2C_DMA_BASE
=
IO_PHYS
+ 0x00220080,
44
EMI1_SUB_BASE
=
IO_PHYS
+ 0x00225000,
45
EMI0_MPU_BASE
=
IO_PHYS
+ 0x00226000,
46
DEVAPC_INFRA2_AO_BASE
=
IO_PHYS
+ 0x00228000,
47
DRAMC_CHA_AO_BASE
=
IO_PHYS
+ 0x00230000,
48
INFRA_TRACKER_BASE
=
IO_PHYS
+ 0x00314000,
49
SSPM_SRAM_BASE
=
IO_PHYS
+ 0x00400000,
50
SSPM_CFG_BASE
=
IO_PHYS
+ 0x00440000,
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SCP_CFG_BASE
=
IO_PHYS
+ 0x00700000,
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SCP_ADSP_CFG_BASE
=
IO_PHYS
+ 0x00720000,
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DPM_PM_SRAM_BASE
=
IO_PHYS
+ 0x00900000,
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DPM_DM_SRAM_BASE
=
IO_PHYS
+ 0x00920000,
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DPM_CFG_BASE
=
IO_PHYS
+ 0x00940000,
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DPM_PM_SRAM_BASE2
=
IO_PHYS
+ 0x00A00000,
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DPM_DM_SRAM_BASE2
=
IO_PHYS
+ 0x00A20000,
58
DPM_CFG_BASE2
=
IO_PHYS
+ 0x00A40000,
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UART0_BASE
=
IO_PHYS
+ 0x01001100,
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AUXADC_BASE
=
IO_PHYS
+ 0x01002000,
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PERICFG_AO_BASE
=
IO_PHYS
+ 0x01003000,
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SPI0_BASE
=
IO_PHYS
+ 0x0100A000,
63
SPI1_BASE
=
IO_PHYS
+ 0x01010000,
64
SPI2_BASE
=
IO_PHYS
+ 0x01012000,
65
SPI3_BASE
=
IO_PHYS
+ 0x01013000,
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SPI4_BASE
=
IO_PHYS
+ 0x01018000,
67
SPI5_BASE
=
IO_PHYS
+ 0x01019000,
68
SPIS0_BASE
=
IO_PHYS
+ 0x0101D000,
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SPIS1_BASE
=
IO_PHYS
+ 0x0101E000,
70
SSUSB_IPPC_BASE
=
IO_PHYS
+ 0x01203E00,
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MSDC0_BASE
=
IO_PHYS
+ 0x01230000,
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UFSHCI_BASE
=
IO_PHYS
+ 0x01270000,
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SFLASH_REG_BASE
=
IO_PHYS
+ 0x0132C000,
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EFUSEC_BASE
=
IO_PHYS
+ 0x01C10000,
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MIPITX_BASE
=
IO_PHYS
+ 0x01C80000,
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IOCFG_BM_BASE
=
IO_PHYS
+ 0x01D10000,
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IOCFG_BL_BASE
=
IO_PHYS
+ 0x01D30000,
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IOCFG_BR_BASE
=
IO_PHYS
+ 0x01D40000,
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I2C_BASE
=
IO_PHYS
+ 0x01E00000,
80
IOCFG_LM_BASE
=
IO_PHYS
+ 0x01E20000,
81
SSUSB_SIF_BASE
=
IO_PHYS
+ 0x01E40300,
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IOCFG_RB_BASE
=
IO_PHYS
+ 0x01EB0000,
83
IOCFG_TL_BASE
=
IO_PHYS
+ 0x01F40000,
84
MSDC0_TOP_BASE
=
IO_PHYS
+ 0x01F50000,
85
APU_MBOX_BASE
=
IO_PHYS
+ 0x09000000,
86
APUSYS_APC_AO_BASE
=
IO_PHYS
+ 0x090F8000,
87
APUSYS_NOC_DAPC_AO_BASE
=
IO_PHYS
+ 0x090FC000,
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DISP_OVL0_BASE
=
IO_PHYS
+ 0x0C000000,
89
DISP_RDMA0_BASE
=
IO_PHYS
+ 0x0C002000,
90
DISP_COLOR0_BASE
=
IO_PHYS
+ 0x0C003000,
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DISP_CCORR0_BASE
=
IO_PHYS
+ 0x0C004000,
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DISP_AAL0_BASE
=
IO_PHYS
+ 0x0C005000,
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DISP_GAMMA0_BASE
=
IO_PHYS
+ 0x0C006000,
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DISP_DITHER0_BASE
=
IO_PHYS
+ 0x0C007000,
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DSI0_BASE
=
IO_PHYS
+ 0x0C008000,
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DISP_DSC0_BASE
=
IO_PHYS
+ 0x0C009000,
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DISP_OVL1_BASE
=
IO_PHYS
+ 0x0C00A000,
98
DISP_MERGE0_BASE
=
IO_PHYS
+ 0x0C014000,
99
DP_INTF0_BASE
=
IO_PHYS
+ 0x0C015000,
100
DISP_MUTEX_BASE
=
IO_PHYS
+ 0x0C016000,
101
SMI_LARB0
=
IO_PHYS
+ 0x0C018000,
102
VDOSYS0_BASE
=
IO_PHYS
+ 0x0C01A000,
103
SMI_BASE
=
IO_PHYS
+ 0x0C01B000,
104
EDP_BASE
=
IO_PHYS
+ 0x0C500000,
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};
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#endif
RGU_BASE
@ RGU_BASE
Definition:
addressmap.h:20
INFRACFG_AO_BASE
@ INFRACFG_AO_BASE
Definition:
addressmap.h:15
I2C_DMA_BASE
@ I2C_DMA_BASE
Definition:
addressmap.h:39
SPM_BASE
@ SPM_BASE
Definition:
addressmap.h:19
DSI0_BASE
@ DSI0_BASE
Definition:
addressmap.h:54
APMIXED_BASE
@ APMIXED_BASE
Definition:
addressmap.h:30
UART0_BASE
@ UART0_BASE
Definition:
addressmap.h:36
EINT_BASE
@ EINT_BASE
Definition:
addressmap.h:22
MCUCFG_BASE
@ MCUCFG_BASE
Definition:
addressmap.h:27
DISP_COLOR0_BASE
@ DISP_COLOR0_BASE
Definition:
addressmap.h:50
DISP_OVL1_BASE
@ DISP_OVL1_BASE
Definition:
addressmap.h:46
DISP_RDMA0_BASE
@ DISP_RDMA0_BASE
Definition:
addressmap.h:47
GPIO_BASE
@ GPIO_BASE
Definition:
addressmap.h:18
CKSYS_BASE
@ CKSYS_BASE
Definition:
addressmap.h:14
DISP_MUTEX_BASE
@ DISP_MUTEX_BASE
Definition:
addressmap.h:56
GPT_BASE
@ GPT_BASE
Definition:
addressmap.h:21
SFLASH_REG_BASE
@ SFLASH_REG_BASE
Definition:
addressmap.h:40
SSUSB_IPPC_BASE
@ SSUSB_IPPC_BASE
Definition:
addressmap.h:42
SSUSB_SIF_BASE
@ SSUSB_SIF_BASE
Definition:
addressmap.h:43
I2C_BASE
@ I2C_BASE
Definition:
addressmap.h:38
DISP_OVL0_BASE
@ DISP_OVL0_BASE
Definition:
addressmap.h:45
IO_PHYS
@ IO_PHYS
Definition:
addressmap.h:10
DISP_AAL0_BASE
@ DISP_AAL0_BASE
Definition:
addressmap.h:57
SPI2_BASE
@ SPI2_BASE
Definition:
addressmap.h:32
IOCFG_LM_BASE
@ IOCFG_LM_BASE
Definition:
addressmap.h:43
AUXADC_BASE
@ AUXADC_BASE
Definition:
addressmap.h:27
EFUSEC_BASE
@ EFUSEC_BASE
Definition:
addressmap.h:45
SSPM_SRAM_BASE
@ SSPM_SRAM_BASE
Definition:
addressmap.h:24
DISP_GAMMA0_BASE
@ DISP_GAMMA0_BASE
Definition:
addressmap.h:58
SSPM_CFG_BASE
@ SSPM_CFG_BASE
Definition:
addressmap.h:25
MIPITX_BASE
@ MIPITX_BASE
Definition:
addressmap.h:41
SMI_BASE
@ SMI_BASE
Definition:
addressmap.h:63
SPI3_BASE
@ SPI3_BASE
Definition:
addressmap.h:33
IOCFG_RB_BASE
@ IOCFG_RB_BASE
Definition:
addressmap.h:40
IOCFG_TL_BASE
@ IOCFG_TL_BASE
Definition:
addressmap.h:47
SPI4_BASE
@ SPI4_BASE
Definition:
addressmap.h:34
IOCFG_BL_BASE
@ IOCFG_BL_BASE
Definition:
addressmap.h:44
DISP_CCORR0_BASE
@ DISP_CCORR0_BASE
Definition:
addressmap.h:56
SPI1_BASE
@ SPI1_BASE
Definition:
addressmap.h:31
SPI5_BASE
@ SPI5_BASE
Definition:
addressmap.h:35
DISP_DITHER0_BASE
@ DISP_DITHER0_BASE
Definition:
addressmap.h:59
SMI_LARB0
@ SMI_LARB0
Definition:
addressmap.h:62
SPI0_BASE
@ SPI0_BASE
Definition:
addressmap.h:30
DRAMC_CHA_AO_BASE
@ DRAMC_CHA_AO_BASE
Definition:
addressmap.h:50
DBG_TRACKER_BASE
@ DBG_TRACKER_BASE
Definition:
addressmap.h:47
SYSTIMER_BASE
@ SYSTIMER_BASE
Definition:
addressmap.h:35
EMI0_MPU_BASE
@ EMI0_MPU_BASE
Definition:
addressmap.h:49
EMI0_BASE
@ EMI0_BASE
Definition:
addressmap.h:48
MSDC0_BASE
@ MSDC0_BASE
Definition:
addressmap.h:74
MSDC0_TOP_BASE
@ MSDC0_TOP_BASE
Definition:
addressmap.h:79
MCUSYS_BASE
@ MCUSYS_BASE
Definition:
addressmap.h:7
MCUPM_CFG_BASE
@ MCUPM_CFG_BASE
Definition:
addressmap.h:9
MCUPM_SRAM_BASE
@ MCUPM_SRAM_BASE
Definition:
addressmap.h:8
BUS_TRACE_MONITOR_BASE
@ BUS_TRACE_MONITOR_BASE
Definition:
addressmap.h:10
DEVAPC_FMEM_AO_BASE
@ DEVAPC_FMEM_AO_BASE
Definition:
addressmap.h:38
UFSHCI_BASE
@ UFSHCI_BASE
Definition:
addressmap.h:64
DPM_PM_SRAM_BASE
@ DPM_PM_SRAM_BASE
Definition:
addressmap.h:49
PMIF_SPMI_BASE
@ PMIF_SPMI_BASE
Definition:
addressmap.h:31
INFRA_TRACKER_BASE
@ INFRA_TRACKER_BASE
Definition:
addressmap.h:45
PMIF_SPI_BASE
@ PMIF_SPI_BASE
Definition:
addressmap.h:30
DEVAPC_INFRA_AO_BASE
@ DEVAPC_INFRA_AO_BASE
Definition:
addressmap.h:34
APU_MBOX_BASE
@ APU_MBOX_BASE
Definition:
addressmap.h:94
PMICSPI_MST_BASE
@ PMICSPI_MST_BASE
Definition:
addressmap.h:32
IOCFG_BR_BASE
@ IOCFG_BR_BASE
Definition:
addressmap.h:70
SCP_CFG_BASE
@ SCP_CFG_BASE
Definition:
addressmap.h:48
INFRACFG_AO_MEM_BASE
@ INFRACFG_AO_MEM_BASE
Definition:
addressmap.h:21
SPMI_MST_BASE
@ SPMI_MST_BASE
Definition:
addressmap.h:33
DEVAPC_PERI_AO_BASE
@ DEVAPC_PERI_AO_BASE
Definition:
addressmap.h:35
DEVAPC_PERI2_AO_BASE
@ DEVAPC_PERI2_AO_BASE
Definition:
addressmap.h:36
DPM_CFG_BASE
@ DPM_CFG_BASE
Definition:
addressmap.h:51
IOCFG_BM_BASE
@ IOCFG_BM_BASE
Definition:
addressmap.h:68
DPM_DM_SRAM_BASE
@ DPM_DM_SRAM_BASE
Definition:
addressmap.h:50
PERI_TRACKER_BASE
@ PERI_TRACKER_BASE
Definition:
addressmap.h:40
DEVAPC_PERI_PAR_AO_BASE
@ DEVAPC_PERI_PAR_AO_BASE
Definition:
addressmap.h:37
SPIS0_BASE
@ SPIS0_BASE
Definition:
addressmap.h:68
DPM_PM_SRAM_BASE2
@ DPM_PM_SRAM_BASE2
Definition:
addressmap.h:56
DISP_DSC0_BASE
@ DISP_DSC0_BASE
Definition:
addressmap.h:96
APUSYS_NOC_DAPC_AO_BASE
@ APUSYS_NOC_DAPC_AO_BASE
Definition:
addressmap.h:87
DPM_CFG_BASE2
@ DPM_CFG_BASE2
Definition:
addressmap.h:58
DP_INTF0_BASE
@ DP_INTF0_BASE
Definition:
addressmap.h:99
PERICFG_AO_BASE
@ PERICFG_AO_BASE
Definition:
addressmap.h:61
VDOSYS0_BASE
@ VDOSYS0_BASE
Definition:
addressmap.h:102
DISP_MERGE0_BASE
@ DISP_MERGE0_BASE
Definition:
addressmap.h:98
EDP_BASE
@ EDP_BASE
Definition:
addressmap.h:104
SCP_ADSP_CFG_BASE
@ SCP_ADSP_CFG_BASE
Definition:
addressmap.h:52
APUSYS_APC_AO_BASE
@ APUSYS_APC_AO_BASE
Definition:
addressmap.h:86
EMI1_BASE
@ EMI1_BASE
Definition:
addressmap.h:42
INFRACFG_AO_BCRM_BASE
@ INFRACFG_AO_BCRM_BASE
Definition:
addressmap.h:29
DPM_DM_SRAM_BASE2
@ DPM_DM_SRAM_BASE2
Definition:
addressmap.h:57
SPIS1_BASE
@ SPIS1_BASE
Definition:
addressmap.h:69
EMI1_SUB_BASE
@ EMI1_SUB_BASE
Definition:
addressmap.h:44
DEVAPC_INFRA2_AO_BASE
@ DEVAPC_INFRA2_AO_BASE
Definition:
addressmap.h:46
src
soc
mediatek
mt8195
include
soc
addressmap.h
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