coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
mainboard.c
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <bootstate.h>
4 #include <console/console.h>
5 #include <device/device.h>
6 #include <device/pci_ops.h>
11 
12 #include <baseboard/sch5545_ec.h>
13 
14 #define SIO_PORT 0x2e
15 
16 #define GPIO_CHASSIS_ID0 1
17 #define GPIO_VGA_CABLE_DET_L 4
18 #define GPIO_SKU2 7
19 #define GPIO_CHASSIS_ID1 17
20 /* Internal USB header on mainboard */
21 #define FLEXBAY_HEADER_CABLE_DET_L 20
22 #define GPIO_BOARD_REV0 21
23 /* Password clear jumper */
24 #define GPIO_PSWD_CLR 31
25 #define GPIO_SKU0 32
26 #define GPIO_SKU1 35
27 #define GPIO_CHASSIS_ID2 37
28 /* Front panel presence */
29 #define GPIO_FRONT_PANEL_PRESENT_L 39
30 #define GPIO_INTRUDER_CABLE_DET_L 44
31 #define GPIO_BOARD_REV1 46
32 #define GPIO_BOARD_REV2 68
33 /* Front USB 3.0 ports */
34 #define GPIO_USB_HEADER_DET_L 69
35 /* Differentiate between MT/DT on the Medium Tower and Desktop variants */
36 #define GPIO_FRONT_PANEL_CHASSIS_DET_L 70
37 /*
38  * This GPIO is connected to the transistor gate. If high, it will pull the
39  * HDA_SDO high. When strapped at PCH_PWROK it will enable the Flash Descriptor
40  * Security Override and disable ME after chipset bringup. Alternative method
41  * is to use the service jumper on the mainboard.
42  */
43 #define GPIO_ME_MFG_MODE 74
44 
45 /* These GPIOs are on SCH5545 */
46 
47 /* Detect if the power switch cable is connected */
48 #define SIO_GPIO_FP_CBL_DET_L 25
49 /* Detect internal speaker connected to front cover */
50 #define SIO_GPIO_PCSPKR_DET_L 31
51 
52 static void mainboard_enable(struct device *dev)
53 {
54  int pin_sts;
58 
59  pin_sts = get_gpio(GPIO_CHASSIS_ID0);
60  pin_sts |= get_gpio(GPIO_CHASSIS_ID1) << 1;
61  pin_sts |= get_gpio(GPIO_CHASSIS_ID2) << 2;
63 
64  printk(BIOS_DEBUG, "Chassis type: ");
65  switch (pin_sts) {
66  case 0:
67  printk(BIOS_DEBUG, "MT\n");
68  break;
69  case 3:
70  case 11:
71  printk(BIOS_DEBUG, "USFF\n");
72  break;
73  case 4:
74  /* As per table in schematics, but don't know what this is */
75  printk(BIOS_DEBUG, "Comoros\n");
76  break;
77  case 1:
78  case 9:
79  case 5:
80  case 13:
81  printk(BIOS_DEBUG, "SFF\n");
82  break;
83  case 8:
84  printk(BIOS_DEBUG, "DT\n");
85  break;
86  default:
87  printk(BIOS_DEBUG, "Unknown chassis type %u\n", pin_sts);
88  break;
89  }
90 
91  pin_sts = get_gpio(GPIO_BOARD_REV0);
92  pin_sts |= get_gpio(GPIO_BOARD_REV1) << 1;
93  pin_sts |= get_gpio(GPIO_BOARD_REV2) << 2;
94 
95  printk(BIOS_DEBUG, "Board revision: %d\n", pin_sts);
96 
97  pin_sts = get_gpio(GPIO_SKU0);
98  pin_sts |= get_gpio(GPIO_SKU1) << 1;
99  pin_sts |= get_gpio(GPIO_SKU2) << 2;
100 
101  printk(BIOS_DEBUG, "SKU ID is %d:", pin_sts);
102  switch (pin_sts) {
103  case 0:
104  printk(BIOS_DEBUG, "TPM\n");
105  break;
106  case 1:
107  printk(BIOS_DEBUG, "TCM\n");
108  break;
109  case 2:
110  printk(BIOS_DEBUG, "Non TPM/TCM\n");
111  break;
112  default:
113  printk(BIOS_DEBUG, "Unknown/reserved\n");
114  break;
115  }
116 
117  printk(BIOS_DEBUG, "VGA cable %sconnected\n",
118  get_gpio(GPIO_VGA_CABLE_DET_L) ? "dis" : "");
119 
120  printk(BIOS_DEBUG, "Flexbay %sattached to internal USB 2.0 header\n",
121  get_gpio(FLEXBAY_HEADER_CABLE_DET_L) ? "not " : "");
122 
123  printk(BIOS_DEBUG, "Password clear jumper %sactive\n",
124  get_gpio(GPIO_PSWD_CLR) ? "in" : "");
125 
127  printk(BIOS_DEBUG, "Front panel cable connected\n");
128  } else {
129  printk(BIOS_WARNING, "Front panel cable not connected!\n");
130  printk(BIOS_WARNING, "Front USB 2.0 ports, SATA LED, microphone"
131  " and speaker jacks will not work!\n");
132  printk(BIOS_WARNING, "Check the front panel cable!\n");
133  }
134 
136  printk(BIOS_DEBUG, "Intruder cable connected\n");
137  } else {
138  printk(BIOS_WARNING, "Intruder cable not connected!\n");
139  printk(BIOS_WARNING, "Intrusion detection will not work!\n");
140  printk(BIOS_WARNING, "Check the intruder cable!\n");
141  }
142 
144  printk(BIOS_DEBUG, "Front USB 3.0 cable connected\n");
145  } else {
146  printk(BIOS_WARNING, "Front USB 3.0 cable not connected!\n");
147  printk(BIOS_WARNING, "Front USB 3.0 ports will not work!\n");
148  printk(BIOS_WARNING, "Check the front USB 3.0 cable!\n");
149  }
150 }
151 
152 static void mainboard_final(void *chip_info)
153 {
154  int pin_sts;
155  struct device *dev = pcidev_on_root(0x1f, 0);
156  const u8 pirq_routing = 11;
157 
158  pci_write_config8(dev, PIRQA_ROUT, pirq_routing);
159  pci_write_config8(dev, PIRQB_ROUT, pirq_routing);
160  pci_write_config8(dev, PIRQC_ROUT, pirq_routing);
161  pci_write_config8(dev, PIRQD_ROUT, pirq_routing);
162 
163  pci_write_config8(dev, PIRQE_ROUT, pirq_routing);
164  pci_write_config8(dev, PIRQF_ROUT, pirq_routing);
165  pci_write_config8(dev, PIRQG_ROUT, pirq_routing);
166  pci_write_config8(dev, PIRQH_ROUT, pirq_routing);
167 
169 
170  if (pin_sts != -1) {
171  if (pin_sts) {
172  printk(BIOS_WARNING, "Power switch cable not connected!\n");
173  printk(BIOS_WARNING, "Check power switch cable!\n");
174  } else {
175  printk(BIOS_DEBUG, "Power switch cable connected\n");
176  }
177  }
178 
180 
181  if (pin_sts != -1)
182  printk(BIOS_DEBUG, "Internal chassis PC speaker %sconnected\n",
183  pin_sts ? "not " : "");
184 }
185 
188  .final = mainboard_final,
189 };
190 
struct chip_operations mainboard_ops
Definition: mainboard.c:19
@ BS_POST_DEVICE
Definition: bootstate.h:84
@ BS_ON_EXIT
Definition: bootstate.h:96
#define printk(level,...)
Definition: stdlib.h:16
#define GPIO_CHASSIS_ID1
Definition: mainboard.c:19
#define GPIO_PSWD_CLR
Definition: mainboard.c:24
#define GPIO_FRONT_PANEL_PRESENT_L
Definition: mainboard.c:29
#define GPIO_INTRUDER_CABLE_DET_L
Definition: mainboard.c:30
BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5545_ec_hwm_init, NULL)
#define GPIO_BOARD_REV0
Definition: mainboard.c:22
#define GPIO_BOARD_REV2
Definition: mainboard.c:32
#define GPIO_FRONT_PANEL_CHASSIS_DET_L
Definition: mainboard.c:36
#define GPIO_SKU0
Definition: mainboard.c:25
#define SIO_PORT
Definition: mainboard.c:14
#define SIO_GPIO_FP_CBL_DET_L
Definition: mainboard.c:48
#define GPIO_SKU1
Definition: mainboard.c:26
#define FLEXBAY_HEADER_CABLE_DET_L
Definition: mainboard.c:21
#define GPIO_USB_HEADER_DET_L
Definition: mainboard.c:34
#define GPIO_CHASSIS_ID2
Definition: mainboard.c:27
#define SIO_GPIO_PCSPKR_DET_L
Definition: mainboard.c:50
#define GPIO_CHASSIS_ID0
Definition: mainboard.c:16
static void mainboard_final(void *chip_info)
Definition: mainboard.c:152
#define GPIO_VGA_CABLE_DET_L
Definition: mainboard.c:17
#define GPIO_BOARD_REV1
Definition: mainboard.c:31
static void mainboard_enable(struct device *dev)
Definition: mainboard.c:52
#define GPIO_SKU2
Definition: mainboard.c:18
DEVTREE_CONST struct device * pcidev_on_root(uint8_t dev, uint8_t fn)
Definition: device_const.c:260
void install_intel_vga_int15_handler(int active_lfp_, int pfit_, int display_, int panel_type_)
Definition: int15.c:101
@ GMA_INT15_BOOT_DISPLAY_DEFAULT
Definition: int15.h:6
@ GMA_INT15_ACTIVE_LFP_NONE
Definition: int15.h:24
@ GMA_INT15_PANEL_FIT_DEFAULT
Definition: int15.h:17
int get_gpio(int community_base, int pad0_offset)
Definition: gpio_support.c:148
static __always_inline void pci_write_config8(const struct device *dev, u16 reg, u8 val)
Definition: pci_ops.h:64
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition: loglevel.h:128
#define BIOS_WARNING
BIOS_WARNING - Bad configuration.
Definition: loglevel.h:86
int sch5545_get_gpio(uint8_t sio_port, uint8_t gpio)
void sch5545_ec_hwm_init(void *unused)
Definition: sch5545_ec.c:366
#define PIRQE_ROUT
Definition: lpc.h:30
#define PIRQG_ROUT
Definition: lpc.h:32
#define PIRQB_ROUT
Definition: lpc.h:27
#define PIRQD_ROUT
Definition: lpc.h:29
#define PIRQC_ROUT
Definition: lpc.h:28
#define PIRQH_ROUT
Definition: lpc.h:33
#define PIRQA_ROUT
Definition: lpc.h:26
#define PIRQF_ROUT
Definition: lpc.h:31
#define NULL
Definition: stddef.h:19
uint8_t u8
Definition: stdint.h:45
void(* enable_dev)(struct device *dev)
Definition: device.h:24
Definition: device.h:107