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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <amdblocks/cpu.h>
#include <cpu/amd/mtrr.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
#include <soc/iomap.h>
Go to the source code of this file.
Functions | |
void | early_cache_setup (void) |
Definition at line 15 of file early_cache.c.
References ALIGN_DOWN, clear_all_var_mtrr(), disable_cache(), enable_cache(), FLASH_BASE_ADDR, msr_struct::hi, msr_struct::lo, MiB, MTRR_DEF_TYPE_EN, MTRR_DEF_TYPE_FIX_EN, MTRR_DEF_TYPE_MASK, MTRR_DEF_TYPE_MSR, MTRR_FIX_16K_80000, MTRR_FIX_16K_A0000, MTRR_FIX_4K_C0000, MTRR_FIX_4K_C8000, MTRR_FIX_4K_D0000, MTRR_FIX_4K_D8000, MTRR_FIX_4K_E0000, MTRR_FIX_4K_E8000, MTRR_FIX_4K_F0000, MTRR_FIX_4K_F8000, MTRR_FIX_64K_00000, MTRR_READ_MEM, MTRR_TYPE_UNCACHEABLE, MTRR_TYPE_WRBACK, MTRR_TYPE_WRPROT, MTRR_WRITE_MEM, NULL, rdmsr(), SYSCFG_MSR, SYSCFG_MSR_MtrrFixDramEn, SYSCFG_MSR_MtrrFixDramModEn, SYSCFG_MSR_MtrrVarDramEn, SYSCFG_MSR_TOM2En, SYSCFG_MSR_TOM2WB, TOP_MEM, var_mtrr_context_init(), var_mtrr_set(), and wrmsr().
Referenced by bootblock_c_entry().