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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <device/mmio.h>
#include <device/pci_ops.h>
#include <elog.h>
#include <intelblocks/xhci.h>
#include <soc/pci_devs.h>
#include <stdint.h>
Go to the source code of this file.
Macros | |
#define | XHCI_STATUS_WDE (1 << 26) |
#define | XHCI_STATUS_WCE (1 << 25) |
#define | XHCI_STATUS_PLC (1 << 22) |
#define | XHCI_STATUS_CSC (1 << 17) |
#define | XHCI_STATUS_PLS_SHIFT (5) |
#define | XHCI_STATUS_PLS_MASK (0xF << XHCI_STATUS_PLS_SHIFT) |
#define | XHCI_STATUS_PLS_RESUME (15 << XHCI_STATUS_PLS_SHIFT) |
Functions | |
static bool | xhci_csc_set (uint32_t port_status) |
static bool | xhci_wake_capable (uint32_t port_status) |
static bool | xhci_plc_set (uint32_t port_status) |
static bool | xhci_resume (uint32_t port_status) |
static bool | xhci_port_wake_check (uintptr_t base, uint8_t num, uint8_t host_event, uint8_t event) |
bool | xhci_update_wake_event (const struct xhci_wake_info *wake_info, size_t wake_info_count) |
#define XHCI_STATUS_PLS_MASK (0xF << XHCI_STATUS_PLS_SHIFT) |
#define XHCI_STATUS_PLS_RESUME (15 << XHCI_STATUS_PLS_SHIFT) |
Definition at line 23 of file elog.c.
References XHCI_STATUS_CSC.
Referenced by xhci_port_wake_check().
Definition at line 34 of file elog.c.
References XHCI_STATUS_PLC.
Referenced by xhci_port_wake_check().
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static |
Definition at line 58 of file elog.c.
References base, elog_add_event_wake(), read32(), xhci_csc_set(), xhci_plc_set(), xhci_resume(), and xhci_wake_capable().
Referenced by xhci_update_wake_event().
Definition at line 39 of file elog.c.
References XHCI_STATUS_PLS_MASK, and XHCI_STATUS_PLS_RESUME.
Referenced by xhci_port_wake_check().
bool xhci_update_wake_event | ( | const struct xhci_wake_info * | wake_info, |
size_t | wake_info_count | ||
) |
Definition at line 98 of file elog.c.
References ELOG_WAKE_SOURCE_PME_XHCI_USB_2, ELOG_WAKE_SOURCE_PME_XHCI_USB_3, xhci_wake_info::elog_wake_type_host, xhci_usb_info::num_usb2_ports, xhci_usb_info::num_usb3_ports, PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_MEM_ATTR_MASK, PCI_DEV, PCI_FUNC, pci_s_read_config32(), PCI_SLOT, soc_get_xhci_usb_info(), xhci_usb_info::usb2_port_status_reg, xhci_usb_info::usb3_port_status_reg, usb_info, and xhci_port_wake_check().
Referenced by pch_log_pme_internal_wake_source(), and pch_log_wake_source().
Definition at line 28 of file elog.c.
References XHCI_STATUS_WCE, and XHCI_STATUS_WDE.
Referenced by xhci_port_wake_check().