7 #include <soc/pci_devs.h>
11 #define XHCI_STATUS_WDE (1 << 26)
13 #define XHCI_STATUS_WCE (1 << 25)
15 #define XHCI_STATUS_PLC (1 << 22)
17 #define XHCI_STATUS_CSC (1 << 17)
19 #define XHCI_STATUS_PLS_SHIFT (5)
20 #define XHCI_STATUS_PLS_MASK (0xF << XHCI_STATUS_PLS_SHIFT)
21 #define XHCI_STATUS_PLS_RESUME (15 << XHCI_STATUS_PLS_SHIFT)
63 for (i = 0; i < num; i++,
base += 0x10) {
68 if (port_status == 0xffffffff)
99 size_t wake_info_count)
103 bool event_found =
false;
106 for (i = 0; i < wake_info_count; ++i) {
static uint32_t read32(const void *addr)
#define ELOG_WAKE_SOURCE_PME_XHCI_USB_3
#define ELOG_WAKE_SOURCE_PME_XHCI_USB_2
int elog_add_event_wake(u8 source, u32 instance)
#define PCI_BASE_ADDRESS_MEM_ATTR_MASK
#define PCI_BASE_ADDRESS_0
static __always_inline uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t reg)
#define PCI_DEV(SEGBUS, DEV, FN)
static const struct xhci_usb_info usb_info
const struct xhci_usb_info * soc_get_xhci_usb_info(pci_devfn_t xhci_dev)
static bool xhci_wake_capable(uint32_t port_status)
#define XHCI_STATUS_PLS_MASK
static bool xhci_port_wake_check(uintptr_t base, uint8_t num, uint8_t host_event, uint8_t event)
static bool xhci_resume(uint32_t port_status)
static bool xhci_csc_set(uint32_t port_status)
bool xhci_update_wake_event(const struct xhci_wake_info *wake_info, size_t wake_info_count)
static bool xhci_plc_set(uint32_t port_status)
#define XHCI_STATUS_PLS_RESUME
uint32_t usb3_port_status_reg
uint32_t usb2_port_status_reg
uint8_t elog_wake_type_host