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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <baseboard/variants.h>
#include <boardid.h>
#include <device/device.h>
#include <drivers/usb/acpi/chip.h>
#include <fw_config.h>
#include <soc/soc_chip.h>
Go to the source code of this file.
Functions | |
static void | ext_vr_update (void) |
void | variant_devtree_update (void) |
Definition at line 10 of file ramstage.c.
References config_of_soc, soc_intel_jasperlake_config::disable_external_bypass_vr, FW_CONFIG, and fw_config_probe().
Referenced by variant_devtree_update().
Definition at line 17 of file ramstage.c.
References ACPI_GPIO_OUTPUT_ACTIVE_LOW, board_id(), config, config_of(), DEV_PTR, ext_vr_update(), GPP_H0, and NULL.