coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
ramstage.c
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <baseboard/variants.h>
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#include <
boardid.h
>
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#include <
device/device.h
>
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#include <
drivers/usb/acpi/chip.h
>
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#include <
fw_config.h
>
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#include <soc/soc_chip.h>
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static
void
ext_vr_update
(
void
)
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{
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struct
soc_intel_jasperlake_config
*cfg =
config_of_soc
();
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if
(
fw_config_probe
(
FW_CONFIG
(EXT_VR, EXT_VR_ABSENT)))
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cfg->
disable_external_bypass_vr
= 1;
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}
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void
variant_devtree_update
(
void
)
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{
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uint32_t
board_version =
board_id
();
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struct
device
*lte_usb2 =
DEV_PTR
(lte_usb2);
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struct
drivers_usb_acpi_config
*
config
;
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struct
acpi_gpio
lte_reset_gpio =
ACPI_GPIO_OUTPUT_ACTIVE_LOW
(
GPP_H0
);
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/* board version 9 is drawper EVT */
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if
(board_version > 9)
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return
;
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if
(lte_usb2 ==
NULL
)
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return
;
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config
=
config_of
(lte_usb2);
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config
->reset_gpio = lte_reset_gpio;
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ext_vr_update
();
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}
ACPI_GPIO_OUTPUT_ACTIVE_LOW
#define ACPI_GPIO_OUTPUT_ACTIVE_LOW(gpio)
Definition:
acpi_device.h:208
GPP_H0
#define GPP_H0
Definition:
gpio_soc_defs.h:215
boardid.h
chip.h
board_id
uint32_t board_id(void)
board_id() - Get the board version
Definition:
ec_boardid.c:6
fw_config.h
FW_CONFIG
#define FW_CONFIG(__field, __option)
Definition:
fw_config.h:28
device.h
DEV_PTR
#define DEV_PTR(_alias)
Definition:
device.h:403
config_of
static DEVTREE_CONST void * config_of(const struct device *dev)
Definition:
device.h:382
config_of_soc
#define config_of_soc()
Definition:
device.h:394
fw_config_probe
bool fw_config_probe(const struct fw_config *match)
Definition:
fw_config.c:62
variant_devtree_update
void variant_devtree_update(void)
Definition:
ramstage.c:63
config
enum board_config config
Definition:
memory.c:448
ext_vr_update
static void ext_vr_update(void)
Definition:
ramstage.c:10
NULL
#define NULL
Definition:
stddef.h:19
uint32_t
unsigned int uint32_t
Definition:
stdint.h:14
acpi_gpio
Definition:
acpi_device.h:164
device
Definition:
device.h:107
drivers_usb_acpi_config
Definition:
chip.h:10
soc_intel_jasperlake_config
Definition:
chip.h:26
soc_intel_jasperlake_config::disable_external_bypass_vr
bool disable_external_bypass_vr
Definition:
chip.h:402
src
mainboard
google
dedede
variants
drawcia
ramstage.c
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