coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
soc_amd_cezanne_config Struct Reference

#include <chip.h>

Collaboration diagram for soc_amd_cezanne_config:
Collaboration graph

Public Types

enum  {
  DOWNCORE_AUTO = 0 , DOWNCORE_1 = 1 , DOWNCORE_2 = 3 , DOWNCORE_3 = 4 ,
  DOWNCORE_4 = 6 , DOWNCORE_5 = 8 , DOWNCORE_6 = 9 , DOWNCORE_7 = 10
}
 
enum  { DXIO_PSPP_DISABLED = 0 , DXIO_PSPP_PERFORMANCE , DXIO_PSPP_BALANCED , DXIO_PSPP_POWERSAVE }
 

Data Fields

struct soc_amd_common_config common_config
 
u8 i2c_scl_reset
 
struct dw_i2c_bus_config i2c [I2C_CTRLR_COUNT]
 
struct i2c_pad_control i2c_pad [I2C_CTRLR_COUNT]
 
bool s0ix_enable
 
enum soc_amd_cezanne_config:: { ... }  downcore_mode
 
bool disable_smt
 
uint8_t stt_control
 
uint8_t stt_pcb_sensor_count
 
uint16_t stt_min_limit
 
uint16_t stt_m1
 
uint16_t stt_m2
 
uint16_t stt_m3
 
uint16_t stt_m4
 
uint16_t stt_m5
 
uint16_t stt_m6
 
uint16_t stt_c_apu
 
uint16_t stt_c_gpu
 
uint16_t stt_c_hs2
 
uint16_t stt_alpha_apu
 
uint16_t stt_alpha_gpu
 
uint16_t stt_alpha_hs2
 
uint16_t stt_skin_temp_apu
 
uint16_t stt_skin_temp_gpu
 
uint16_t stt_skin_temp_hs2
 
uint16_t stt_error_coeff
 
uint16_t stt_error_rate_coefficient
 
uint8_t stapm_boost
 
uint32_t stapm_time_constant_s
 
uint32_t apu_only_sppt_limit
 
uint32_t sustained_power_limit_mW
 
uint32_t fast_ppt_limit_mW
 
uint32_t slow_ppt_limit_mW
 
uint32_t slow_ppt_time_constant_s
 
uint32_t thermctl_limit_degreeC
 
uint8_t smartshift_enable
 
uint8_t system_configuration
 
uint8_t cppc_ctrl
 
uint8_t cppc_perf_limit_max_range
 
uint8_t cppc_perf_limit_min_range
 
uint8_t cppc_epp_max_range
 
uint8_t cppc_epp_min_range
 
uint8_t cppc_preferred_cores
 
uint32_t telemetry_vddcrvddfull_scale_current_mA
 
uint32_t telemetry_vddcrvddoffset
 
uint32_t telemetry_vddcrsocfull_scale_current_mA
 
uint32_t telemetry_vddcrsocoffset
 
uint8_t dptc_enable
 
uint32_t fast_ppt_limit_tablet_mode_mW
 
uint32_t slow_ppt_limit_tablet_mode_mW
 
uint32_t sustained_power_limit_tablet_mode_mW
 
uint32_t thermctl_limit_tablet_mode_degreeC
 
enum gpp_clk_req gpp_clk_config [GPP_CLK_OUTPUT_COUNT]
 
enum soc_amd_cezanne_config:: { ... }  pspp_policy
 
uint8_t usb_phy_custom
 
struct usb_phy_config usb_phy
 
uint8_t edp_phy_override
 
uint8_t edp_physel
 
struct {
   uint8_t   dp_vs_pemph_level
 
   uint8_t   tx_eq_main
 
   uint8_t   tx_eq_pre
 
   uint8_t   tx_eq_post
 
   uint8_t   tx_vboost_lvl
 
edp_tuningset
 

Detailed Description

Definition at line 21 of file chip.h.

Member Enumeration Documentation

◆ anonymous enum

anonymous enum
Enumerator
DOWNCORE_AUTO 
DOWNCORE_1 
DOWNCORE_2 
DOWNCORE_3 
DOWNCORE_4 
DOWNCORE_5 
DOWNCORE_6 
DOWNCORE_7 

Definition at line 30 of file chip.h.

◆ anonymous enum

anonymous enum
Enumerator
DXIO_PSPP_DISABLED 
DXIO_PSPP_PERFORMANCE 
DXIO_PSPP_BALANCED 
DXIO_PSPP_POWERSAVE 

Definition at line 103 of file chip.h.

Field Documentation

◆ apu_only_sppt_limit

uint32_t soc_amd_cezanne_config::apu_only_sppt_limit

Definition at line 65 of file chip.h.

◆ common_config

struct soc_amd_common_config soc_amd_cezanne_config::common_config

Definition at line 1 of file chip.h.

Referenced by acpi_fill_fadt(), and soc_get_common_config().

◆ cppc_ctrl

uint8_t soc_amd_cezanne_config::cppc_ctrl

Definition at line 76 of file chip.h.

◆ cppc_epp_max_range

uint8_t soc_amd_cezanne_config::cppc_epp_max_range

Definition at line 79 of file chip.h.

◆ cppc_epp_min_range

uint8_t soc_amd_cezanne_config::cppc_epp_min_range

Definition at line 80 of file chip.h.

◆ cppc_perf_limit_max_range

uint8_t soc_amd_cezanne_config::cppc_perf_limit_max_range

Definition at line 77 of file chip.h.

◆ cppc_perf_limit_min_range

uint8_t soc_amd_cezanne_config::cppc_perf_limit_min_range

Definition at line 78 of file chip.h.

◆ cppc_preferred_cores

uint8_t soc_amd_cezanne_config::cppc_preferred_cores

Definition at line 81 of file chip.h.

◆ disable_smt

bool soc_amd_cezanne_config::disable_smt

Definition at line 40 of file chip.h.

◆ 

enum { ... } soc_amd_cezanne_config::downcore_mode

◆ dp_vs_pemph_level

uint8_t soc_amd_cezanne_config::dp_vs_pemph_level

Definition at line 119 of file chip.h.

◆ dptc_enable

uint8_t soc_amd_cezanne_config::dptc_enable

Definition at line 90 of file chip.h.

◆ edp_phy_override

uint8_t soc_amd_cezanne_config::edp_phy_override

Definition at line 114 of file chip.h.

◆ edp_physel

uint8_t soc_amd_cezanne_config::edp_physel

Definition at line 116 of file chip.h.

◆ 

struct { ... } soc_amd_cezanne_config::edp_tuningset

◆ fast_ppt_limit_mW

uint32_t soc_amd_cezanne_config::fast_ppt_limit_mW

Definition at line 67 of file chip.h.

◆ fast_ppt_limit_tablet_mode_mW

uint32_t soc_amd_cezanne_config::fast_ppt_limit_tablet_mode_mW

Definition at line 93 of file chip.h.

◆ gpp_clk_config

enum gpp_clk_req soc_amd_cezanne_config::gpp_clk_config[GPP_CLK_OUTPUT_COUNT]

Definition at line 96 of file chip.h.

Referenced by gpp_clk_setup().

◆ i2c

struct dw_i2c_bus_config soc_amd_cezanne_config::i2c[I2C_CTRLR_COUNT]

Definition at line 23 of file chip.h.

◆ i2c_pad

struct i2c_pad_control soc_amd_cezanne_config::i2c_pad[I2C_CTRLR_COUNT]

Definition at line 23 of file chip.h.

◆ i2c_scl_reset

u8 soc_amd_cezanne_config::i2c_scl_reset

Definition at line 23 of file chip.h.

Referenced by reset_i2c_peripherals().

◆ 

enum { ... } soc_amd_cezanne_config::pspp_policy

◆ s0ix_enable

bool soc_amd_cezanne_config::s0ix_enable

Definition at line 28 of file chip.h.

Referenced by acpi_fill_fadt().

◆ slow_ppt_limit_mW

uint32_t soc_amd_cezanne_config::slow_ppt_limit_mW

Definition at line 68 of file chip.h.

◆ slow_ppt_limit_tablet_mode_mW

uint32_t soc_amd_cezanne_config::slow_ppt_limit_tablet_mode_mW

Definition at line 94 of file chip.h.

◆ slow_ppt_time_constant_s

uint32_t soc_amd_cezanne_config::slow_ppt_time_constant_s

Definition at line 69 of file chip.h.

◆ smartshift_enable

uint8_t soc_amd_cezanne_config::smartshift_enable

Definition at line 72 of file chip.h.

◆ stapm_boost

uint8_t soc_amd_cezanne_config::stapm_boost

Definition at line 63 of file chip.h.

◆ stapm_time_constant_s

uint32_t soc_amd_cezanne_config::stapm_time_constant_s

Definition at line 64 of file chip.h.

◆ stt_alpha_apu

uint16_t soc_amd_cezanne_config::stt_alpha_apu

Definition at line 54 of file chip.h.

◆ stt_alpha_gpu

uint16_t soc_amd_cezanne_config::stt_alpha_gpu

Definition at line 55 of file chip.h.

◆ stt_alpha_hs2

uint16_t soc_amd_cezanne_config::stt_alpha_hs2

Definition at line 56 of file chip.h.

◆ stt_c_apu

uint16_t soc_amd_cezanne_config::stt_c_apu

Definition at line 51 of file chip.h.

◆ stt_c_gpu

uint16_t soc_amd_cezanne_config::stt_c_gpu

Definition at line 52 of file chip.h.

◆ stt_c_hs2

uint16_t soc_amd_cezanne_config::stt_c_hs2

Definition at line 53 of file chip.h.

◆ stt_control

uint8_t soc_amd_cezanne_config::stt_control

Definition at line 42 of file chip.h.

◆ stt_error_coeff

uint16_t soc_amd_cezanne_config::stt_error_coeff

Definition at line 60 of file chip.h.

◆ stt_error_rate_coefficient

uint16_t soc_amd_cezanne_config::stt_error_rate_coefficient

Definition at line 61 of file chip.h.

◆ stt_m1

uint16_t soc_amd_cezanne_config::stt_m1

Definition at line 45 of file chip.h.

◆ stt_m2

uint16_t soc_amd_cezanne_config::stt_m2

Definition at line 46 of file chip.h.

◆ stt_m3

uint16_t soc_amd_cezanne_config::stt_m3

Definition at line 47 of file chip.h.

◆ stt_m4

uint16_t soc_amd_cezanne_config::stt_m4

Definition at line 48 of file chip.h.

◆ stt_m5

uint16_t soc_amd_cezanne_config::stt_m5

Definition at line 49 of file chip.h.

◆ stt_m6

uint16_t soc_amd_cezanne_config::stt_m6

Definition at line 50 of file chip.h.

◆ stt_min_limit

uint16_t soc_amd_cezanne_config::stt_min_limit

Definition at line 44 of file chip.h.

◆ stt_pcb_sensor_count

uint8_t soc_amd_cezanne_config::stt_pcb_sensor_count

Definition at line 43 of file chip.h.

◆ stt_skin_temp_apu

uint16_t soc_amd_cezanne_config::stt_skin_temp_apu

Definition at line 57 of file chip.h.

◆ stt_skin_temp_gpu

uint16_t soc_amd_cezanne_config::stt_skin_temp_gpu

Definition at line 58 of file chip.h.

◆ stt_skin_temp_hs2

uint16_t soc_amd_cezanne_config::stt_skin_temp_hs2

Definition at line 59 of file chip.h.

◆ sustained_power_limit_mW

uint32_t soc_amd_cezanne_config::sustained_power_limit_mW

Definition at line 66 of file chip.h.

◆ sustained_power_limit_tablet_mode_mW

uint32_t soc_amd_cezanne_config::sustained_power_limit_tablet_mode_mW

Definition at line 95 of file chip.h.

◆ system_configuration

uint8_t soc_amd_cezanne_config::system_configuration

Definition at line 74 of file chip.h.

◆ telemetry_vddcrsocfull_scale_current_mA

uint32_t soc_amd_cezanne_config::telemetry_vddcrsocfull_scale_current_mA

Definition at line 86 of file chip.h.

◆ telemetry_vddcrsocoffset

uint32_t soc_amd_cezanne_config::telemetry_vddcrsocoffset

Definition at line 87 of file chip.h.

◆ telemetry_vddcrvddfull_scale_current_mA

uint32_t soc_amd_cezanne_config::telemetry_vddcrvddfull_scale_current_mA

Definition at line 84 of file chip.h.

◆ telemetry_vddcrvddoffset

uint32_t soc_amd_cezanne_config::telemetry_vddcrvddoffset

Definition at line 85 of file chip.h.

◆ thermctl_limit_degreeC

uint32_t soc_amd_cezanne_config::thermctl_limit_degreeC

Definition at line 70 of file chip.h.

◆ thermctl_limit_tablet_mode_degreeC

uint32_t soc_amd_cezanne_config::thermctl_limit_tablet_mode_degreeC

Definition at line 96 of file chip.h.

◆ tx_eq_main

uint8_t soc_amd_cezanne_config::tx_eq_main

Definition at line 120 of file chip.h.

◆ tx_eq_post

uint8_t soc_amd_cezanne_config::tx_eq_post

Definition at line 122 of file chip.h.

◆ tx_eq_pre

uint8_t soc_amd_cezanne_config::tx_eq_pre

Definition at line 121 of file chip.h.

◆ tx_vboost_lvl

uint8_t soc_amd_cezanne_config::tx_vboost_lvl

Definition at line 123 of file chip.h.

◆ usb_phy

struct usb_phy_config soc_amd_cezanne_config::usb_phy

Definition at line 110 of file chip.h.

◆ usb_phy_custom

uint8_t soc_amd_cezanne_config::usb_phy_custom

Definition at line 110 of file chip.h.


The documentation for this struct was generated from the following file: