16 #include <soc/amd_pci_int_defs.h>
17 #include <soc/iomap.h>
19 #include <soc/platform_descriptors.h>
21 #include <soc/southbridge.h>
37 {
PIRQ_F,
"INTF#/GENINT2" },
104 if (
CONFIG(HAVE_SMI_HANDLER)) {
139 size_t gpp_clk_config_num)
141 const fsp_dxio_descriptor *dxio_descs =
NULL;
142 const fsp_ddi_descriptor *ddi_descs =
NULL;
147 if (dxio_descs ==
NULL) {
149 "No DXIO descriptors found, GPP clk req may not reflect enabled devices\n");
153 for (
int i = 0; i < dxio_num; i++) {
154 const fsp_dxio_descriptor *dxio_desc = &dxio_descs[i];
157 if (dxio_desc->engine_type != PCIE_ENGINE
158 && dxio_desc->engine_type != UNUSED_ENGINE)
160 enum cpm_clk_req dxio_clk_req = dxio_desc->clk_req;
163 if (dxio_clk_req == CLK_DISABLE)
173 if (dxio_clk_req == (CLK_ENABLE & 0xF)) {
175 "CLK_ENABLE is an invalid clk_req value for PCIe device %d.%d, DXIO descriptor %d\n",
176 dxio_desc->device_number, dxio_desc->function_number, i);
181 int gpp_req_index = dxio_clk_req - CLK_REQ0;
183 if (gpp_req_index < 0 || gpp_req_index >= gpp_clk_config_num) {
184 printk(
BIOS_ERR,
"Failed to convert DXIO clk req value %d to GPP clk req index for PCIe device %d.%d, DXIO descriptor %d, clk req settings may be incorrect\n",
185 dxio_clk_req, dxio_desc->device_number,
186 dxio_desc->function_number, i);
191 PCI_DEVFN(dxio_desc->device_number, dxio_desc->function_number));
192 if (pci_device ==
NULL) {
195 "Cannot find PCIe device %d.%d, disabling GPP clk req %d, DXIO descriptor %d\n",
196 dxio_desc->device_number, dxio_desc->function_number, i,
207 (
id != 0x00000000) && (
id != 0x0000ffff) && (
id != 0xffff0000);
213 "PCIe device %d.%d disabled, disabling GPP clk req %d, DXIO descriptor %d\n",
214 dxio_desc->device_number, dxio_desc->function_number,
218 "PCIe device %d.%d enabled, GPP clk req is off, DXIO descriptor %d\n",
219 dxio_desc->device_number, dxio_desc->function_number, i);
#define SLPTYPE_CONTROL_EN
static void pm_write32(uint8_t reg, uint32_t value)
static uint8_t pm_read8(uint8_t reg)
static void pm_write16(uint8_t reg, uint16_t value)
static uint32_t misc_read32(uint8_t reg)
static uint32_t pm_read32(uint8_t reg)
static void misc_write32(uint8_t reg, uint32_t value)
static uint16_t pm_read16(uint8_t reg)
static void pm_write8(uint8_t reg, uint8_t value)
void mainboard_get_dxio_ddi_descriptors(const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num, const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num)
static void gpp_clk_setup(void)
const struct irq_idx_name * sb_get_apic_reg_association(size_t *size)
static void gpp_dxio_update_clk_req_config(enum gpp_clk_req *gpp_clk_config, size_t gpp_clk_config_num)
BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, set_pci_irqs, NULL)
static void cgpll_clock_gate_init(void)
static void fch_init_acpi_ports(void)
void fch_init(void *chip_info)
static const struct irq_idx_name irq_association[]
static void fch_clk_output_48Mhz(void)
void fch_final(void *chip_info)
static void fch_init_resets(void)
static void set_pci_irqs(void *unused)
#define GPP_CLK_REQ_MASK(clk_shift)
#define USB_PHY_CMCLK_S3_DIS
#define GPP_CLK_REQ_ON(clk_shift)
#define GPP_CLK5_REQ_SHIFT
#define GPP_CLK2_REQ_SHIFT
#define XTAL_PAD_S5_TURNOFF_EN
#define PM_ACPI_TIMER_EN_EN
#define FORCE_SLPSTATE_RETRY
#define PM_ACPI_GLOBAL_EN
#define MISC_CGPLL_CONFIGURATION0
#define GPP_CLK_OUTPUT_COUNT
#define PM_ACPI_DECODE_STD
#define GPP_CLK6_REQ_SHIFT
#define BP_X48M0_OUTPUT_EN
#define BLINKCLK_GATEOFFEN
#define MISC_CLKGATEDCNTL
#define GPP_CLK1_REQ_SHIFT
#define USB_PHY_CMCLK_S0I3_DIS
#define PM_ACPI_RTC_EN_EN
#define BP_X48M0_S0I3_DIS
#define GPP_CLK4_REQ_SHIFT
#define GPP_CLK0_REQ_SHIFT
#define XTAL_PAD_S3_TURNOFF_EN
#define USB_PHY_CMCLK_S5_DIS
#define GPP_CLK_REQ_EXT(clk_shift)
#define ALINKCLK_GATEOFFEN
#define GPP_CLK_REQ_OFF(clk_shift)
#define TOGGLE_ALL_PWR_GOOD
#define GPP_CLK3_REQ_SHIFT
#define printk(level,...)
DEVTREE_CONST struct device * pcidev_path_on_root(pci_devfn_t devfn)
static __always_inline u32 pci_read_config32(const struct device *dev, u16 reg)
#define BIOS_INFO
BIOS_INFO - Expected events.
#define BIOS_ERR
BIOS_ERR - System in incomplete state.
#define BIOS_WARNING
BIOS_WARNING - Bad configuration.
#define PCI_DEVFN(slot, func)
#define SMITYPE_SMI_CMD_PORT
void acpi_pm_gpe_add_events_print_events(void)
void gpio_add_events(void)
void write_pci_cfg_irqs(void)
void write_pci_int_table(void)
void populate_pirq_data(void)
void configure_smi(uint8_t smi_num, uint8_t mode)
enum gpp_clk_req gpp_clk_config[GPP_CLK_OUTPUT_COUNT]