coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
romstage.c File Reference
#include <string.h>
#include <soc/romstage.h>
#include <soc/gpio_apl.h>
#include <soc/meminit.h>
#include <fsp/api.h>
#include <FspmUpd.h>
#include <console/console.h>
#include <gpio.h>
Include dependency graph for romstage.c:

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Functions

static uint8_t get_memory_skuid (void)
 
void mainboard_memory_init_params (FSPM_UPD *memupd)
 
void mainboard_save_dimm_info (void)
 

Variables

static const uint8_t memory_skuid_pads [] = { GPIO_214, GPIO_215 }
 
static const struct lpddr4_sku skus []
 
static const struct lpddr4_cfg lp4cfg
 
static const uint8_t ch0_bit_swizzling []
 
static const uint8_t ch1_bit_swizzling []
 
static const uint8_t ch2_bit_swizzling []
 
static const uint8_t ch3_bit_swizzling []
 

Function Documentation

◆ get_memory_skuid()

static uint8_t get_memory_skuid ( void  )
static

Definition at line 88 of file romstage.c.

References ARRAY_SIZE, gpio_get(), and memory_skuid_pads.

Referenced by mainboard_memory_init_params(), and mainboard_save_dimm_info().

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◆ mainboard_memory_init_params()

void mainboard_memory_init_params ( FSPM_UPD *  memupd)

◆ mainboard_save_dimm_info()

void mainboard_save_dimm_info ( void  )

Definition at line 192 of file romstage.c.

References get_memory_skuid(), lp4cfg, and save_lpddr4_dimm_info().

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Variable Documentation

◆ ch0_bit_swizzling

const uint8_t ch0_bit_swizzling[]
static
Initial value:
= {
0x0D, 0x0A, 0x08, 0x0B, 0x0C, 0x0F, 0x0E, 0x09,
0x06, 0x00, 0x03, 0x04, 0x07, 0x01, 0x05, 0x02,
0x1C, 0x1A, 0x19, 0x1B, 0x1D, 0x1F, 0x1E, 0x18,
0x10, 0x17, 0x15, 0x16, 0x14, 0x12, 0x13, 0x11
}

Definition at line 53 of file romstage.c.

Referenced by mainboard_memory_init_params().

◆ ch1_bit_swizzling

const uint8_t ch1_bit_swizzling[]
static
Initial value:
= {
0x00, 0x07, 0x04, 0x05, 0x06, 0x02, 0x03, 0x01,
0x08, 0x0F, 0x0D, 0x0B, 0x0A, 0x09, 0x0E, 0x0C,
0x17, 0x11, 0x13, 0x12, 0x14, 0x15, 0x16, 0x10,
0x1C, 0x1A, 0x1D, 0x1F, 0x18, 0x19, 0x1E, 0x1B
}

Definition at line 60 of file romstage.c.

Referenced by mainboard_memory_init_params().

◆ ch2_bit_swizzling

const uint8_t ch2_bit_swizzling[]
static
Initial value:
= {
0x0D, 0x08, 0x0B, 0x0E, 0x0C, 0x0F, 0x09, 0x0A,
0x04, 0x07, 0x01, 0x06, 0x02, 0x03, 0x00, 0x05,
0x18, 0x19, 0x1C, 0x1A, 0x1D, 0x1E, 0x1F, 0x1B,
0x11, 0x13, 0x15, 0x10, 0x16, 0x12, 0x17, 0x14
}

Definition at line 67 of file romstage.c.

Referenced by mainboard_memory_init_params().

◆ ch3_bit_swizzling

const uint8_t ch3_bit_swizzling[]
static
Initial value:
= {
0x00, 0x05, 0x04, 0x07, 0x03, 0x02, 0x06, 0x01,
0x0A, 0x0B, 0x08, 0x09, 0x0C, 0x0E, 0x0D, 0x0F,
0x12, 0x16, 0x14, 0x13, 0x17, 0x11, 0x15, 0x10,
0x19, 0x1F, 0x1D, 0x1B, 0x1E, 0x18, 0x1C, 0x1A
}

Definition at line 74 of file romstage.c.

Referenced by mainboard_memory_init_params().

◆ lp4cfg

const struct lpddr4_cfg lp4cfg
static
Initial value:
= {
.skus = skus,
.num_skus = ARRAY_SIZE(skus),
}
#define ARRAY_SIZE(a)
Definition: helpers.h:12
static const struct lpddr4_sku skus[]
Definition: romstage.c:20

Definition at line 18 of file romstage.c.

Referenced by mainboard_save_dimm_info().

◆ memory_skuid_pads

const uint8_t memory_skuid_pads[] = { GPIO_214, GPIO_215 }
static

Definition at line 18 of file romstage.c.

Referenced by get_memory_skuid().

◆ skus

const struct lpddr4_sku skus[]
static
Initial value:
= {
[0] = {
.speed = LP4_SPEED_2400,
.ch0_rank_density = LP4_8Gb_DENSITY,
.ch1_rank_density = 0,
.ch0_dual_rank = 0,
.ch1_dual_rank = 0,
.part_num = "K4F8E304HB-MGCJ",
},
[1] = {
.speed = LP4_SPEED_2400,
.ch0_rank_density = LP4_8Gb_DENSITY,
.ch1_rank_density = LP4_8Gb_DENSITY,
.ch0_dual_rank = 0,
.ch1_dual_rank = 0,
.part_num = "K4F8E304HB-MGCJ",
},
[2] = {
.speed = LP4_SPEED_2400,
.ch0_rank_density = LP4_16Gb_DENSITY,
.ch1_rank_density = LP4_16Gb_DENSITY,
.ch0_dual_rank = 1,
.ch1_dual_rank = 1,
.part_num = "K4F6E304HB-MGCJ",
},
}
@ LP4_SPEED_2400
Definition: meminit.h:49
@ LP4_16Gb_DENSITY
Definition: meminit.h:58
@ LP4_8Gb_DENSITY
Definition: meminit.h:56

Definition at line 18 of file romstage.c.