coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
reset.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <cf9_reset.h>
4 #include <console/console.h>
5 #include <delay.h>
6 #include <intelblocks/pmclib.h>
7 #include <soc/heci.h>
9 #include <soc/pm.h>
10 #include <timer.h>
11 
12 #define CSE_WAIT_MAX_MS 1000
13 
14 void do_global_reset(void)
15 {
17  do_full_reset();
18 }
19 
21 {
22  struct stopwatch sw;
23 
24  /*
25  * If CSE state is something else than 'normal', it is probably in some
26  * recovery state. In this case there is no point in waiting for it to
27  * get ready so we cross fingers and reset.
28  */
29  if (!heci_cse_normal()) {
30  printk(BIOS_DEBUG, "CSE is not in normal state, resetting\n");
31  return;
32  }
33 
34  /* Reset if CSE is ready */
35  if (heci_cse_done())
36  return;
37 
38  printk(BIOS_SPEW, "CSE is not yet ready, waiting\n");
40  while (!heci_cse_done()) {
41  if (stopwatch_expired(&sw)) {
42  printk(BIOS_SPEW, "CSE timed out. Resetting\n");
43  return;
44  }
45  mdelay(1);
46  }
47  printk(BIOS_SPEW, "CSE took %lu ms\n", stopwatch_duration_msecs(&sw));
48 }
void do_full_reset(void)
Definition: cf9_reset.c:30
#define printk(level,...)
Definition: stdlib.h:16
void mdelay(unsigned int msecs)
Definition: delay.c:2
bool heci_cse_normal(void)
Definition: heci.c:14
bool heci_cse_done(void)
Definition: heci.c:19
static int stopwatch_expired(struct stopwatch *sw)
Definition: timer.h:152
static long stopwatch_duration_msecs(struct stopwatch *sw)
Definition: timer.h:182
static void stopwatch_init_msecs_expire(struct stopwatch *sw, long ms)
Definition: timer.h:133
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition: loglevel.h:128
#define BIOS_SPEW
BIOS_SPEW - Excessively verbose output.
Definition: loglevel.h:142
void do_global_reset(void)
Definition: reset.c:8
void cf9_reset_prepare(void)
Definition: reset.c:20
#define CSE_WAIT_MAX_MS
Definition: reset.c:12
void pmc_global_reset_enable(bool enable)