coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
cpu.c
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <console/console.h>
4 #include <cpu/x86/mp.h>
5 #include <stdint.h>
6 #include <cpu/intel/smm_reloc.h>
9 
10 static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
11  size_t *smm_save_state_size)
12 {
13  printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
14 
15  smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize);
16 
17  /* FIXME: on X86_64 the save state size is smaller than the size of the SMM stub */
18  *smm_save_state_size = sizeof(amd64_smm_state_save_area_t);
19  printk(BIOS_DEBUG, "Save state size: 0x%zx bytes\n", *smm_save_state_size);
20 }
21 
22 /*
23  * The relocation work is actually performed in SMM context, but the code
24  * resides in the ramstage module. This occurs by trampolining from the default
25  * SMRAM entry point to here.
26  */
27 static void relocation_handler(int cpu, uintptr_t curr_smbase,
28  uintptr_t staggered_smbase)
29 {
30  /* The em64t101 save state is sufficiently compatible with older
31  save states with regards of smbase, smm_revision. */
32  amd64_smm_state_save_area_t *save_state;
33  u32 smbase = staggered_smbase;
34 
35  save_state = (void *)(curr_smbase + SMM_DEFAULT_SIZE - sizeof(*save_state));
36  save_state->smbase = smbase;
37 
38  printk(BIOS_DEBUG, "In relocation handler: cpu %d\n", cpu);
39  printk(BIOS_DEBUG, "SMM revision: 0x%08x\n", save_state->smm_revision);
40  printk(BIOS_DEBUG, "New SMBASE=0x%08x\n", smbase);
41 }
42 
43 static void post_mp_init(void)
44 {
45  /* Now that all APs have been relocated as well as the BSP let SMIs start flowing. */
47 
48  /* Lock down the SMRAM space. */
49  smm_lock();
50 }
51 
52 const struct mp_ops mp_ops_with_smm = {
54  .get_smm_info = get_smm_info,
55  .pre_mp_smm_init = smm_southbridge_clear_state,
56  .relocation_handler = relocation_handler,
57  .post_mp_init = post_mp_init,
58 };
#define printk(level,...)
Definition: stdlib.h:16
int fw_cfg_max_cpus(void)
Definition: fw_cfg.c:131
@ SMM_SUBREGION_HANDLER
Definition: smm.h:171
void global_smi_enable(void)
Set the EOS bit and enable SMI generation from southbridge.
Definition: smi_util.c:60
#define SMM_DEFAULT_SIZE
Definition: smm.h:11
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition: loglevel.h:128
static void relocation_handler(int cpu, uintptr_t curr_smbase, uintptr_t staggered_smbase)
Definition: cpu.c:27
const struct mp_ops mp_ops_with_smm
Definition: cpu.c:52
static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, size_t *smm_save_state_size)
Definition: cpu.c:10
static void post_mp_init(void)
Definition: cpu.c:43
static const struct smm_save_state_ops * save_state
Definition: save_state.c:13
void smm_southbridge_clear_state(void)
Definition: smm.c:22
void smm_lock(void)
Definition: cpu.c:154
uint32_t u32
Definition: stdint.h:51
unsigned long uintptr_t
Definition: stdint.h:21
Definition: mp.h:20
int(* get_cpu_count)(void)
Definition: mp.h:33
int smm_subregion(int sub, uintptr_t *start, size_t *size)
Definition: tseg_region.c:22