13 #include <soc/pci_devs.h>
14 #include <soc/systemagent.h>
72 if (cfg->max_package_c_state && (msr.
lo & 0xf) >= cfg->max_package_c_state) {
73 msr.
lo = (msr.
lo & ~0xf) | ((cfg->max_package_c_state - 1) & 0xf);
138 if (cfg->cpu_turbo_disable)
222 if (msr2.
lo && (current_patch_id == new_patch_id - 1))
226 (current_patch_id == new_patch_id - 1);
#define printk(level,...)
void configure_dca_cap(void)
void set_aesni_lock(void)
void set_energy_perf_bias(u8 policy)
void enable_lapic_tpr(void)
void set_feature_ctrl_lock(void)
void set_feature_ctrl_vmx_arg(bool enable)
#define C_STATE_LATENCY_CONTROL_0_LIMIT
#define MSR_C_STATE_LATENCY_CONTROL_1
#define C_STATE_LATENCY_CONTROL_4_LIMIT
#define C_STATE_LATENCY_CONTROL_2_LIMIT
#define C_STATE_LATENCY_CONTROL_3_LIMIT
#define MSR_PRMRR_PHYS_BASE
#define C_STATE_LATENCY_CONTROL_1_LIMIT
#define MSR_C_STATE_LATENCY_CONTROL_5
#define MSR_C_STATE_LATENCY_CONTROL_0
#define C_STATE_LATENCY_CONTROL_5_LIMIT
#define MSR_C_STATE_LATENCY_CONTROL_2
#define MSR_C_STATE_LATENCY_CONTROL_3
#define MSR_PKG_CST_CONFIG_CONTROL
#define MSR_C_STATE_LATENCY_CONTROL_4
void smm_relocation_handler(int cpu, uintptr_t curr_smbase, uintptr_t staggered_smbase)
void smm_initialize(void)
void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, size_t *smm_save_state_size)
enum cb_err mp_init_with_smm(struct bus *cpu_bus, const struct mp_ops *mp_ops)
void cpu_set_eist(bool eist_status)
void cpu_set_max_ratio(void)
void configure_tcc_thermal_target(void)
DEVTREE_CONST struct device * pcidev_path_on_root(pci_devfn_t devfn)
static __always_inline msr_t rdmsr(unsigned int index)
#define IA32_PACKAGE_THERM_INTERRUPT
#define ENERGY_POLICY_NORMAL
static __always_inline void wrmsr(unsigned int index, msr_t msr)
#define IA32_THERM_INTERRUPT
void global_smi_enable_no_pwrbtn(void)
static __always_inline void pci_write_config8(const struct device *dev, u16 reg, u8 val)
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
void enable_pm_timer_emulation(void)
void soc_init_cpus(struct bus *cpu_bus)
bool cpu_soc_is_in_untrusted_mode(void)
void soc_core_init(struct device *cpu)
#define ENABLE_IA_UNTRUSTED
void get_microcode_info(const void **microcode, int *parallel)
int soc_skip_ucode_update(u32 current_patch_id, u32 new_patch_id)
static void configure_misc(void)
static void soc_fsp_load(void)
static void per_cpu_smm_trigger(void)
static void configure_c_states(const config_t *const cfg)
static void post_mp_init(void)
#define CST_CFG_LOCK_MASK
void(* pre_mp_init)(void)