![]() |
coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
|
#include <soc/sdram.h>
#include <soc/addressmap.h>
#include "regconfig-phy.h"
#include "regconfig-ctl.h"
#include "ux00ddr.h"
#include "ddrregs.h"
Go to the source code of this file.
Macros | |
#define | DENALI_PHY_DATA ddr_phy_settings |
#define | DENALI_CTL_DATA ddr_ctl_settings |
#define | DDR_SIZE (8UL * 1024UL * 1024UL * 1024UL) |
Functions | |
void | sdram_init (void) |
size_t | sdram_size_mb (void) |
Definition at line 16 of file sdram.c.
References DDR_SIZE, DRAM_CLASS_DDR4, FU540_DDRBUSBLOCKER, FU540_DDRCTRL, FU540_DRAM, ux00ddr_disableaxireadinterleave(), ux00ddr_disableoptimalrmodw(), ux00ddr_enablereadleveling(), ux00ddr_enablereadlevelinggate(), ux00ddr_enablevreftraining(), ux00ddr_enablewriteleveling(), ux00ddr_getdramclass(), ux00ddr_mask_leveling_completed_interrupt(), ux00ddr_mask_mc_init_complete_interrupt(), ux00ddr_mask_outofrange_interrupts(), ux00ddr_mask_port_command_error_interrupt(), ux00ddr_phy_fixup(), ux00ddr_setuprangeprotection(), ux00ddr_start(), and ux00ddr_writeregmap().
Referenced by main(), platform_romstage_main(), and romstage().
Definition at line 44 of file sdram.c.
Referenced by bootmem_platform_add_ranges(), cbmem_top_chipset(), do_fixup_memory(), main(), mainboard_enable(), mainboard_print_info(), platform_romstage_main(), soc_init(), soc_mmu_init(), and soc_read_resources().