coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
ramstage.h
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef _SOC_RAMSTAGE_H_
4 #define _SOC_RAMSTAGE_H_
5 
6 #include <fsp/api.h>
7 #include <fsp/util.h>
8 #include <soc/soc_chip.h>
9 
10 void mainboard_silicon_init_params(FSP_S_CONFIG *params);
11 void mainboard_update_soc_chip_config(struct soc_intel_alderlake_config *config);
12 void soc_init_pre_device(void *chip_info);
13 
14 #endif
params
static struct sdram_info params
Definition: sdram_configs.c:83
mainboard_silicon_init_params
void mainboard_silicon_init_params(SILICON_INIT_UPD *params)
Definition: ramstage.c:162
FSP_S_CONFIG
#define FSP_S_CONFIG
Definition: fsp_upd.h:9
config
enum board_config config
Definition: memory.c:448
soc_init_pre_device
void soc_init_pre_device(void *chip_info)
Definition: chip.c:137
mainboard_update_soc_chip_config
void mainboard_update_soc_chip_config(struct soc_intel_alderlake_config *config)
Definition: mainboard.c:34
soc_intel_alderlake_config
Definition: chip.h:175