coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
smihandler.c
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
acpi/acpi.h
>
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#include <arch/io.h>
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#include <
console/console.h
>
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#include <
cpu/x86/smm.h
>
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#include <elog.h>
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#include <
ec/google/chromeec/ec.h
>
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#include "
ec.h
"
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#include <soc/nvs.h>
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#include <soc/pm.h>
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/* The wake gpio is SUS_GPIO[0]. */
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#define WAKE_GPIO_EN SUS_GPIO_EN0
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static
uint8_t
mainboard_smi_ec
(
void
)
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{
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uint8_t
cmd =
google_chromeec_get_event
();
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uint16_t
pmbase
=
get_pmbase
();
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uint32_t
pm1_cnt;
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/* Log this event */
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if
(cmd)
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elog_gsmi_add_event_byte
(
ELOG_TYPE_EC_EVENT
, cmd);
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switch
(cmd) {
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case
EC_HOST_EVENT_LID_CLOSED
:
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printk
(
BIOS_DEBUG
,
"LID CLOSED, SHUTDOWN\n"
);
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/* Go to S5 */
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pm1_cnt =
inl
(
pmbase
+
PM1_CNT
);
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pm1_cnt |=
SLP_EN
| (
SLP_TYP_S5
<<
SLP_TYP_SHIFT
);
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outl
(pm1_cnt,
pmbase
+
PM1_CNT
);
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break
;
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}
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return
cmd;
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}
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/* The entire 32-bit ALT_GPIO_SMI register is passed as a parameter. Note, that
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* this includes the enable bits in the lower 16 bits. */
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void
mainboard_smi_gpi
(
uint32_t
alt_gpio_smi)
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{
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if
(alt_gpio_smi & (1 <<
EC_SMI_GPI
)) {
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/* Process all pending events */
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while
(
mainboard_smi_ec
() != 0);
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}
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}
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void
mainboard_smi_sleep
(
uint8_t
slp_typ)
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{
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/* Disable USB charging if required */
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switch
(slp_typ) {
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case
ACPI_S3
:
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if
(
gnvs
->
s3u0
== 0)
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google_chromeec_set_usb_charge_mode
(
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0,
USB_CHARGE_MODE_DISABLED
);
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if
(
gnvs
->
s3u1
== 0)
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google_chromeec_set_usb_charge_mode
(
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1,
USB_CHARGE_MODE_DISABLED
);
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/* Enable wake events */
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google_chromeec_set_wake_mask
(
MAINBOARD_EC_S3_WAKE_EVENTS
);
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/* Enable wake pin in GPE block. */
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enable_gpe
(
WAKE_GPIO_EN
);
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break
;
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case
ACPI_S5
:
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if
(
gnvs
->
s5u0
== 0)
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google_chromeec_set_usb_charge_mode
(
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0,
USB_CHARGE_MODE_DISABLED
);
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if
(
gnvs
->
s5u1
== 0)
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google_chromeec_set_usb_charge_mode
(
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1,
USB_CHARGE_MODE_DISABLED
);
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/* Enable wake events */
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google_chromeec_set_wake_mask
(
MAINBOARD_EC_S5_WAKE_EVENTS
);
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break
;
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}
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/* Disable SCI and SMI events */
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google_chromeec_set_smi_mask
(0);
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google_chromeec_set_sci_mask
(0);
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/* Clear pending events that may trigger immediate wake */
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while
(
google_chromeec_get_event
() !=
EC_HOST_EVENT_NONE
)
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;
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}
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int
mainboard_smi_apmc
(
uint8_t
apmc)
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{
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switch
(apmc) {
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case
APM_CNT_ACPI_ENABLE
:
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google_chromeec_set_smi_mask
(0);
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/* Clear all pending events */
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while
(
google_chromeec_get_event
() !=
EC_HOST_EVENT_NONE
)
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;
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google_chromeec_set_sci_mask
(
MAINBOARD_EC_SCI_EVENTS
);
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break
;
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case
APM_CNT_ACPI_DISABLE
:
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google_chromeec_set_sci_mask
(0);
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/* Clear all pending events */
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while
(
google_chromeec_get_event
() !=
EC_HOST_EVENT_NONE
)
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;
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google_chromeec_set_smi_mask
(
MAINBOARD_EC_SMI_EVENTS
);
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break
;
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}
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return
0;
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}
PM1_CNT
#define PM1_CNT
Definition:
pm.h:27
enable_gpe
void enable_gpe(uint32_t mask)
Definition:
pmutil.c:194
ELOG_TYPE_EC_EVENT
#define ELOG_TYPE_EC_EVENT
Definition:
elog.h:90
printk
#define printk(level,...)
Definition:
stdlib.h:16
console.h
mainboard_smi_sleep
void __weak mainboard_smi_sleep(u8 slp_typ)
Definition:
smihandler.c:210
mainboard_smi_apmc
int __weak mainboard_smi_apmc(u8 data)
Definition:
smihandler.c:209
mainboard_smi_gpi
void __weak mainboard_smi_gpi(u32 gpi_sts)
Definition:
smihandler.c:208
inl
u32 inl(u16 port)
outl
void outl(u32 val, u16 port)
google_chromeec_set_wake_mask
int google_chromeec_set_wake_mask(uint64_t mask)
Definition:
ec.c:1131
google_chromeec_set_smi_mask
int google_chromeec_set_smi_mask(uint64_t mask)
Definition:
ec.c:1125
google_chromeec_set_usb_charge_mode
int google_chromeec_set_usb_charge_mode(uint8_t port_id, enum usb_charge_mode mode)
Definition:
ec.c:1143
google_chromeec_set_sci_mask
int google_chromeec_set_sci_mask(uint64_t mask)
Definition:
ec.c:1119
ec.h
google_chromeec_get_event
enum host_event_code google_chromeec_get_event(void)
Definition:
ec_i2c.c:242
EC_HOST_EVENT_NONE
@ EC_HOST_EVENT_NONE
Definition:
ec_commands.h:654
EC_HOST_EVENT_LID_CLOSED
@ EC_HOST_EVENT_LID_CLOSED
Definition:
ec_commands.h:655
USB_CHARGE_MODE_DISABLED
@ USB_CHARGE_MODE_DISABLED
Definition:
ec_commands.h:3240
acpi.h
ACPI_S5
@ ACPI_S5
Definition:
acpi.h:1385
ACPI_S3
@ ACPI_S3
Definition:
acpi.h:1383
smm.h
APM_CNT_ACPI_DISABLE
#define APM_CNT_ACPI_DISABLE
Definition:
smm.h:21
APM_CNT_ACPI_ENABLE
#define APM_CNT_ACPI_ENABLE
Definition:
smm.h:22
elog_gsmi_add_event_byte
static int elog_gsmi_add_event_byte(u8 event_type, u8 data)
Definition:
elog.h:46
SLP_EN
#define SLP_EN
Definition:
pmc.h:62
SLP_TYP_S5
#define SLP_TYP_S5
Definition:
pmc.h:69
SLP_TYP_SHIFT
#define SLP_TYP_SHIFT
Definition:
pmc.h:63
BIOS_DEBUG
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition:
loglevel.h:128
MAINBOARD_EC_S5_WAKE_EVENTS
#define MAINBOARD_EC_S5_WAKE_EVENTS
Definition:
ec.h:32
MAINBOARD_EC_SCI_EVENTS
#define MAINBOARD_EC_SCI_EVENTS
Definition:
ec.h:12
MAINBOARD_EC_SMI_EVENTS
#define MAINBOARD_EC_SMI_EVENTS
Definition:
ec.h:28
EC_SMI_GPI
#define EC_SMI_GPI
Definition:
ec.h:10
MAINBOARD_EC_S3_WAKE_EVENTS
#define MAINBOARD_EC_S3_WAKE_EVENTS
Definition:
ec.h:37
mainboard_smi_ec
static uint8_t mainboard_smi_ec(void)
Definition:
smihandler.c:18
WAKE_GPIO_EN
#define WAKE_GPIO_EN
Definition:
smihandler.c:16
ec.h
gnvs
struct global_nvs * gnvs
Definition:
smm_module_handler.c:100
get_pmbase
u16 get_pmbase(void)
Definition:
smihandler.c:20
pmbase
u16 pmbase
Definition:
smihandler.c:25
uint16_t
unsigned short uint16_t
Definition:
stdint.h:11
uint32_t
unsigned int uint32_t
Definition:
stdint.h:14
uint8_t
unsigned char uint8_t
Definition:
stdint.h:8
global_nvs::s5u1
u8 s5u1
Definition:
nvs.h:33
global_nvs::s3u0
u8 s3u0
Definition:
nvs.h:34
global_nvs::s3u1
u8 s3u1
Definition:
nvs.h:35
global_nvs::s5u0
u8 s5u0
Definition:
nvs.h:32
src
mainboard
google
rambi
smihandler.c
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